From: Tejasree Kondoj <ktejasree@marvell.com>
To: Akhil Goyal <gakhil@marvell.com>
Cc: Anoob Joseph <anoobj@marvell.com>,
Vidya Sagar Velumuri <vvelumuri@marvell.com>, <dev@dpdk.org>
Subject: [PATCH 08/11] crypto/cnxk: add PMD API for getting CPTR
Date: Thu, 5 Sep 2024 13:16:28 +0530 [thread overview]
Message-ID: <20240905074631.1462357-9-ktejasree@marvell.com> (raw)
In-Reply-To: <20240905074631.1462357-1-ktejasree@marvell.com>
From: Anoob Joseph <anoobj@marvell.com>
CPTR address is the context address used by hardware. Add PMD API to
retrieve the hardware address from rte_cryptodev/rte_security session.
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
---
drivers/crypto/cnxk/cnxk_cryptodev_ops.c | 49 +++++++++++++++++++++++
drivers/crypto/cnxk/rte_pmd_cnxk_crypto.h | 42 +++++++++++++++++++
drivers/crypto/cnxk/version.map | 3 ++
3 files changed, 94 insertions(+)
diff --git a/drivers/crypto/cnxk/cnxk_cryptodev_ops.c b/drivers/crypto/cnxk/cnxk_cryptodev_ops.c
index d0ad2d9a4b..128f1b1ddd 100644
--- a/drivers/crypto/cnxk/cnxk_cryptodev_ops.c
+++ b/drivers/crypto/cnxk/cnxk_cryptodev_ops.c
@@ -25,7 +25,9 @@
#include "cnxk_se.h"
#include "cn10k_cryptodev_ops.h"
+#include "cn10k_cryptodev_sec.h"
#include "cn9k_cryptodev_ops.h"
+#include "cn9k_ipsec.h"
#include "rte_pmd_cnxk_crypto.h"
@@ -1017,3 +1019,50 @@ rte_pmd_cnxk_crypto_submit(struct rte_pmd_cnxk_crypto_qptr *qptr, void *inst, ui
plt_err("Invalid cnxk model");
}
+
+struct rte_pmd_cnxk_crypto_cptr *
+rte_pmd_cnxk_crypto_cptr_get(struct rte_pmd_cnxk_crypto_sess *rte_sess)
+{
+ if (rte_sess == NULL) {
+ plt_err("Invalid session pointer");
+ return NULL;
+ }
+
+ if (rte_sess->sec_sess == NULL) {
+ plt_err("Invalid RTE session pointer");
+ return NULL;
+ }
+
+ if (rte_sess->op_type == RTE_CRYPTO_OP_TYPE_ASYMMETRIC) {
+ struct cnxk_ae_sess *ae_sess = PLT_PTR_CAST(rte_sess->crypto_asym_sess);
+ return PLT_PTR_CAST(&ae_sess->hw_ctx);
+ }
+
+ if (rte_sess->op_type != RTE_CRYPTO_OP_TYPE_SYMMETRIC) {
+ plt_err("Invalid crypto operation type");
+ return NULL;
+ }
+
+ if (rte_sess->sess_type == RTE_CRYPTO_OP_WITH_SESSION) {
+ struct cnxk_se_sess *se_sess = PLT_PTR_CAST(rte_sess->crypto_sym_sess);
+ return PLT_PTR_CAST(&se_sess->roc_se_ctx.se_ctx);
+ }
+
+ if (rte_sess->sess_type == RTE_CRYPTO_OP_SECURITY_SESSION) {
+ if (roc_model_is_cn10k()) {
+ struct cn10k_sec_session *sec_sess = PLT_PTR_CAST(rte_sess->sec_sess);
+ return PLT_PTR_CAST(&sec_sess->sa);
+ }
+
+ if (roc_model_is_cn9k()) {
+ struct cn9k_sec_session *sec_sess = PLT_PTR_CAST(rte_sess->sec_sess);
+ return PLT_PTR_CAST(&sec_sess->sa);
+ }
+
+ plt_err("Invalid cnxk model");
+ return NULL;
+ }
+
+ plt_err("Invalid session type");
+ return NULL;
+}
diff --git a/drivers/crypto/cnxk/rte_pmd_cnxk_crypto.h b/drivers/crypto/cnxk/rte_pmd_cnxk_crypto.h
index 28d86b5a18..dc5a6d57b0 100644
--- a/drivers/crypto/cnxk/rte_pmd_cnxk_crypto.h
+++ b/drivers/crypto/cnxk/rte_pmd_cnxk_crypto.h
@@ -23,6 +23,35 @@
*/
struct rte_pmd_cnxk_crypto_qptr;
+/**
+ * @brief Crypto CNXK PMD CPTR opaque pointer.
+ *
+ * This structure represents the context pointer that would be used to store the hardware context.
+ */
+struct rte_pmd_cnxk_crypto_cptr;
+
+/**
+ * @brief Crypto CNXK PMD session structure.
+ *
+ * This structure represents the session structure that would be used to store the session
+ * information.
+ */
+struct rte_pmd_cnxk_crypto_sess {
+ /** Crypto type (symmetric or asymmetric). */
+ enum rte_crypto_op_type op_type;
+ /** Session type (Crypto or security). */
+ enum rte_crypto_op_sess_type sess_type;
+ /** Session pointer. */
+ union {
+ /** Security session pointer. */
+ struct rte_security_session *sec_sess;
+ /** Crypto symmetric session pointer. */
+ struct rte_cryptodev_sym_session *crypto_sym_sess;
+ /** Crypto asymmetric session pointer */
+ struct rte_cryptodev_asym_session *crypto_asym_sess;
+ };
+};
+
/**
* Get queue pointer of a specific queue in a cryptodev.
*
@@ -57,4 +86,17 @@ __rte_experimental
void rte_pmd_cnxk_crypto_submit(struct rte_pmd_cnxk_crypto_qptr *qptr, void *inst,
uint16_t nb_inst);
+/**
+ * Get the HW CPTR pointer from the rte_crypto/rte_security session.
+ *
+ * @param rte_sess
+ * Pointer to the structure holding rte_cryptodev or rte_security session.
+ * @return
+ * - On success, pointer to the HW CPTR.
+ * - NULL on error.
+ */
+__rte_experimental
+struct rte_pmd_cnxk_crypto_cptr *rte_pmd_cnxk_crypto_cptr_get(
+ struct rte_pmd_cnxk_crypto_sess *rte_sess);
+
#endif /* _PMD_CNXK_CRYPTO_H_ */
diff --git a/drivers/crypto/cnxk/version.map b/drivers/crypto/cnxk/version.map
index 7a77607774..b510ec4847 100644
--- a/drivers/crypto/cnxk/version.map
+++ b/drivers/crypto/cnxk/version.map
@@ -4,6 +4,9 @@ EXPERIMENTAL {
# added in 24.03
rte_pmd_cnxk_crypto_submit;
rte_pmd_cnxk_crypto_qptr_get;
+
+ # added in 24.07
+ rte_pmd_cnxk_crypto_cptr_get;
};
INTERNAL {
--
2.25.1
next prev parent reply other threads:[~2024-09-05 7:47 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-09-05 7:46 [PATCH 00/11] fixes and improvements to cnxk crypto PMD Tejasree Kondoj
2024-09-05 7:46 ` [PATCH 01/11] crypto/cnxk: align passthrough data for SM ciphers Tejasree Kondoj
2024-09-05 7:46 ` [PATCH 02/11] crypto/cnxk: add multi segment support for Rx inject Tejasree Kondoj
2024-09-05 7:46 ` [PATCH 03/11] common/cnxk: ensure CPTR is 128B aligned Tejasree Kondoj
2024-09-05 7:46 ` [PATCH 04/11] common/cnxk: rearrange to remove hole Tejasree Kondoj
2024-09-05 7:46 ` [PATCH 05/11] common/cnxk: remove abort from flush API Tejasree Kondoj
2024-09-05 7:46 ` [PATCH 06/11] common/cnxk: move algo enums to common Tejasree Kondoj
2024-09-05 7:46 ` [PATCH 07/11] crypto/cnxk: use opaque pointer for PMD APIs Tejasree Kondoj
2024-09-05 7:46 ` Tejasree Kondoj [this message]
2024-09-05 7:46 ` [PATCH 09/11] crypto/cnxk: add PMD API to flush CTX Tejasree Kondoj
2024-09-05 7:46 ` [PATCH 10/11] crypto/cnxk: add CPTR read and write Tejasree Kondoj
2024-09-05 7:46 ` [PATCH 11/11] crypto/cnxk: add PMD API to get qp stats Tejasree Kondoj
2024-09-18 5:37 ` [PATCH 00/11] fixes and improvements to cnxk crypto PMD Akhil Goyal
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