From: Gavin Li <gavinl@nvidia.com>
To: <matan@nvidia.com>, <viacheslavo@nvidia.com>, <orika@nvidia.com>,
<thomas@monjalon.net>, Dariusz Sosnowski <dsosnowski@nvidia.com>,
Bing Zhao <bingz@nvidia.com>, Suanming Mou <suanmingm@nvidia.com>
Cc: <dev@dpdk.org>, <rasland@nvidia.com>,
"Minggang Li (Gavin)" <gavinl@nvidia.com>,
Alex Vesker <valex@nvidia.com>
Subject: [PATCH 2/3] net/mlx5/hws: add log for failing to create rule in HWS
Date: Fri, 6 Sep 2024 13:21:50 +0300 [thread overview]
Message-ID: <20240906102151.171965-3-gavinl@nvidia.com> (raw)
In-Reply-To: <20240906102151.171965-1-gavinl@nvidia.com>
From: "Minggang Li (Gavin)" <gavinl@nvidia.com>
Signed-off-by: Gavin Li <gavinl@nvidia.com>
Acked-by: Alex Vesker <valex@nvidia.com>
---
drivers/net/mlx5/hws/mlx5dr_rule.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/drivers/net/mlx5/hws/mlx5dr_rule.c b/drivers/net/mlx5/hws/mlx5dr_rule.c
index 1edb7eac74..5d66d81ea5 100644
--- a/drivers/net/mlx5/hws/mlx5dr_rule.c
+++ b/drivers/net/mlx5/hws/mlx5dr_rule.c
@@ -638,6 +638,7 @@ static int mlx5dr_rule_destroy_hws(struct mlx5dr_rule *rule,
/* Rule is not completed yet */
if (rule->status == MLX5DR_RULE_STATUS_CREATING) {
+ DR_LOG(NOTICE, "Cannot destroy, rule creation still in progress");
rte_errno = EBUSY;
return rte_errno;
}
@@ -806,12 +807,14 @@ static int mlx5dr_rule_enqueue_precheck(struct mlx5dr_rule *rule,
struct mlx5dr_context *ctx = rule->matcher->tbl->ctx;
if (unlikely(!attr->user_data)) {
+ DR_LOG(DEBUG, "User data must be provided for rule operations");
rte_errno = EINVAL;
return rte_errno;
}
/* Check if there is room in queue */
if (unlikely(mlx5dr_send_engine_full(&ctx->send_queue[attr->queue_id]))) {
+ DR_LOG(NOTICE, "No room in queue[%d]", attr->queue_id);
rte_errno = EBUSY;
return rte_errno;
}
@@ -823,6 +826,7 @@ static int mlx5dr_rule_enqueue_precheck_move(struct mlx5dr_rule *rule,
struct mlx5dr_rule_attr *attr)
{
if (unlikely(rule->status != MLX5DR_RULE_STATUS_CREATED)) {
+ DR_LOG(DEBUG, "Cannot move, rule status is invalid");
rte_errno = EINVAL;
return rte_errno;
}
@@ -835,6 +839,7 @@ static int mlx5dr_rule_enqueue_precheck_create(struct mlx5dr_rule *rule,
{
if (unlikely(mlx5dr_matcher_is_in_resize(rule->matcher))) {
/* Matcher in resize - new rules are not allowed */
+ DR_LOG(NOTICE, "Resizing in progress, cannot create rule");
rte_errno = EAGAIN;
return rte_errno;
}
@@ -1068,6 +1073,7 @@ int mlx5dr_rule_hash_calculate(struct mlx5dr_matcher *matcher,
mlx5dr_table_is_root(matcher->tbl) ||
matcher->tbl->ctx->caps->access_index_mode == MLX5DR_MATCHER_INSERT_BY_HASH ||
matcher->tbl->ctx->caps->flow_table_hash_type != MLX5_FLOW_TABLE_HASH_TYPE_CRC32) {
+ DR_LOG(DEBUG, "Matcher is not supported");
rte_errno = ENOTSUP;
return -rte_errno;
}
--
2.34.1
next prev parent reply other threads:[~2024-09-06 10:22 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-09-06 10:21 [PATCH 0/3] Error report improvement and fix Gavin Li
2024-09-06 10:21 ` [PATCH 1/3] net/mlx5: set rte errno if malloc failed Gavin Li
2024-09-06 10:21 ` Gavin Li [this message]
2024-09-06 10:21 ` [PATCH 3/3] net/mlx5/hws: print CQE error syndrome and more information Gavin Li
2024-09-10 7:58 ` [PATCH V1 0/3] Error report improvement and fix Gavin Li
2024-09-10 7:58 ` [PATCH V1 1/3] net/mlx5: set rte errno if malloc failed Gavin Li
2024-09-10 7:58 ` [PATCH V1 2/3] net/mlx5/hws: add log for failing to create rule in HWS Gavin Li
2024-09-10 7:58 ` [PATCH V1 3/3] net/mlx5/hws: print CQE error syndrome and more information Gavin Li
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