From: Soumyadeep Hore <soumyadeep.hore@intel.com>
To: bruce.richardson@intel.com, aman.deep.singh@intel.com
Cc: dev@dpdk.org, shaiq.wani@intel.com,
Jacob Keller <jacob.e.keller@intel.com>
Subject: [PATCH v1 1/9] common/iavf: update the PTP enablement in virtchnl
Date: Tue, 10 Sep 2024 10:12:16 +0000 [thread overview]
Message-ID: <20240910101224.497044-2-soumyadeep.hore@intel.com> (raw)
In-Reply-To: <20240910101224.497044-1-soumyadeep.hore@intel.com>
From: Jacob Keller <jacob.e.keller@intel.com>
The virtchnl now supports the PTP Tx Timestamp attributes
in iavf.
Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Soumyadeep Hore <soumyadeep.hore@intel.com>
---
drivers/common/iavf/virtchnl.h | 50 ++++++++++++++++++++++++++++++++++
1 file changed, 50 insertions(+)
diff --git a/drivers/common/iavf/virtchnl.h b/drivers/common/iavf/virtchnl.h
index e02eec4935..2c541ac411 100644
--- a/drivers/common/iavf/virtchnl.h
+++ b/drivers/common/iavf/virtchnl.h
@@ -161,6 +161,10 @@ enum virtchnl_ops {
VIRTCHNL_OP_DISABLE_VLAN_FILTERING_V2 = 59,
VIRTCHNL_OP_1588_PTP_GET_CAPS = 60,
VIRTCHNL_OP_1588_PTP_GET_TIME = 61,
+ VIRTCHNL_OP_1588_PTP_SET_TIME = 62,
+ VIRTCHNL_OP_1588_PTP_ADJ_TIME = 63,
+ VIRTCHNL_OP_1588_PTP_ADJ_FREQ = 64,
+ VIRTCHNL_OP_1588_PTP_TX_TIMESTAMP = 65,
VIRTCHNL_OP_GET_QOS_CAPS = 66,
VIRTCHNL_OP_CONFIG_QUEUE_TC_MAP = 67,
VIRTCHNL_OP_ENABLE_QUEUES_V2 = 107,
@@ -284,6 +288,14 @@ static inline const char *virtchnl_op_str(enum virtchnl_ops v_opcode)
return "VIRTCHNL_OP_1588_PTP_GET_CAPS";
case VIRTCHNL_OP_1588_PTP_GET_TIME:
return "VIRTCHNL_OP_1588_PTP_GET_TIME";
+ case VIRTCHNL_OP_1588_PTP_SET_TIME:
+ return "VIRTCHNL_OP_1588_PTP_SET_TIME";
+ case VIRTCHNL_OP_1588_PTP_ADJ_TIME:
+ return "VIRTCHNL_OP_1588_PTP_ADJ_TIME";
+ case VIRTCHNL_OP_1588_PTP_ADJ_FREQ:
+ return "VIRTCHNL_OP_1588_PTP_ADJ_FREQ";
+ case VIRTCHNL_OP_1588_PTP_TX_TIMESTAMP:
+ return "VIRTCHNL_OP_1588_PTP_TX_TIMESTAMP";
case VIRTCHNL_OP_FLOW_SUBSCRIBE:
return "VIRTCHNL_OP_FLOW_SUBSCRIBE";
case VIRTCHNL_OP_FLOW_UNSUBSCRIBE:
@@ -2125,8 +2137,11 @@ struct virtchnl_quanta_cfg {
VIRTCHNL_CHECK_STRUCT_LEN(12, virtchnl_quanta_cfg);
+#define VIRTCHNL_1588_PTP_CAP_TX_TSTAMP BIT(0)
#define VIRTCHNL_1588_PTP_CAP_RX_TSTAMP BIT(1)
#define VIRTCHNL_1588_PTP_CAP_READ_PHC BIT(2)
+#define VIRTCHNL_1588_PTP_CAP_WRITE_PHC BIT(3)
+#define VIRTCHNL_1588_PTP_CAP_PHC_REGS BIT(4)
struct virtchnl_phc_regs {
u32 clock_hi;
@@ -2137,6 +2152,11 @@ struct virtchnl_phc_regs {
VIRTCHNL_CHECK_STRUCT_LEN(24, virtchnl_phc_regs);
+enum virtchnl_ptp_tstamp_format {
+ VIRTCHNL_1588_PTP_TSTAMP_40BIT = 0,
+ VIRTCHNL_1588_PTP_TSTAMP_64BIT_NS = 1,
+};
+
struct virtchnl_ptp_caps {
struct virtchnl_phc_regs phc_regs;
u32 caps;
@@ -2158,6 +2178,24 @@ struct virtchnl_phc_time {
VIRTCHNL_CHECK_STRUCT_LEN(16, virtchnl_phc_time);
+struct virtchnl_phc_adj_time {
+ s64 delta;
+ u8 rsvd[8];
+};
+VIRTCHNL_CHECK_STRUCT_LEN(16, virtchnl_phc_adj_time);
+
+struct virtchnl_phc_adj_freq {
+ s64 scaled_ppm;
+ u8 rsvd[8];
+};
+VIRTCHNL_CHECK_STRUCT_LEN(16, virtchnl_phc_adj_freq);
+
+struct virtchnl_phc_tx_tstamp {
+ u64 tstamp;
+ u8 rsvd[8];
+};
+VIRTCHNL_CHECK_STRUCT_LEN(16, virtchnl_phc_tx_tstamp);
+
/* Since VF messages are limited by u16 size, precalculate the maximum possible
* values of nested elements in virtchnl structures that virtual channel can
* possibly handle in a single message.
@@ -2487,6 +2525,18 @@ virtchnl_vc_validate_vf_msg(struct virtchnl_version_info *ver, u32 v_opcode,
case VIRTCHNL_OP_1588_PTP_GET_TIME:
valid_len = sizeof(struct virtchnl_phc_time);
break;
+ case VIRTCHNL_OP_1588_PTP_SET_TIME:
+ valid_len = sizeof(struct virtchnl_phc_time);
+ break;
+ case VIRTCHNL_OP_1588_PTP_ADJ_TIME:
+ valid_len = sizeof(struct virtchnl_phc_adj_time);
+ break;
+ case VIRTCHNL_OP_1588_PTP_ADJ_FREQ:
+ valid_len = sizeof(struct virtchnl_phc_adj_freq);
+ break;
+ case VIRTCHNL_OP_1588_PTP_TX_TIMESTAMP:
+ valid_len = sizeof(struct virtchnl_phc_tx_tstamp);
+ break;
case VIRTCHNL_OP_ENABLE_QUEUES_V2:
case VIRTCHNL_OP_DISABLE_QUEUES_V2:
valid_len = sizeof(struct virtchnl_del_ena_dis_queues);
--
2.34.1
next prev parent reply other threads:[~2024-09-10 11:09 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-09-10 10:12 [PATCH v1 0/9] Update IAVF Base Driver Soumyadeep Hore
2024-09-10 10:12 ` Soumyadeep Hore [this message]
2024-09-10 10:12 ` [PATCH v1 2/9] common/iavf: add SyncE support over VF Soumyadeep Hore
2024-09-10 10:12 ` [PATCH v1 3/9] common/iavf: add GNSS " Soumyadeep Hore
2024-09-10 10:12 ` [PATCH v1 4/9] common/iavf: define the maximum MSIX index Soumyadeep Hore
2024-09-10 10:12 ` [PATCH v1 5/9] common/iavf: add commands for HQOS management Soumyadeep Hore
2024-09-10 10:12 ` [PATCH v1 6/9] common/iavf: add flex descriptor fields enum Soumyadeep Hore
2024-09-10 10:12 ` [PATCH v1 7/9] common/iavf: add RefSync support Soumyadeep Hore
2024-09-10 10:12 ` [PATCH v1 8/9] common/iavf: introduce QGRP capabilities to replace ADQ caps Soumyadeep Hore
2024-09-10 10:12 ` [PATCH v1 9/9] common/iavf: add RSS CONFIG hash function Soumyadeep Hore
2024-09-16 14:29 ` [PATCH v1 0/9] Update IAVF Base Driver Bruce Richardson
2024-09-17 14:24 ` Bruce Richardson
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