DPDK patches and discussions
 help / color / mirror / Atom feed
From: vanshika.shukla@nxp.com
To: dev@dpdk.org, Hemant Agrawal <hemant.agrawal@nxp.com>,
	Sachin Saxena <sachin.saxena@nxp.com>,
	Gagandeep Singh <g.singh@nxp.com>
Cc: Apeksha Gupta <apeksha.gupta@nxp.com>
Subject: [v1 08/43] bus/fslmc: upgrade with MC version 10.37
Date: Fri, 13 Sep 2024 11:29:24 +0530	[thread overview]
Message-ID: <20240913055959.3246917-9-vanshika.shukla@nxp.com> (raw)
In-Reply-To: <20240913055959.3246917-1-vanshika.shukla@nxp.com>

From: Gagandeep Singh <g.singh@nxp.com>

This patch upgrades the MC version compaitbility to 10.37

Signed-off-by: Gagandeep Singh <g.singh@nxp.com>
Signed-off-by: Apeksha Gupta <apeksha.gupta@nxp.com>
---
 doc/guides/platform/dpaa2.rst                 |   4 +-
 drivers/bus/fslmc/mc/dpio.c                   |  94 ++++-
 drivers/bus/fslmc/mc/fsl_dpcon.h              |   5 +-
 drivers/bus/fslmc/mc/fsl_dpio.h               |  21 +-
 drivers/bus/fslmc/mc/fsl_dpio_cmd.h           |  13 +-
 drivers/bus/fslmc/mc/fsl_dpmng.h              |   4 +-
 drivers/bus/fslmc/mc/fsl_dprc_cmd.h           |   8 +-
 .../bus/fslmc/qbman/include/fsl_qbman_debug.h |  12 +-
 drivers/bus/fslmc/version.map                 |   7 +
 drivers/crypto/dpaa2_sec/mc/dpseci.c          |  91 ++++-
 drivers/crypto/dpaa2_sec/mc/fsl_dpseci.h      |  47 ++-
 drivers/crypto/dpaa2_sec/mc/fsl_dpseci_cmd.h  |  19 +-
 drivers/net/dpaa2/dpaa2_ethdev.c              |  36 +-
 drivers/net/dpaa2/mc/dpdmux.c                 | 205 +++++++++-
 drivers/net/dpaa2/mc/dpkg.c                   |  12 +-
 drivers/net/dpaa2/mc/dpni.c                   | 383 +++++++++++++++++-
 drivers/net/dpaa2/mc/fsl_dpdmux.h             |  67 ++-
 drivers/net/dpaa2/mc/fsl_dpdmux_cmd.h         |  83 +++-
 drivers/net/dpaa2/mc/fsl_dpkg.h               |   7 +-
 drivers/net/dpaa2/mc/fsl_dpni.h               | 176 +++++---
 drivers/net/dpaa2/mc/fsl_dpni_cmd.h           | 125 ++++--
 21 files changed, 1267 insertions(+), 152 deletions(-)

diff --git a/doc/guides/platform/dpaa2.rst b/doc/guides/platform/dpaa2.rst
index 2b0d93a976..c9ec21334f 100644
--- a/doc/guides/platform/dpaa2.rst
+++ b/doc/guides/platform/dpaa2.rst
@@ -105,8 +105,8 @@ separately:
 
 Currently supported by DPDK:
 
-- NXP SDK **LSDK 19.09++**.
-- MC Firmware version **10.18.0** and higher.
+- NXP SDK **LSDK 21.08++**.
+- MC Firmware version **10.37.0** and higher.
 - Supported architectures:  **arm64 LE**.
 
 - Follow the DPDK :ref:`Getting Started Guide for Linux <linux_gsg>`
diff --git a/drivers/bus/fslmc/mc/dpio.c b/drivers/bus/fslmc/mc/dpio.c
index a3382ed142..97c08fa713 100644
--- a/drivers/bus/fslmc/mc/dpio.c
+++ b/drivers/bus/fslmc/mc/dpio.c
@@ -1,7 +1,7 @@
 /* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0)
  *
  * Copyright 2013-2016 Freescale Semiconductor Inc.
- * Copyright 2016-2017 NXP
+ * Copyright 2016-2023 NXP
  *
  */
 #include <fsl_mc_sys.h>
@@ -376,6 +376,98 @@ int dpio_get_stashing_destination(struct fsl_mc_io *mc_io,
 	return 0;
 }
 
+/**
+ * dpio_set_stashing_destination_by_core_id() - Set the stashing destination source
+ * using the core id.
+ * @mc_io:	Pointer to MC portal's I/O object
+ * @cmd_flags:	Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token:	Token of DPIO object
+ * @core_id:	Core id stashing destination
+ *
+ * Return:	'0' on Success; Error code otherwise.
+ */
+int dpio_set_stashing_destination_by_core_id(struct fsl_mc_io *mc_io,
+					uint32_t cmd_flags,
+					uint16_t token,
+					uint8_t core_id)
+{
+	struct dpio_stashing_dest_by_core_id *cmd_params;
+	struct mc_command cmd = { 0 };
+
+	/* prepare command */
+	cmd.header = mc_encode_cmd_header(DPIO_CMDID_SET_STASHING_DEST_BY_CORE_ID,
+										cmd_flags,
+										token);
+	cmd_params = (struct dpio_stashing_dest_by_core_id  *)cmd.params;
+	cmd_params->core_id = core_id;
+
+	/* send command to mc*/
+	return mc_send_command(mc_io, &cmd);
+}
+
+/**
+ * dpio_set_stashing_destination_source() - Set the stashing destination source.
+ * @mc_io:	Pointer to MC portal's I/O object
+ * @cmd_flags:	Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token:	Token of DPIO object
+ * @ss:		Stashing destination source (0 manual/1 automatic)
+ *
+ * Return:	'0' on Success; Error code otherwise.
+ */
+int dpio_set_stashing_destination_source(struct fsl_mc_io *mc_io,
+				  uint32_t cmd_flags,
+				  uint16_t token,
+				  uint8_t ss)
+{
+	struct dpio_stashing_dest_source *cmd_params;
+	struct mc_command cmd = { 0 };
+
+	/* prepare command */
+	cmd.header = mc_encode_cmd_header(DPIO_CMDID_SET_STASHING_DEST_SOURCE,
+					  cmd_flags,
+					  token);
+	cmd_params = (struct dpio_stashing_dest_source *)cmd.params;
+	cmd_params->ss = ss;
+
+	/* send command to mc*/
+	return mc_send_command(mc_io, &cmd);
+}
+
+/**
+ * dpio_get_stashing_destination_source() - Get the stashing destination source.
+ * @mc_io:	Pointer to MC portal's I/O object
+ * @cmd_flags:	Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token:	Token of DPIO object
+ * @ss:		Returns the stashing destination source (0 manual/1 automatic)
+ *
+ * Return:	'0' on Success; Error code otherwise.
+ */
+int dpio_get_stashing_destination_source(struct fsl_mc_io *mc_io,
+				  uint32_t cmd_flags,
+				  uint16_t token,
+				  uint8_t *ss)
+{
+	struct dpio_stashing_dest_source *rsp_params;
+	struct mc_command cmd = { 0 };
+	int err;
+
+	/* prepare command */
+	cmd.header = mc_encode_cmd_header(DPIO_CMDID_GET_STASHING_DEST_SOURCE,
+					  cmd_flags,
+					  token);
+
+	/* send command to mc*/
+	err = mc_send_command(mc_io, &cmd);
+	if (err)
+		return err;
+
+	/* retrieve response parameters */
+	rsp_params = (struct dpio_stashing_dest_source *)cmd.params;
+	*ss = rsp_params->ss;
+
+	return 0;
+}
+
 /**
  * dpio_add_static_dequeue_channel() - Add a static dequeue channel.
  * @mc_io:		Pointer to MC portal's I/O object
diff --git a/drivers/bus/fslmc/mc/fsl_dpcon.h b/drivers/bus/fslmc/mc/fsl_dpcon.h
index 34b30d15c2..e3a626077e 100644
--- a/drivers/bus/fslmc/mc/fsl_dpcon.h
+++ b/drivers/bus/fslmc/mc/fsl_dpcon.h
@@ -1,7 +1,7 @@
 /* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0)
  *
  * Copyright 2013-2016 Freescale Semiconductor Inc.
- * Copyright 2017-2021 NXP
+ * Copyright 2017-2021, 2024 NXP
  *
  */
 #ifndef __FSL_DPCON_H
@@ -52,10 +52,12 @@ int dpcon_destroy(struct fsl_mc_io *mc_io,
 		  uint32_t cmd_flags,
 		  uint32_t obj_id);
 
+__rte_internal
 int dpcon_enable(struct fsl_mc_io *mc_io,
 		 uint32_t cmd_flags,
 		 uint16_t token);
 
+__rte_internal
 int dpcon_disable(struct fsl_mc_io *mc_io,
 		  uint32_t cmd_flags,
 		  uint16_t token);
@@ -65,6 +67,7 @@ int dpcon_is_enabled(struct fsl_mc_io *mc_io,
 		     uint16_t token,
 		     int *en);
 
+__rte_internal
 int dpcon_reset(struct fsl_mc_io *mc_io,
 		uint32_t cmd_flags,
 		uint16_t token);
diff --git a/drivers/bus/fslmc/mc/fsl_dpio.h b/drivers/bus/fslmc/mc/fsl_dpio.h
index c2db76bdf8..eddce58a5f 100644
--- a/drivers/bus/fslmc/mc/fsl_dpio.h
+++ b/drivers/bus/fslmc/mc/fsl_dpio.h
@@ -1,7 +1,7 @@
 /* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0)
  *
  * Copyright 2013-2016 Freescale Semiconductor Inc.
- * Copyright 2016-2017 NXP
+ * Copyright 2016-2023 NXP
  *
  */
 #ifndef __FSL_DPIO_H
@@ -87,11 +87,30 @@ int dpio_set_stashing_destination(struct fsl_mc_io *mc_io,
 				  uint16_t token,
 				  uint8_t sdest);
 
+__rte_internal
 int dpio_get_stashing_destination(struct fsl_mc_io *mc_io,
 				  uint32_t cmd_flags,
 				  uint16_t token,
 				  uint8_t *sdest);
 
+__rte_internal
+int dpio_set_stashing_destination_by_core_id(struct fsl_mc_io *mc_io,
+				  uint32_t cmd_flags,
+				  uint16_t token,
+				  uint8_t core_id);
+
+__rte_internal
+int dpio_set_stashing_destination_source(struct fsl_mc_io *mc_io,
+				  uint32_t cmd_flags,
+				  uint16_t token,
+				  uint8_t ss);
+
+__rte_internal
+int dpio_get_stashing_destination_source(struct fsl_mc_io *mc_io,
+				  uint32_t cmd_flags,
+				  uint16_t token,
+				  uint8_t *ss);
+
 __rte_internal
 int dpio_add_static_dequeue_channel(struct fsl_mc_io *mc_io,
 				    uint32_t cmd_flags,
diff --git a/drivers/bus/fslmc/mc/fsl_dpio_cmd.h b/drivers/bus/fslmc/mc/fsl_dpio_cmd.h
index 45ed01f809..360c68eaa5 100644
--- a/drivers/bus/fslmc/mc/fsl_dpio_cmd.h
+++ b/drivers/bus/fslmc/mc/fsl_dpio_cmd.h
@@ -1,7 +1,7 @@
 /* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0)
  *
  * Copyright 2013-2016 Freescale Semiconductor Inc.
- * Copyright 2016-2019 NXP
+ * Copyright 2016-2023 NXP
  *
  */
 #ifndef _FSL_DPIO_CMD_H
@@ -40,6 +40,9 @@
 #define DPIO_CMDID_GET_STASHING_DEST			DPIO_CMD(0x121)
 #define DPIO_CMDID_ADD_STATIC_DEQUEUE_CHANNEL		DPIO_CMD(0x122)
 #define DPIO_CMDID_REMOVE_STATIC_DEQUEUE_CHANNEL	DPIO_CMD(0x123)
+#define DPIO_CMDID_SET_STASHING_DEST_SOURCE		DPIO_CMD(0x124)
+#define DPIO_CMDID_GET_STASHING_DEST_SOURCE		DPIO_CMD(0x125)
+#define DPIO_CMDID_SET_STASHING_DEST_BY_CORE_ID		DPIO_CMD(0x126)
 
 /* Macros for accessing command fields smaller than 1byte */
 #define DPIO_MASK(field)        \
@@ -98,6 +101,14 @@ struct dpio_stashing_dest {
 	uint8_t sdest;
 };
 
+struct dpio_stashing_dest_source {
+	uint8_t ss;
+};
+
+struct dpio_stashing_dest_by_core_id {
+	uint8_t core_id;
+};
+
 struct dpio_cmd_static_dequeue_channel {
 	uint32_t dpcon_id;
 };
diff --git a/drivers/bus/fslmc/mc/fsl_dpmng.h b/drivers/bus/fslmc/mc/fsl_dpmng.h
index c6ea220df7..dfa51b3a86 100644
--- a/drivers/bus/fslmc/mc/fsl_dpmng.h
+++ b/drivers/bus/fslmc/mc/fsl_dpmng.h
@@ -1,7 +1,7 @@
 /* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0)
  *
  * Copyright 2013-2015 Freescale Semiconductor Inc.
- * Copyright 2017-2022 NXP
+ * Copyright 2017-2023 NXP
  *
  */
 #ifndef __FSL_DPMNG_H
@@ -20,7 +20,7 @@ struct fsl_mc_io;
  * Management Complex firmware version information
  */
 #define MC_VER_MAJOR 10
-#define MC_VER_MINOR 32
+#define MC_VER_MINOR 37
 
 /**
  * struct mc_version
diff --git a/drivers/bus/fslmc/mc/fsl_dprc_cmd.h b/drivers/bus/fslmc/mc/fsl_dprc_cmd.h
index 6efa5634d2..d5ba35b5f0 100644
--- a/drivers/bus/fslmc/mc/fsl_dprc_cmd.h
+++ b/drivers/bus/fslmc/mc/fsl_dprc_cmd.h
@@ -1,7 +1,7 @@
 /* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0)
  *
  * Copyright 2013-2016 Freescale Semiconductor Inc.
- * Copyright 2016-2021 NXP
+ * Copyright 2016-2023 NXP
  *
  */
 
@@ -10,13 +10,17 @@
 
 /* Minimal supported DPRC Version */
 #define DPRC_VER_MAJOR			6
-#define DPRC_VER_MINOR			6
+#define DPRC_VER_MINOR			7
 
 /* Command versioning */
 #define DPRC_CMD_BASE_VERSION			1
+#define DPRC_CMD_VERSION_2			2
+#define DPRC_CMD_VERSION_3			3
 #define DPRC_CMD_ID_OFFSET			4
 
 #define DPRC_CMD(id)	((id << DPRC_CMD_ID_OFFSET) | DPRC_CMD_BASE_VERSION)
+#define DPRC_CMD_V2(id)	(((id) << DPRC_CMD_ID_OFFSET) | DPRC_CMD_VERSION_2)
+#define DPRC_CMD_V3(id)	(((id) << DPRC_CMD_ID_OFFSET) | DPRC_CMD_VERSION_3)
 
 /* Command IDs */
 #define DPRC_CMDID_CLOSE                        DPRC_CMD(0x800)
diff --git a/drivers/bus/fslmc/qbman/include/fsl_qbman_debug.h b/drivers/bus/fslmc/qbman/include/fsl_qbman_debug.h
index 18b6a3c2e4..297d4ed4fc 100644
--- a/drivers/bus/fslmc/qbman/include/fsl_qbman_debug.h
+++ b/drivers/bus/fslmc/qbman/include/fsl_qbman_debug.h
@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: BSD-3-Clause
  * Copyright (C) 2015 Freescale Semiconductor, Inc.
- * Copyright 2018-2020 NXP
+ * Copyright 2018-2023 NXP
  */
 #ifndef _FSL_QBMAN_DEBUG_H
 #define _FSL_QBMAN_DEBUG_H
@@ -105,16 +105,6 @@ uint32_t qbman_fq_attr_get_vfqid(struct qbman_fq_query_rslt *r);
 uint32_t qbman_fq_attr_get_erfqid(struct qbman_fq_query_rslt *r);
 uint16_t qbman_fq_attr_get_opridsz(struct qbman_fq_query_rslt *r);
 
-/* FQ query command for non-programmable fields*/
-enum qbman_fq_schedstate_e {
-	qbman_fq_schedstate_oos = 0,
-	qbman_fq_schedstate_retired,
-	qbman_fq_schedstate_tentatively_scheduled,
-	qbman_fq_schedstate_truly_scheduled,
-	qbman_fq_schedstate_parked,
-	qbman_fq_schedstate_held_active,
-};
-
 struct qbman_fq_query_np_rslt {
 uint8_t verb;
 	uint8_t rslt;
diff --git a/drivers/bus/fslmc/version.map b/drivers/bus/fslmc/version.map
index 01e28c6625..df1143733d 100644
--- a/drivers/bus/fslmc/version.map
+++ b/drivers/bus/fslmc/version.map
@@ -37,6 +37,9 @@ INTERNAL {
 	dpcon_get_attributes;
 	dpcon_open;
 	dpcon_close;
+	dpcon_reset;
+	dpcon_enable;
+	dpcon_disable;
 	dpdmai_close;
 	dpdmai_disable;
 	dpdmai_enable;
@@ -53,7 +56,11 @@ INTERNAL {
 	dpio_open;
 	dpio_remove_static_dequeue_channel;
 	dpio_reset;
+	dpio_get_stashing_destination;
+	dpio_get_stashing_destination_source;
 	dpio_set_stashing_destination;
+	dpio_set_stashing_destination_by_core_id;
+	dpio_set_stashing_destination_source;
 	mc_get_soc_version;
 	mc_get_version;
 	mc_send_command;
diff --git a/drivers/crypto/dpaa2_sec/mc/dpseci.c b/drivers/crypto/dpaa2_sec/mc/dpseci.c
index 87e0defdc6..773b4648e0 100644
--- a/drivers/crypto/dpaa2_sec/mc/dpseci.c
+++ b/drivers/crypto/dpaa2_sec/mc/dpseci.c
@@ -1,7 +1,7 @@
 /* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0)
  *
  * Copyright 2013-2016 Freescale Semiconductor Inc.
- * Copyright 2016 NXP
+ * Copyright 2016-2023 NXP
  *
  */
 #include <fsl_mc_sys.h>
@@ -763,3 +763,92 @@ int dpseci_get_congestion_notification(
 
 	return 0;
 }
+
+
+/**
+ * dpseci_get_rx_queue_status() - Get queue status attributes
+ * @mc_io:	Pointer to MC portal's I/O object
+ * @cmd_flags:	Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token:	Token of DPSECI object
+ * @queue_index:	Select the queue_index
+ * @attr:	Returned queue status attributes
+ *
+ * Return:	'0' on success, error code otherwise
+ */
+int dpseci_get_rx_queue_status(struct fsl_mc_io *mc_io,
+				uint32_t cmd_flags,
+				uint16_t token,
+				uint32_t queue_index,
+				struct dpseci_queue_status *attr)
+{
+	struct dpseci_rsp_get_queue_status *rsp_params;
+	struct dpseci_cmd_get_queue_status *cmd_params;
+	struct mc_command cmd = { 0 };
+	int err;
+
+	/* prepare command */
+	cmd.header = mc_encode_cmd_header(DPSECI_CMDID_GET_RX_QUEUE_STATUS,
+					  cmd_flags,
+					  token);
+	cmd_params = (struct dpseci_cmd_get_queue_status *)cmd.params;
+	cmd_params->queue_index = cpu_to_le32(queue_index);
+
+	/* send command to mc*/
+	err = mc_send_command(mc_io, &cmd);
+	if (err)
+		return err;
+
+	/* retrieve response parameters */
+	rsp_params = (struct dpseci_rsp_get_queue_status *)cmd.params;
+	attr->fqid = le32_to_cpu(rsp_params->fqid);
+	attr->schedstate = (enum qbman_fq_schedstate_e)(le16_to_cpu(rsp_params->schedstate));
+	attr->state_flags = le16_to_cpu(rsp_params->state_flags);
+	attr->frame_count = le32_to_cpu(rsp_params->frame_count);
+	attr->byte_count = le32_to_cpu(rsp_params->byte_count);
+
+	return 0;
+}
+
+/**
+ * dpseci_get_tx_queue_status() - Get queue status attributes
+ * @mc_io:	Pointer to MC portal's I/O object
+ * @cmd_flags:	Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token:	Token of DPSECI object
+ * @queue_index:	Select the queue_index
+ * @attr:	Returned queue status attributes
+ *
+ * Return:	'0' on success, error code otherwise
+ */
+int dpseci_get_tx_queue_status(struct fsl_mc_io *mc_io,
+				uint32_t cmd_flags,
+				uint16_t token,
+				uint32_t queue_index,
+				struct dpseci_queue_status *attr)
+{
+	struct dpseci_rsp_get_queue_status *rsp_params;
+	struct dpseci_cmd_get_queue_status *cmd_params;
+	struct mc_command cmd = { 0 };
+	int err;
+
+	/* prepare command */
+	cmd.header = mc_encode_cmd_header(DPSECI_CMDID_GET_TX_QUEUE_STATUS,
+					  cmd_flags,
+					  token);
+	cmd_params = (struct dpseci_cmd_get_queue_status *)cmd.params;
+	cmd_params->queue_index = cpu_to_le32(queue_index);
+
+	/* send command to mc*/
+	err = mc_send_command(mc_io, &cmd);
+	if (err)
+		return err;
+
+	/* retrieve response parameters */
+	rsp_params = (struct dpseci_rsp_get_queue_status *)cmd.params;
+	attr->fqid = le32_to_cpu(rsp_params->fqid);
+	attr->schedstate = (enum qbman_fq_schedstate_e)(le16_to_cpu(rsp_params->schedstate));
+	attr->state_flags = le16_to_cpu(rsp_params->state_flags);
+	attr->frame_count = le32_to_cpu(rsp_params->frame_count);
+	attr->byte_count = le32_to_cpu(rsp_params->byte_count);
+
+	return 0;
+}
diff --git a/drivers/crypto/dpaa2_sec/mc/fsl_dpseci.h b/drivers/crypto/dpaa2_sec/mc/fsl_dpseci.h
index c295c04f24..e371abdd64 100644
--- a/drivers/crypto/dpaa2_sec/mc/fsl_dpseci.h
+++ b/drivers/crypto/dpaa2_sec/mc/fsl_dpseci.h
@@ -1,7 +1,7 @@
 /* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0)
  *
  * Copyright 2013-2016 Freescale Semiconductor Inc.
- * Copyright 2016-2020 NXP
+ * Copyright 2016-2023 NXP
  *
  */
 #ifndef __FSL_DPSECI_H
@@ -429,4 +429,49 @@ int dpseci_get_congestion_notification(
 			uint16_t token,
 			struct dpseci_congestion_notification_cfg *cfg);
 
+/* Available FQ's scheduling states */
+enum qbman_fq_schedstate_e {
+	qbman_fq_schedstate_oos = 0,
+	qbman_fq_schedstate_retired,
+	qbman_fq_schedstate_tentatively_scheduled,
+	qbman_fq_schedstate_truly_scheduled,
+	qbman_fq_schedstate_parked,
+	qbman_fq_schedstate_held_active,
+};
+
+/* FQ's force eligible pending bit */
+#define DPSECI_FQ_STATE_FORCE_ELIGIBLE			0x00000001
+/* FQ's XON/XOFF state, 0: XON, 1: XOFF */
+#define DPSECI_FQ_STATE_XOFF					0x00000002
+/* FQ's retirement pending bit */
+#define DPSECI_FQ_STATE_RETIREMENT_PENDING		0x00000004
+/* FQ's overflow error bit */
+#define DPSECI_FQ_STATE_OVERFLOW_ERROR			0x00000008
+
+struct dpseci_queue_status {
+	uint32_t fqid;
+	/* FQ's scheduling states
+	 * (available scheduling states are defined in qbman_fq_schedstate_e)
+	 */
+	enum qbman_fq_schedstate_e schedstate;
+	/* FQ's state flags (available flags are defined above) */
+	uint16_t state_flags;
+	/* FQ's frame count */
+	uint32_t frame_count;
+	/* FQ's byte count */
+	uint32_t byte_count;
+};
+
+int dpseci_get_rx_queue_status(struct fsl_mc_io *mc_io,
+				uint32_t cmd_flags,
+				uint16_t token,
+				uint32_t queue_index,
+				struct dpseci_queue_status *attr);
+
+int dpseci_get_tx_queue_status(struct fsl_mc_io *mc_io,
+				uint32_t cmd_flags,
+				uint16_t token,
+				uint32_t queue_index,
+				struct dpseci_queue_status *attr);
+
 #endif /* __FSL_DPSECI_H */
diff --git a/drivers/crypto/dpaa2_sec/mc/fsl_dpseci_cmd.h b/drivers/crypto/dpaa2_sec/mc/fsl_dpseci_cmd.h
index af3518a0f3..065464b701 100644
--- a/drivers/crypto/dpaa2_sec/mc/fsl_dpseci_cmd.h
+++ b/drivers/crypto/dpaa2_sec/mc/fsl_dpseci_cmd.h
@@ -1,7 +1,7 @@
 /* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0)
  *
  * Copyright 2013-2016 Freescale Semiconductor Inc.
- * Copyright 2016-2017 NXP
+ * Copyright 2016-2023 NXP
  *
  */
 #ifndef _FSL_DPSECI_CMD_H
@@ -9,7 +9,7 @@
 
 /* DPSECI Version */
 #define DPSECI_VER_MAJOR		5
-#define DPSECI_VER_MINOR		3
+#define DPSECI_VER_MINOR		4
 
 /* Command versioning */
 #define DPSECI_CMD_BASE_VERSION		1
@@ -46,6 +46,9 @@
 #define DPSECI_CMDID_GET_OPR		DPSECI_CMD_V1(0x19B)
 #define DPSECI_CMDID_SET_CONGESTION_NOTIFICATION	DPSECI_CMD_V1(0x170)
 #define DPSECI_CMDID_GET_CONGESTION_NOTIFICATION	DPSECI_CMD_V1(0x171)
+#define DPSECI_CMDID_GET_RX_QUEUE_STATUS	DPSECI_CMD_V1(0x172)
+#define DPSECI_CMDID_GET_TX_QUEUE_STATUS	DPSECI_CMD_V1(0x173)
+
 
 /* Macros for accessing command fields smaller than 1byte */
 #define DPSECI_MASK(field)        \
@@ -251,5 +254,17 @@ struct dpseci_cmd_set_congestion_notification {
 	uint32_t threshold_exit;
 };
 
+struct dpseci_cmd_get_queue_status {
+	uint32_t queue_index;
+};
+
+struct dpseci_rsp_get_queue_status {
+	uint32_t fqid;
+	uint16_t schedstate;
+	uint16_t state_flags;
+	uint32_t frame_count;
+	uint32_t byte_count;
+};
+
 #pragma pack(pop)
 #endif /* _FSL_DPSECI_CMD_H */
diff --git a/drivers/net/dpaa2/dpaa2_ethdev.c b/drivers/net/dpaa2/dpaa2_ethdev.c
index efba9ef286..4dc7a82b47 100644
--- a/drivers/net/dpaa2/dpaa2_ethdev.c
+++ b/drivers/net/dpaa2/dpaa2_ethdev.c
@@ -896,6 +896,7 @@ dpaa2_dev_tx_queue_setup(struct rte_eth_dev *dev,
 	struct dpni_queue tx_conf_cfg;
 	struct dpni_queue tx_flow_cfg;
 	uint8_t options = 0, flow_id;
+	uint8_t ceetm_ch_idx;
 	uint16_t channel_id;
 	struct dpni_queue_id qid;
 	uint32_t tc_id;
@@ -922,20 +923,27 @@ dpaa2_dev_tx_queue_setup(struct rte_eth_dev *dev,
 	memset(&tx_conf_cfg, 0, sizeof(struct dpni_queue));
 	memset(&tx_flow_cfg, 0, sizeof(struct dpni_queue));
 
-	if (tx_queue_id == 0) {
-		/*Set tx-conf and error configuration*/
-		if (priv->flags & DPAA2_TX_CONF_ENABLE)
-			ret = dpni_set_tx_confirmation_mode(dpni, CMD_PRI_LOW,
-							    priv->token,
-							    DPNI_CONF_AFFINE);
-		else
-			ret = dpni_set_tx_confirmation_mode(dpni, CMD_PRI_LOW,
-							    priv->token,
-							    DPNI_CONF_DISABLE);
-		if (ret) {
-			DPAA2_PMD_ERR("Error in set tx conf mode settings: "
-				      "err=%d", ret);
-			return -1;
+	if (!tx_queue_id) {
+		for (ceetm_ch_idx = 0;
+			ceetm_ch_idx <= (priv->num_channels - 1);
+			ceetm_ch_idx++) {
+			/*Set tx-conf and error configuration*/
+			if (priv->flags & DPAA2_TX_CONF_ENABLE) {
+				ret = dpni_set_tx_confirmation_mode(dpni,
+						CMD_PRI_LOW, priv->token,
+						ceetm_ch_idx,
+						DPNI_CONF_AFFINE);
+			} else {
+				ret = dpni_set_tx_confirmation_mode(dpni,
+						CMD_PRI_LOW, priv->token,
+						ceetm_ch_idx,
+						DPNI_CONF_DISABLE);
+			}
+			if (ret) {
+				DPAA2_PMD_ERR("Error(%d) in tx conf setting",
+					ret);
+				return ret;
+			}
 		}
 	}
 
diff --git a/drivers/net/dpaa2/mc/dpdmux.c b/drivers/net/dpaa2/mc/dpdmux.c
index 1bb153cad7..f4feef3840 100644
--- a/drivers/net/dpaa2/mc/dpdmux.c
+++ b/drivers/net/dpaa2/mc/dpdmux.c
@@ -1,7 +1,7 @@
 /* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0)
  *
  * Copyright 2013-2016 Freescale Semiconductor Inc.
- * Copyright 2018-2021 NXP
+ * Copyright 2018-2023 NXP
  *
  */
 #include <fsl_mc_sys.h>
@@ -287,15 +287,19 @@ int dpdmux_reset(struct fsl_mc_io *mc_io,
  * @token:	Token of DPDMUX object
  * @skip_reset_flags:	By default all are 0.
  *			By setting 1 will deactivate the reset.
- *	The flags are:
- *			DPDMUX_SKIP_DEFAULT_INTERFACE  0x01
- *			DPDMUX_SKIP_UNICAST_RULES      0x02
- *			DPDMUX_SKIP_MULTICAST_RULES    0x04
+ * The flags are:
+ *			DPDMUX_SKIP_MODIFY_DEFAULT_INTERFACE  0x01
+ *			DPDMUX_SKIP_UNICAST_RULES             0x02
+ *			DPDMUX_SKIP_MULTICAST_RULES           0x04
+ *			DPDMUX_SKIP_RESET_DEFAULT_INTERFACE   0x08
  *
  * For example, by default, through DPDMUX_RESET the default
  * interface will be restored with the one from create.
- * By setting DPDMUX_SKIP_DEFAULT_INTERFACE flag,
- * through DPDMUX_RESET the default interface will not be modified.
+ * By setting DPDMUX_SKIP_MODIFY_DEFAULT_INTERFACE flag,
+ * through DPDMUX_RESET the default interface will not be modified after reset.
+ * By setting DPDMUX_SKIP_RESET_DEFAULT_INTERFACE flag,
+ * through DPDMUX_RESET the default interface will not be reset
+ * and will continue to be functional during reset procedure.
  *
  * Return:	'0' on Success; Error code otherwise.
  */
@@ -327,10 +331,11 @@ int dpdmux_set_resetable(struct fsl_mc_io *mc_io,
  * @token:	Token of DPDMUX object
  * @skip_reset_flags:	Get the reset flags.
  *
- *	The flags are:
- *			DPDMUX_SKIP_DEFAULT_INTERFACE  0x01
- *			DPDMUX_SKIP_UNICAST_RULES      0x02
- *			DPDMUX_SKIP_MULTICAST_RULES    0x04
+ * The flags are:
+ *			DPDMUX_SKIP_MODIFY_DEFAULT_INTERFACE  0x01
+ *			DPDMUX_SKIP_UNICAST_RULES             0x02
+ *			DPDMUX_SKIP_MULTICAST_RULES           0x04
+ *			DPDMUX_SKIP_RESET_DEFAULT_INTERFACE   0x08
  *
  * Return:	'0' on Success; Error code otherwise.
  */
@@ -1064,6 +1069,127 @@ int dpdmux_get_api_version(struct fsl_mc_io *mc_io,
 	return 0;
 }
 
+/**
+ * dpdmux_if_set_taildrop() - enable taildrop for egress interface queues.
+ * @mc_io:	Pointer to MC portal's I/O object
+ * @cmd_flags:	Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token:	Token of DPDMUX object
+ * @if_id:	Interface Identifier
+ * @cfg: Taildrop configuration
+ */
+int dpdmux_if_set_taildrop(struct fsl_mc_io *mc_io, uint32_t cmd_flags, uint16_t token,
+			      uint16_t if_id, struct dpdmux_taildrop_cfg *cfg)
+{
+	struct mc_command cmd = { 0 };
+	struct dpdmux_cmd_set_taildrop *cmd_params;
+
+	/* prepare command */
+	cmd.header = mc_encode_cmd_header(DPDMUX_CMDID_IF_SET_TAILDROP,
+			cmd_flags,
+			token);
+	cmd_params = (struct dpdmux_cmd_set_taildrop *)cmd.params;
+	cmd_params->if_id		= cpu_to_le16(if_id);
+	cmd_params->units		= cfg->units;
+	cmd_params->threshold	= cpu_to_le32(cfg->threshold);
+	dpdmux_set_field(cmd_params->oal_en, ENABLE, (!!cfg->enable));
+
+	return mc_send_command(mc_io, &cmd);
+}
+
+/**
+ * dpdmux_if_get_taildrop() - get current taildrop configuration.
+ * @mc_io:	Pointer to MC portal's I/O object
+ * @cmd_flags:	Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token:	Token of DPDMUX object
+ * @if_id:	Interface Identifier
+ * @cfg: Taildrop configuration
+ */
+int dpdmux_if_get_taildrop(struct fsl_mc_io *mc_io, uint32_t cmd_flags, uint16_t token,
+			      uint16_t if_id, struct dpdmux_taildrop_cfg *cfg)
+{
+	struct mc_command cmd = {0};
+	struct dpdmux_cmd_get_taildrop *cmd_params;
+	struct dpdmux_rsp_get_taildrop *rsp_params;
+	int err = 0;
+
+	/* prepare command */
+	cmd.header = mc_encode_cmd_header(DPDMUX_CMDID_IF_GET_TAILDROP,
+			cmd_flags,
+			token);
+	cmd_params = (struct dpdmux_cmd_get_taildrop *)cmd.params;
+	cmd_params->if_id	= cpu_to_le16(if_id);
+
+	err = mc_send_command(mc_io, &cmd);
+	if (err)
+		return err;
+
+	/* retrieve response parameters */
+	rsp_params = (struct dpdmux_rsp_get_taildrop *)cmd.params;
+	cfg->threshold = le32_to_cpu(rsp_params->threshold);
+	cfg->units = rsp_params->units;
+	cfg->enable = dpdmux_get_field(rsp_params->oal_en, ENABLE);
+
+	return err;
+}
+
+/**
+ * dpdmux_dump_table() - Dump the content of table_type table into memory.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token: Token of DPSW object
+ * @table_type: The type of the table to dump
+ *	- DPDMUX_DMAT_TABLE
+ *	- DPDMUX_MISS_TABLE
+ *	- DPDMUX_PRUNE_TABLE
+ * @table_index: The index of the table to dump in case of more than one table
+ *	if table_type == DPDMUX_DMAT_TABLE
+ *		- DPDMUX_HMAP_UNICAST
+ *		- DPDMUX_HMAP_MULTICAST
+ *	else 0
+ * @iova_addr: The snapshot will be stored in this variable as an header of struct dump_table_header
+ *             followed by an array of struct dump_table_entry
+ * @iova_size: Memory size allocated for iova_addr
+ * @num_entries: Number of entries written in iova_addr
+ *
+ * Return: Completion status. '0' on Success; Error code otherwise.
+ *
+ * The memory allocated at iova_addr must be zeroed before command execution.
+ * If the table content exceeds the memory size provided the dump will be truncated.
+ */
+int dpdmux_dump_table(struct fsl_mc_io *mc_io,
+			 uint32_t cmd_flags,
+			 uint16_t token,
+			 uint16_t table_type,
+			 uint16_t table_index,
+			 uint64_t iova_addr,
+			 uint32_t iova_size,
+			 uint16_t *num_entries)
+{
+	struct mc_command cmd = { 0 };
+	int err;
+	struct dpdmux_cmd_dump_table *cmd_params;
+	struct dpdmux_rsp_dump_table *rsp_params;
+
+	/* prepare command */
+	cmd.header = mc_encode_cmd_header(DPDMUX_CMDID_DUMP_TABLE, cmd_flags, token);
+	cmd_params = (struct dpdmux_cmd_dump_table *)cmd.params;
+	cmd_params->table_type = cpu_to_le16(table_type);
+	cmd_params->table_index = cpu_to_le16(table_index);
+	cmd_params->iova_addr = cpu_to_le64(iova_addr);
+	cmd_params->iova_size = cpu_to_le32(iova_size);
+
+	/* send command to mc*/
+	err = mc_send_command(mc_io, &cmd);
+	if (err)
+		return err;
+
+	rsp_params = (struct dpdmux_rsp_dump_table *)cmd.params;
+	*num_entries = le16_to_cpu(rsp_params->num_entries);
+
+	return 0;
+}
+
+
 /**
  * dpdmux_if_set_errors_behavior() - Set errors behavior
  * @cmd_flags:	Command flags; one or more of 'MC_CMD_FLAG_'
@@ -1100,3 +1226,60 @@ int dpdmux_if_set_errors_behavior(struct fsl_mc_io *mc_io, uint32_t cmd_flags,
 	/* send command to mc*/
 	return mc_send_command(mc_io, &cmd);
 }
+
+/* Sets up a Soft Parser Profile on this DPDMUX
+ * @mc_io:	Pointer to MC portal's I/O object
+ * @cmd_flags:	Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token:	Token of DPDMUX object
+ * @sp_profile: Soft Parser Profile name (must a valid name for a defined profile)
+ *			Maximum allowed length for this string is 8 characters long
+ *			If this parameter is empty string (all zeros)
+ *			then the Default SP Profile is set on this dpdmux
+ * @type: one of the SP Profile types defined above: Ingress or Egress (or both using bitwise OR)
+ */
+int dpdmux_set_sp_profile(struct fsl_mc_io *mc_io, uint32_t cmd_flags, uint16_t token,
+		uint8_t sp_profile[], uint8_t type)
+{
+	struct dpdmux_cmd_set_sp_profile *cmd_params;
+	struct mc_command cmd = { 0 };
+	int i;
+
+	/* prepare command */
+	cmd.header = mc_encode_cmd_header(DPDMUX_CMDID_SET_SP_PROFILE,
+			cmd_flags, token);
+
+	cmd_params = (struct dpdmux_cmd_set_sp_profile *)cmd.params;
+	for (i = 0; i < MAX_SP_PROFILE_ID_SIZE && sp_profile[i]; i++)
+		cmd_params->sp_profile[i] = sp_profile[i];
+	cmd_params->type = type;
+
+	/* send command to MC */
+	return mc_send_command(mc_io, &cmd);
+}
+
+/* Enable/Disable Soft Parser on this DPDMUX interface
+ * @mc_io:	Pointer to MC portal's I/O object
+ * @cmd_flags:	Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token:	Token of DPDMUX object
+ * @if_id: interface id
+ * @type: one of the SP Profile types defined above: Ingress or Egress (or both using bitwise OR)
+ * @en: 1 to enable or 0 to disable
+ */
+int dpdmux_sp_enable(struct fsl_mc_io *mc_io, uint32_t cmd_flags, uint16_t token,
+		uint16_t if_id, uint8_t type, uint8_t en)
+{
+	struct dpdmux_cmd_sp_enable *cmd_params;
+	struct mc_command cmd = { 0 };
+
+	/* prepare command */
+	cmd.header = mc_encode_cmd_header(DPDMUX_CMDID_SP_ENABLE,
+			cmd_flags, token);
+
+	cmd_params = (struct dpdmux_cmd_sp_enable *)cmd.params;
+	cmd_params->if_id = if_id;
+	cmd_params->type = type;
+	cmd_params->en = en;
+
+	/* send command to MC */
+	return mc_send_command(mc_io, &cmd);
+}
diff --git a/drivers/net/dpaa2/mc/dpkg.c b/drivers/net/dpaa2/mc/dpkg.c
index 4789976b7d..5db3d092c1 100644
--- a/drivers/net/dpaa2/mc/dpkg.c
+++ b/drivers/net/dpaa2/mc/dpkg.c
@@ -1,16 +1,18 @@
 /* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0)
  *
- * Copyright 2017-2021 NXP
+ * Copyright 2017-2021, 2023 NXP
  *
  */
 #include <fsl_mc_sys.h>
 #include <fsl_mc_cmd.h>
 #include <fsl_dpkg.h>
+#include <string.h>
 
 /**
  * dpkg_prepare_key_cfg() - function prepare extract parameters
  * @cfg: defining a full Key Generation profile (rule)
- * @key_cfg_buf: Zeroed 256 bytes of memory before mapping it to DMA
+ * @key_cfg_buf: Zeroed memory whose size is sizeo of
+ *		"struct dpni_ext_set_rx_tc_dist" before mapping it to DMA
  *
  * This function has to be called before the following functions:
  *	- dpni_set_rx_tc_dist()
@@ -18,7 +20,8 @@
  *	- dpkg_prepare_key_cfg()
  */
 int
-dpkg_prepare_key_cfg(const struct dpkg_profile_cfg *cfg, uint8_t *key_cfg_buf)
+dpkg_prepare_key_cfg(const struct dpkg_profile_cfg *cfg,
+	void *key_cfg_buf)
 {
 	int i, j;
 	struct dpni_ext_set_rx_tc_dist *dpni_ext;
@@ -27,11 +30,12 @@ dpkg_prepare_key_cfg(const struct dpkg_profile_cfg *cfg, uint8_t *key_cfg_buf)
 	if (cfg->num_extracts > DPKG_MAX_NUM_OF_EXTRACTS)
 		return -EINVAL;
 
-	dpni_ext = (struct dpni_ext_set_rx_tc_dist *)key_cfg_buf;
+	dpni_ext = key_cfg_buf;
 	dpni_ext->num_extracts = cfg->num_extracts;
 
 	for (i = 0; i < cfg->num_extracts; i++) {
 		extr = &dpni_ext->extracts[i];
+		memset(extr, 0, sizeof(struct dpni_dist_extract));
 
 		switch (cfg->extracts[i].type) {
 		case DPKG_EXTRACT_FROM_HDR:
diff --git a/drivers/net/dpaa2/mc/dpni.c b/drivers/net/dpaa2/mc/dpni.c
index 4d97b98939..558f08dc69 100644
--- a/drivers/net/dpaa2/mc/dpni.c
+++ b/drivers/net/dpaa2/mc/dpni.c
@@ -1,7 +1,7 @@
 /* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0)
  *
  * Copyright 2013-2016 Freescale Semiconductor Inc.
- * Copyright 2016-2022 NXP
+ * Copyright 2016-2023 NXP
  *
  */
 #include <fsl_mc_sys.h>
@@ -852,6 +852,92 @@ int dpni_get_qdid(struct fsl_mc_io *mc_io,
 	return 0;
 }
 
+/**
+ * dpni_get_qdid_ex() - Extension for the function to get the Queuing Destination ID (QDID)
+ *			that should be used for enqueue operations.
+ * @mc_io:	Pointer to MC portal's I/O object
+ * @cmd_flags:	Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token:	Token of DPNI object
+ * @qtype:	Type of queue to receive QDID for
+ * @qdid:	Array of virtual QDID value that should be used as an argument
+ *			in all enqueue operations.
+ *
+ * Return:	'0' on Success; Error code otherwise.
+ *
+ * This function must be used when dpni is created using multiple Tx channels to return one
+ * qdid for each channel.
+ */
+int dpni_get_qdid_ex(struct fsl_mc_io *mc_io,
+		  uint32_t cmd_flags,
+		  uint16_t token,
+		  enum dpni_queue_type qtype,
+		  uint16_t *qdid)
+{
+	struct mc_command cmd = { 0 };
+	struct dpni_cmd_get_qdid *cmd_params;
+	struct dpni_rsp_get_qdid_ex *rsp_params;
+	int i;
+	int err;
+
+	/* prepare command */
+	cmd.header = mc_encode_cmd_header(DPNI_CMDID_GET_QDID_EX,
+					  cmd_flags,
+					  token);
+	cmd_params = (struct dpni_cmd_get_qdid *)cmd.params;
+	cmd_params->qtype = qtype;
+
+	/* send command to mc*/
+	err = mc_send_command(mc_io, &cmd);
+	if (err)
+		return err;
+
+	/* retrieve response parameters */
+	rsp_params = (struct dpni_rsp_get_qdid_ex *)cmd.params;
+	for (i = 0; i < DPNI_MAX_CHANNELS; i++)
+		qdid[i] = le16_to_cpu(rsp_params->qdid[i]);
+
+	return 0;
+}
+
+/**
+ * dpni_get_sp_info() - Get the AIOP storage profile IDs associated
+ *			with the DPNI
+ * @mc_io:	Pointer to MC portal's I/O object
+ * @cmd_flags:	Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token:	Token of DPNI object
+ * @sp_info:	Returned AIOP storage-profile information
+ *
+ * Return:	'0' on Success; Error code otherwise.
+ *
+ * @warning	Only relevant for DPNI that belongs to AIOP container.
+ */
+int dpni_get_sp_info(struct fsl_mc_io *mc_io,
+		     uint32_t cmd_flags,
+		     uint16_t token,
+		     struct dpni_sp_info *sp_info)
+{
+	struct dpni_rsp_get_sp_info *rsp_params;
+	struct mc_command cmd = { 0 };
+	int err, i;
+
+	/* prepare command */
+	cmd.header = mc_encode_cmd_header(DPNI_CMDID_GET_SP_INFO,
+					  cmd_flags,
+					  token);
+
+	/* send command to mc*/
+	err = mc_send_command(mc_io, &cmd);
+	if (err)
+		return err;
+
+	/* retrieve response parameters */
+	rsp_params = (struct dpni_rsp_get_sp_info *)cmd.params;
+	for (i = 0; i < DPNI_MAX_SP; i++)
+		sp_info->spids[i] = le16_to_cpu(rsp_params->spids[i]);
+
+	return 0;
+}
+
 /**
  * dpni_get_tx_data_offset() - Get the Tx data offset (from start of buffer)
  * @mc_io:	Pointer to MC portal's I/O object
@@ -1684,6 +1770,7 @@ int dpni_set_rx_tc_dist(struct fsl_mc_io *mc_io,
  * @mc_io:	Pointer to MC portal's I/O object
  * @cmd_flags:	Command flags; one or more of 'MC_CMD_FLAG_'
  * @token:	Token of DPNI object
+ * @ceetm_ch_idx:	ceetm channel index
  * @mode:	Tx confirmation mode
  *
  * This function is useful only when 'DPNI_OPT_TX_CONF_DISABLED' is not
@@ -1701,6 +1788,7 @@ int dpni_set_rx_tc_dist(struct fsl_mc_io *mc_io,
 int dpni_set_tx_confirmation_mode(struct fsl_mc_io *mc_io,
 				  uint32_t cmd_flags,
 				  uint16_t token,
+				  uint8_t ceetm_ch_idx,
 				  enum dpni_confirmation_mode mode)
 {
 	struct dpni_tx_confirmation_mode *cmd_params;
@@ -1711,6 +1799,7 @@ int dpni_set_tx_confirmation_mode(struct fsl_mc_io *mc_io,
 					  cmd_flags,
 					  token);
 	cmd_params = (struct dpni_tx_confirmation_mode *)cmd.params;
+	cmd_params->ceetm_ch_idx = ceetm_ch_idx;
 	cmd_params->confirmation_mode = mode;
 
 	/* send command to mc*/
@@ -1722,6 +1811,7 @@ int dpni_set_tx_confirmation_mode(struct fsl_mc_io *mc_io,
  * @mc_io:	Pointer to MC portal's I/O object
  * @cmd_flags:	Command flags; one or more of 'MC_CMD_FLAG_'
  * @token:	Token of DPNI object
+ * @ceetm_ch_idx:	ceetm channel index
  * @mode:	Tx confirmation mode
  *
  * Return:  '0' on Success; Error code otherwise.
@@ -1729,8 +1819,10 @@ int dpni_set_tx_confirmation_mode(struct fsl_mc_io *mc_io,
 int dpni_get_tx_confirmation_mode(struct fsl_mc_io *mc_io,
 				  uint32_t cmd_flags,
 				  uint16_t token,
+				  uint8_t ceetm_ch_idx,
 				  enum dpni_confirmation_mode *mode)
 {
+	struct dpni_tx_confirmation_mode *cmd_params;
 	struct dpni_tx_confirmation_mode *rsp_params;
 	struct mc_command cmd = { 0 };
 	int err;
@@ -1738,6 +1830,8 @@ int dpni_get_tx_confirmation_mode(struct fsl_mc_io *mc_io,
 	cmd.header = mc_encode_cmd_header(DPNI_CMDID_GET_TX_CONFIRMATION_MODE,
 					cmd_flags,
 					token);
+	cmd_params = (struct dpni_tx_confirmation_mode *)cmd.params;
+	cmd_params->ceetm_ch_idx = ceetm_ch_idx;
 
 	err = mc_send_command(mc_io, &cmd);
 	if (err)
@@ -1749,6 +1843,78 @@ int dpni_get_tx_confirmation_mode(struct fsl_mc_io *mc_io,
 	return 0;
 }
 
+/**
+ * dpni_set_queue_tx_confirmation_mode() - Set Tx confirmation mode
+ * @mc_io:	Pointer to MC portal's I/O object
+ * @cmd_flags:	Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token:	Token of DPNI object
+ * @ceetm_ch_idx:	ceetm channel index
+ * @index:	queue index
+ * @mode:	Tx confirmation mode
+ *
+ * Return:	'0' on Success; Error code otherwise.
+ */
+int dpni_set_queue_tx_confirmation_mode(struct fsl_mc_io *mc_io,
+				  uint32_t cmd_flags,
+				  uint16_t token,
+				  uint8_t ceetm_ch_idx, uint8_t index,
+				  enum dpni_confirmation_mode mode)
+{
+	struct dpni_queue_tx_confirmation_mode *cmd_params;
+	struct mc_command cmd = { 0 };
+
+	/* prepare command */
+	cmd.header = mc_encode_cmd_header(DPNI_CMDID_SET_QUEUE_TX_CONFIRMATION_MODE,
+					  cmd_flags,
+					  token);
+	cmd_params = (struct dpni_queue_tx_confirmation_mode *)cmd.params;
+	cmd_params->ceetm_ch_idx = ceetm_ch_idx;
+	cmd_params->index = index;
+	cmd_params->confirmation_mode = mode;
+
+	/* send command to mc*/
+	return mc_send_command(mc_io, &cmd);
+}
+
+/**
+ * dpni_get_queue_tx_confirmation_mode() - Get Tx confirmation mode
+ * @mc_io:	Pointer to MC portal's I/O object
+ * @cmd_flags:	Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token:	Token of DPNI object
+ * @ceetm_ch_idx:	ceetm channel index
+ * @index:	queue index
+ * @mode:	Tx confirmation mode
+ *
+ * Return:  '0' on Success; Error code otherwise.
+ */
+int dpni_get_queue_tx_confirmation_mode(struct fsl_mc_io *mc_io,
+				  uint32_t cmd_flags,
+				  uint16_t token,
+				  uint8_t ceetm_ch_idx, uint8_t index,
+				  enum dpni_confirmation_mode *mode)
+{
+	struct dpni_queue_tx_confirmation_mode *cmd_params;
+	struct dpni_queue_tx_confirmation_mode *rsp_params;
+	struct mc_command cmd = { 0 };
+	int err;
+
+	cmd.header = mc_encode_cmd_header(DPNI_CMDID_GET_QUEUE_TX_CONFIRMATION_MODE,
+					cmd_flags,
+					token);
+	cmd_params = (struct dpni_queue_tx_confirmation_mode *)cmd.params;
+	cmd_params->ceetm_ch_idx = ceetm_ch_idx;
+	cmd_params->index = index;
+
+	err = mc_send_command(mc_io, &cmd);
+	if (err)
+		return err;
+
+	rsp_params = (struct dpni_queue_tx_confirmation_mode *)cmd.params;
+	*mode =  rsp_params->confirmation_mode;
+
+	return 0;
+}
+
 /**
  * dpni_set_qos_table() - Set QoS mapping table
  * @mc_io:	Pointer to MC portal's I/O object
@@ -2291,8 +2457,7 @@ int dpni_set_congestion_notification(struct fsl_mc_io *mc_io,
  * @cmd_flags:	Command flags; one or more of 'MC_CMD_FLAG_'
  * @token:	Token of DPNI object
  * @qtype:	Type of queue - Rx, Tx and Tx confirm types are supported
- * @param:	Traffic class and channel. Bits[0-7] contain traaffic class,
- *		byte[8-15] contains channel id
+ * @tc_id:	Traffic class selection (0-7)
  * @cfg:	congestion notification configuration
  *
  * Return:	'0' on Success; error code otherwise.
@@ -3114,8 +3279,216 @@ int dpni_set_port_cfg(struct fsl_mc_io *mc_io, uint32_t cmd_flags,
 
 	cmd_params = (struct dpni_cmd_set_port_cfg *)cmd.params;
 	cmd_params->flags = cpu_to_le32(flags);
-	dpni_set_field(cmd_params->bit_params,	PORT_LOOPBACK_EN,
-			!!port_cfg->loopback_en);
+	dpni_set_field(cmd_params->bit_params, PORT_LOOPBACK_EN, !!port_cfg->loopback_en);
+
+	/* send command to MC */
+	return mc_send_command(mc_io, &cmd);
+}
+
+/**
+ * dpni_get_single_step_cfg() - return current configuration for single step PTP
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token: Token of DPNI object
+ * @ptp_cfg: ptp single step configuration
+ *
+ * Return:	'0' on Success; Error code otherwise.
+ *
+ */
+int dpni_get_single_step_cfg(struct fsl_mc_io *mc_io, uint32_t cmd_flags, uint16_t token,
+		struct dpni_single_step_cfg *ptp_cfg)
+{
+	struct dpni_rsp_single_step_cfg *rsp_params;
+	struct mc_command cmd = { 0 };
+	int err;
+
+	/* prepare command */
+	cmd.header = mc_encode_cmd_header(DPNI_CMDID_GET_SINGLE_STEP_CFG,
+						cmd_flags,
+						token);
+	/* send command to mc*/
+	err =  mc_send_command(mc_io, &cmd);
+	if (err)
+		return err;
+
+	/* read command response */
+	rsp_params = (struct dpni_rsp_single_step_cfg *)cmd.params;
+	ptp_cfg->offset = le16_to_cpu(rsp_params->offset);
+	ptp_cfg->en = dpni_get_field(rsp_params->flags, PTP_ENABLE);
+	ptp_cfg->ch_update = dpni_get_field(rsp_params->flags, PTP_CH_UPDATE);
+	ptp_cfg->peer_delay = le32_to_cpu(rsp_params->peer_delay);
+	ptp_cfg->ptp_onestep_reg_base =
+				  le32_to_cpu(rsp_params->ptp_onestep_reg_base);
+
+	return err;
+}
+
+/**
+ * dpni_get_port_cfg() - return configuration from physical port. The command has effect only if
+ *			dpni is connected to a mac object
+ * @mc_io:	Pointer to MC portal's I/O object
+ * @cmd_flags:	Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token:	Token of DPNI object
+ * @port_cfg: Configuration data
+ * The command can be called only when dpni is connected to a dpmac object.
+ * If the dpni is unconnected or the endpoint is not a dpni it will return error;
+ */
+int dpni_get_port_cfg(struct fsl_mc_io *mc_io, uint32_t cmd_flags, uint16_t token,
+		struct dpni_port_cfg *port_cfg)
+{
+	struct dpni_rsp_get_port_cfg *rsp_params;
+	struct mc_command cmd = { 0 };
+	int err;
+
+	/* prepare command */
+	cmd.header = mc_encode_cmd_header(DPNI_CMDID_GET_PORT_CFG,
+			cmd_flags, token);
+
+	/* send command to MC */
+	err = mc_send_command(mc_io, &cmd);
+	if (err)
+		return err;
+
+	/* read command response */
+	rsp_params = (struct dpni_rsp_get_port_cfg *)cmd.params;
+	port_cfg->loopback_en = dpni_get_field(rsp_params->bit_params, PORT_LOOPBACK_EN);
+
+	return 0;
+}
+
+/**
+ * dpni_set_single_step_cfg() - enable/disable and configure single step PTP
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token: Token of DPNI object
+ * @ptp_cfg: ptp single step configuration
+ *
+ * Return:	'0' on Success; Error code otherwise.
+ *
+ * The function has effect only when dpni object is connected to a dpmac object. If the
+ * dpni is not connected to a dpmac the configuration will be stored inside and applied
+ * when connection is made.
+ */
+int dpni_set_single_step_cfg(struct fsl_mc_io *mc_io, uint32_t cmd_flags, uint16_t token,
+		struct dpni_single_step_cfg *ptp_cfg)
+{
+	struct dpni_cmd_single_step_cfg *cmd_params;
+	struct mc_command cmd = { 0 };
+
+	/* prepare command */
+	cmd.header = mc_encode_cmd_header(DPNI_CMDID_SET_SINGLE_STEP_CFG,
+						cmd_flags,
+						token);
+	cmd_params = (struct dpni_cmd_single_step_cfg *)cmd.params;
+	cmd_params->offset = cpu_to_le16(ptp_cfg->offset);
+	cmd_params->peer_delay = cpu_to_le32(ptp_cfg->peer_delay);
+	dpni_set_field(cmd_params->flags, PTP_ENABLE, !!ptp_cfg->en);
+	dpni_set_field(cmd_params->flags, PTP_CH_UPDATE, !!ptp_cfg->ch_update);
+
+	/* send command to mc*/
+	return mc_send_command(mc_io, &cmd);
+}
+
+/**
+ * dpni_dump_table() - Dump the content of table_type table into memory.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token: Token of DPSW object
+ * @table_type: The type of the table to dump
+ * @table_index: The index of the table to dump in case of more than one table
+ * @iova_addr: The snapshot will be stored in this variable as an header of struct dump_table_header
+ *             followed by an array of struct dump_table_entry
+ * @iova_size: Memory size allocated for iova_addr
+ * @num_entries: Number of entries written in iova_addr
+ *
+ * Return: Completion status. '0' on Success; Error code otherwise.
+ *
+ * The memory allocated at iova_addr must be zeroed before command execution.
+ * If the table content exceeds the memory size provided the dump will be truncated.
+ */
+int dpni_dump_table(struct fsl_mc_io *mc_io,
+			 uint32_t cmd_flags,
+			 uint16_t token,
+			 uint16_t table_type,
+			 uint16_t table_index,
+			 uint64_t iova_addr,
+			 uint32_t iova_size,
+			 uint16_t *num_entries)
+{
+	struct mc_command cmd = { 0 };
+	int err;
+	struct dpni_cmd_dump_table *cmd_params;
+	struct dpni_rsp_dump_table *rsp_params;
+
+	/* prepare command */
+	cmd.header = mc_encode_cmd_header(DPNI_CMDID_DUMP_TABLE, cmd_flags, token);
+	cmd_params = (struct dpni_cmd_dump_table *)cmd.params;
+	cmd_params->table_type = cpu_to_le16(table_type);
+	cmd_params->table_index = cpu_to_le16(table_index);
+	cmd_params->iova_addr = cpu_to_le64(iova_addr);
+	cmd_params->iova_size = cpu_to_le32(iova_size);
+
+	/* send command to mc*/
+	err = mc_send_command(mc_io, &cmd);
+	if (err)
+		return err;
+
+	rsp_params = (struct dpni_rsp_dump_table *)cmd.params;
+	*num_entries = le16_to_cpu(rsp_params->num_entries);
+
+	return 0;
+}
+
+/* Sets up a Soft Parser Profile on this DPNI
+ * @mc_io:	Pointer to MC portal's I/O object
+ * @cmd_flags:	Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token:	Token of DPNI object
+ * @sp_profile: Soft Parser Profile name (must a valid name for a defined profile)
+ *			Maximum allowed length for this string is 8 characters long
+ *			If this parameter is empty string (all zeros)
+ *			then the Default SP Profile is set on this dpni
+ * @type: one of the SP Profile types defined above: Ingress or Egress (or both using bitwise OR)
+ */
+int dpni_set_sp_profile(struct fsl_mc_io *mc_io, uint32_t cmd_flags, uint16_t token,
+		uint8_t sp_profile[], uint8_t type)
+{
+	struct dpni_cmd_set_sp_profile *cmd_params;
+	struct mc_command cmd = { 0 };
+	int i;
+
+	/* prepare command */
+	cmd.header = mc_encode_cmd_header(DPNI_CMDID_SET_SP_PROFILE,
+			cmd_flags, token);
+
+	cmd_params = (struct dpni_cmd_set_sp_profile *)cmd.params;
+	for (i = 0; i < MAX_SP_PROFILE_ID_SIZE && sp_profile[i]; i++)
+		cmd_params->sp_profile[i] = sp_profile[i];
+	cmd_params->type = type;
+
+	/* send command to MC */
+	return mc_send_command(mc_io, &cmd);
+}
+
+/* Enable/Disable Soft Parser on this DPNI
+ * @mc_io:	Pointer to MC portal's I/O object
+ * @cmd_flags:	Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token:	Token of DPNI object
+ * @type: one of the SP Profile types defined above: Ingress or Egress (or both using bitwise OR)
+ * @en: 1 to enable or 0 to disable
+ */
+int dpni_sp_enable(struct fsl_mc_io *mc_io, uint32_t cmd_flags, uint16_t token,
+		uint8_t type, uint8_t en)
+{
+	struct dpni_cmd_sp_enable *cmd_params;
+	struct mc_command cmd = { 0 };
+
+	/* prepare command */
+	cmd.header = mc_encode_cmd_header(DPNI_CMDID_SP_ENABLE,
+			cmd_flags, token);
+
+	cmd_params = (struct dpni_cmd_sp_enable *)cmd.params;
+	cmd_params->type = type;
+	cmd_params->en = en;
 
 	/* send command to MC */
 	return mc_send_command(mc_io, &cmd);
diff --git a/drivers/net/dpaa2/mc/fsl_dpdmux.h b/drivers/net/dpaa2/mc/fsl_dpdmux.h
index 9bbac44219..97b09e59f9 100644
--- a/drivers/net/dpaa2/mc/fsl_dpdmux.h
+++ b/drivers/net/dpaa2/mc/fsl_dpdmux.h
@@ -1,7 +1,7 @@
 /* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0)
  *
  * Copyright 2013-2016 Freescale Semiconductor Inc.
- * Copyright 2018-2022 NXP
+ * Copyright 2018-2023 NXP
  *
  */
 #ifndef __FSL_DPDMUX_H
@@ -154,6 +154,10 @@ int dpdmux_reset(struct fsl_mc_io *mc_io,
  *Setting 1 DPDMUX_RESET will not reset multicast rules
  */
 #define DPDMUX_SKIP_MULTICAST_RULES	0x04
+/**
+ *Setting 4 DPDMUX_RESET will not reset default interface
+ */
+#define DPDMUX_SKIP_RESET_DEFAULT_INTERFACE	0x08
 
 int dpdmux_set_resetable(struct fsl_mc_io *mc_io,
 				  uint32_t cmd_flags,
@@ -464,10 +468,50 @@ int dpdmux_get_api_version(struct fsl_mc_io *mc_io,
 			   uint16_t *major_ver,
 			   uint16_t *minor_ver);
 
+enum dpdmux_congestion_unit {
+	DPDMUX_TAIDLROP_DROP_UNIT_BYTE = 0,
+	DPDMUX_TAILDROP_DROP_UNIT_FRAMES,
+	DPDMUX_TAILDROP_DROP_UNIT_BUFFERS
+};
+
 /**
- * Discard bit. This bit must be used together with other bits in
- * DPDMUX_ERROR_ACTION_CONTINUE to disable discarding of frames containing
- * errors
+ * struct dpdmux_taildrop_cfg - interface taildrop configuration
+ * @enable - enable (1 ) or disable (0) taildrop
+ * @units - taildrop units
+ * @threshold - taildtop threshold
+ */
+struct dpdmux_taildrop_cfg {
+	char enable;
+	enum dpdmux_congestion_unit units;
+	uint32_t threshold;
+};
+
+int dpdmux_if_set_taildrop(struct fsl_mc_io *mc_io, uint32_t cmd_flags, uint16_t token,
+			      uint16_t if_id, struct dpdmux_taildrop_cfg *cfg);
+
+int dpdmux_if_get_taildrop(struct fsl_mc_io *mc_io, uint32_t cmd_flags, uint16_t token,
+			      uint16_t if_id, struct dpdmux_taildrop_cfg *cfg);
+
+#define DPDMUX_MAX_KEY_SIZE 56
+
+enum dpdmux_table_type {
+	DPDMUX_DMAT_TABLE = 1,
+	DPDMUX_MISS_TABLE = 2,
+	DPDMUX_PRUNE_TABLE = 3,
+};
+
+int dpdmux_dump_table(struct fsl_mc_io *mc_io,
+			 uint32_t cmd_flags,
+			 uint16_t token,
+			 uint16_t table_type,
+			 uint16_t table_index,
+			 uint64_t iova_addr,
+			 uint32_t iova_size,
+			 uint16_t *num_entries);
+
+/**
+ * Discard bit. This bit must be used together with other bits in DPDMUX_ERROR_ACTION_CONTINUE
+ * to disable discarding of frames containing errors
  */
 #define DPDMUX_ERROR_DISC		0x80000000
 /**
@@ -583,4 +627,19 @@ struct dpdmux_error_cfg {
 int dpdmux_if_set_errors_behavior(struct fsl_mc_io *mc_io, uint32_t cmd_flags,
 		uint16_t token, uint16_t if_id, struct dpdmux_error_cfg *cfg);
 
+/**
+ * SP Profile on Ingress DPDMUX
+ */
+#define DPDMUX_SP_PROFILE_INGRESS 0x1
+/**
+ * SP Profile on Egress DPDMUX
+ */
+#define DPDMUX_SP_PROFILE_EGRESS	0x2
+
+int dpdmux_set_sp_profile(struct fsl_mc_io *mc_io, uint32_t cmd_flags, uint16_t token,
+		uint8_t sp_profile[], uint8_t type);
+
+int dpdmux_sp_enable(struct fsl_mc_io *mc_io, uint32_t cmd_flags, uint16_t token,
+		uint16_t if_id, uint8_t type, uint8_t en);
+
 #endif /* __FSL_DPDMUX_H */
diff --git a/drivers/net/dpaa2/mc/fsl_dpdmux_cmd.h b/drivers/net/dpaa2/mc/fsl_dpdmux_cmd.h
index bf6b8a20d1..a94f1bf91a 100644
--- a/drivers/net/dpaa2/mc/fsl_dpdmux_cmd.h
+++ b/drivers/net/dpaa2/mc/fsl_dpdmux_cmd.h
@@ -1,7 +1,7 @@
 /* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0)
  *
  * Copyright 2013-2016 Freescale Semiconductor Inc.
- * Copyright 2018-2021 NXP
+ * Copyright 2018-2023 NXP
  *
  */
 #ifndef _FSL_DPDMUX_CMD_H
@@ -9,7 +9,7 @@
 
 /* DPDMUX Version */
 #define DPDMUX_VER_MAJOR		6
-#define DPDMUX_VER_MINOR		9
+#define DPDMUX_VER_MINOR		10
 
 #define DPDMUX_CMD_BASE_VERSION		1
 #define DPDMUX_CMD_VERSION_2		2
@@ -63,8 +63,17 @@
 
 #define DPDMUX_CMDID_SET_RESETABLE		DPDMUX_CMD(0x0ba)
 #define DPDMUX_CMDID_GET_RESETABLE		DPDMUX_CMD(0x0bb)
+
+#define DPDMUX_CMDID_IF_SET_TAILDROP		DPDMUX_CMD(0x0bc)
+#define DPDMUX_CMDID_IF_GET_TAILDROP		DPDMUX_CMD(0x0bd)
+
+#define DPDMUX_CMDID_DUMP_TABLE           DPDMUX_CMD(0x0be)
+
 #define DPDMUX_CMDID_SET_ERRORS_BEHAVIOR	DPDMUX_CMD(0x0bf)
 
+#define DPDMUX_CMDID_SET_SP_PROFILE			DPDMUX_CMD(0x0c0)
+#define DPDMUX_CMDID_SP_ENABLE				DPDMUX_CMD(0x0c1)
+
 #define DPDMUX_MASK(field)        \
 	GENMASK(DPDMUX_##field##_SHIFT + DPDMUX_##field##_SIZE - 1, \
 		DPDMUX_##field##_SHIFT)
@@ -241,7 +250,7 @@ struct dpdmux_cmd_remove_custom_cls_entry {
 };
 
 #define DPDMUX_SKIP_RESET_FLAGS_SHIFT    0
-#define DPDMUX_SKIP_RESET_FLAGS_SIZE     3
+#define DPDMUX_SKIP_RESET_FLAGS_SIZE     4
 
 struct dpdmux_cmd_set_skip_reset_flags {
 	uint8_t skip_reset_flags;
@@ -251,6 +260,61 @@ struct dpdmux_rsp_get_skip_reset_flags {
 	uint8_t skip_reset_flags;
 };
 
+struct dpdmux_cmd_set_taildrop {
+	uint32_t	pad1;
+	uint16_t	if_id;
+	uint16_t	pad2;
+	uint16_t	oal_en;
+	uint8_t		units;
+	uint8_t		pad3;
+	uint32_t	threshold;
+};
+
+struct dpdmux_cmd_get_taildrop {
+	uint32_t	pad1;
+	uint16_t	if_id;
+};
+
+struct dpdmux_rsp_get_taildrop {
+	uint16_t	pad1;
+	uint16_t	pad2;
+	uint16_t	if_id;
+	uint16_t	pad3;
+	uint16_t	oal_en;
+	uint8_t		units;
+	uint8_t		pad4;
+	uint32_t	threshold;
+};
+
+struct dpdmux_cmd_dump_table {
+	uint16_t table_type;
+	uint16_t table_index;
+	uint32_t pad0;
+	uint64_t iova_addr;
+	uint32_t iova_size;
+};
+
+struct dpdmux_rsp_dump_table {
+	uint16_t num_entries;
+};
+
+struct dpdmux_dump_table_header {
+	uint16_t table_type;
+	uint16_t table_num_entries;
+	uint16_t table_max_entries;
+	uint8_t default_action;
+	uint8_t match_type;
+	uint8_t reserved[24];
+};
+
+struct dpdmux_dump_table_entry {
+	uint8_t key[DPDMUX_MAX_KEY_SIZE];
+	uint8_t mask[DPDMUX_MAX_KEY_SIZE];
+	uint8_t key_action;
+	uint16_t result[3];
+	uint8_t reserved[21];
+};
+
 #define DPDMUX_ERROR_ACTION_SHIFT		0
 #define DPDMUX_ERROR_ACTION_SIZE		4
 
@@ -260,5 +324,18 @@ struct dpdmux_cmd_set_errors_behavior {
 	uint16_t if_id;
 };
 
+#define MAX_SP_PROFILE_ID_SIZE	8
+
+struct dpdmux_cmd_set_sp_profile {
+	uint8_t sp_profile[MAX_SP_PROFILE_ID_SIZE];
+	uint8_t type;
+};
+
+struct dpdmux_cmd_sp_enable {
+	uint16_t if_id;
+	uint8_t type;
+	uint8_t en;
+};
+
 #pragma pack(pop)
 #endif /* _FSL_DPDMUX_CMD_H */
diff --git a/drivers/net/dpaa2/mc/fsl_dpkg.h b/drivers/net/dpaa2/mc/fsl_dpkg.h
index 70f2339ea5..834c765513 100644
--- a/drivers/net/dpaa2/mc/fsl_dpkg.h
+++ b/drivers/net/dpaa2/mc/fsl_dpkg.h
@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0)
  * Copyright 2013-2015 Freescale Semiconductor Inc.
- * Copyright 2016-2021 NXP
+ * Copyright 2016-2023 NXP
  *
  */
 #ifndef __FSL_DPKG_H_
@@ -180,7 +180,8 @@ struct dpni_ext_set_rx_tc_dist {
 	struct dpni_dist_extract extracts[DPKG_MAX_NUM_OF_EXTRACTS];
 };
 
-int dpkg_prepare_key_cfg(const struct dpkg_profile_cfg *cfg,
-			 uint8_t *key_cfg_buf);
+int
+dpkg_prepare_key_cfg(const struct dpkg_profile_cfg *cfg,
+	void *key_cfg_buf);
 
 #endif /* __FSL_DPKG_H_ */
diff --git a/drivers/net/dpaa2/mc/fsl_dpni.h b/drivers/net/dpaa2/mc/fsl_dpni.h
index ce84f4265e..3a5fcfa8a5 100644
--- a/drivers/net/dpaa2/mc/fsl_dpni.h
+++ b/drivers/net/dpaa2/mc/fsl_dpni.h
@@ -1,7 +1,7 @@
 /* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0)
  *
  * Copyright 2013-2016 Freescale Semiconductor Inc.
- * Copyright 2016-2021 NXP
+ * Copyright 2016-2023 NXP
  *
  */
 #ifndef __FSL_DPNI_H
@@ -116,6 +116,11 @@ struct fsl_mc_io;
  * Flow steering table is shared between all traffic classes
  */
 #define DPNI_OPT_SHARED_FS				0x001000
+/*
+ * Fq frame data, context and annotations stashing disable.
+ * The stashing is enabled by default.
+ */
+#define DPNI_OPT_STASHING_DIS			0x002000
 /**
  * Software sequence maximum layout size
  */
@@ -147,6 +152,7 @@ int dpni_close(struct fsl_mc_io *mc_io,
  *		DPNI_OPT_HAS_KEY_MASKING
  *		DPNI_OPT_NO_FS
  *		DPNI_OPT_SINGLE_SENDER
+ *		DPNI_OPT_STASHING_DIS
  * @fs_entries: Number of entries in the flow steering table.
  *		This table is used to select the ingress queue for
  *		ingress traffic, targeting a GPP core or another.
@@ -335,6 +341,7 @@ int dpni_clear_irq_status(struct fsl_mc_io *mc_io,
  *		DPNI_OPT_SHARED_CONGESTION
  *		DPNI_OPT_HAS_KEY_MASKING
  *		DPNI_OPT_NO_FS
+ *		DPNI_OPT_STASHING_DIS
  * @num_queues: Number of Tx and Rx queues used for traffic distribution.
  * @num_rx_tcs: Number of RX traffic classes (TCs), reserved for the DPNI.
  * @num_tx_tcs: Number of TX traffic classes (TCs), reserved for the DPNI.
@@ -394,7 +401,7 @@ int dpni_get_attributes(struct fsl_mc_io *mc_io,
  * error queue. To be used in dpni_set_errors_behavior() only if error_action
  * parameter is set to DPNI_ERROR_ACTION_SEND_TO_ERROR_QUEUE.
  */
-#define DPNI_ERROR_DISC		0x80000000
+#define DPNI_ERROR_DISC			0x80000000
 
 /**
  * Extract out of frame header error
@@ -576,6 +583,8 @@ enum dpni_offload {
 	DPNI_OFF_TX_L3_CSUM,
 	DPNI_OFF_TX_L4_CSUM,
 	DPNI_FLCTYPE_HASH,
+	DPNI_HEADER_STASHING,
+	DPNI_PAYLOAD_STASHING,
 };
 
 int dpni_set_offload(struct fsl_mc_io *mc_io,
@@ -596,6 +605,26 @@ int dpni_get_qdid(struct fsl_mc_io *mc_io,
 		  enum dpni_queue_type qtype,
 		  uint16_t *qdid);
 
+int dpni_get_qdid_ex(struct fsl_mc_io *mc_io,
+		  uint32_t cmd_flags,
+		  uint16_t token,
+		  enum dpni_queue_type qtype,
+		  uint16_t *qdid);
+
+/**
+ * struct dpni_sp_info - Structure representing DPNI storage-profile information
+ * (relevant only for DPNI owned by AIOP)
+ * @spids: array of storage-profiles
+ */
+struct dpni_sp_info {
+	uint16_t spids[DPNI_MAX_SP];
+};
+
+int dpni_get_sp_info(struct fsl_mc_io *mc_io,
+		     uint32_t cmd_flags,
+		     uint16_t token,
+		     struct dpni_sp_info *sp_info);
+
 int dpni_get_tx_data_offset(struct fsl_mc_io *mc_io,
 			    uint32_t cmd_flags,
 			    uint16_t token,
@@ -1443,11 +1472,25 @@ enum dpni_confirmation_mode {
 int dpni_set_tx_confirmation_mode(struct fsl_mc_io *mc_io,
 				  uint32_t cmd_flags,
 				  uint16_t token,
+				  uint8_t ceetm_ch_idx,
 				  enum dpni_confirmation_mode mode);
 
 int dpni_get_tx_confirmation_mode(struct fsl_mc_io *mc_io,
 				  uint32_t cmd_flags,
 				  uint16_t token,
+				  uint8_t ceetm_ch_idx,
+				  enum dpni_confirmation_mode *mode);
+
+int dpni_set_queue_tx_confirmation_mode(struct fsl_mc_io *mc_io,
+				  uint32_t cmd_flags,
+				  uint16_t token,
+				  uint8_t ceetm_ch_idx, uint8_t index,
+				  enum dpni_confirmation_mode mode);
+
+int dpni_get_queue_tx_confirmation_mode(struct fsl_mc_io *mc_io,
+				  uint32_t cmd_flags,
+				  uint16_t token,
+				  uint8_t ceetm_ch_idx, uint8_t index,
 				  enum dpni_confirmation_mode *mode);
 
 /**
@@ -1841,6 +1884,60 @@ void dpni_extract_sw_sequence_layout(struct dpni_sw_sequence_layout *layout,
 				     const uint8_t *sw_sequence_layout_buf);
 
 /**
+ * When used for queue_idx in function dpni_set_rx_dist_default_queue will signal to dpni
+ * to drop all unclassified frames
+ */
+#define DPNI_FS_MISS_DROP		((uint16_t)-1)
+
+/**
+ * struct dpni_rx_dist_cfg - distribution configuration
+ * @dist_size:	distribution size; supported values: 1,2,3,4,6,7,8,
+ *		12,14,16,24,28,32,48,56,64,96,112,128,192,224,256,384,448,
+ *		512,768,896,1024
+ * @key_cfg_iova: I/O virtual address of 256 bytes DMA-able memory filled with
+ *		the extractions to be used for the distribution key by calling
+ *		dpkg_prepare_key_cfg() relevant only when enable!=0 otherwise it can be '0'
+ * @enable: enable/disable the distribution.
+ * @tc: TC id for which distribution is set
+ * @fs_miss_flow_id: when packet misses all rules from flow steering table and hash is
+ *		disabled it will be put into this queue id; use DPNI_FS_MISS_DROP to drop
+ *		frames. The value of this field is used only when flow steering distribution
+ *		is enabled and hash distribution is disabled
+ */
+struct dpni_rx_dist_cfg {
+	uint16_t dist_size;
+	uint64_t key_cfg_iova;
+	uint8_t enable;
+	uint8_t tc;
+	uint16_t fs_miss_flow_id;
+};
+
+int dpni_set_rx_fs_dist(struct fsl_mc_io *mc_io, uint32_t cmd_flags, uint16_t token,
+		const struct dpni_rx_dist_cfg *cfg);
+
+int dpni_set_rx_hash_dist(struct fsl_mc_io *mc_io, uint32_t cmd_flags, uint16_t token,
+		const struct dpni_rx_dist_cfg *cfg);
+
+int dpni_add_custom_tpid(struct fsl_mc_io *mc_io, uint32_t cmd_flags, uint16_t token,
+		uint16_t tpid);
+
+int dpni_remove_custom_tpid(struct fsl_mc_io *mc_io, uint32_t cmd_flags, uint16_t token,
+		uint16_t tpid);
+
+/**
+ * struct dpni_custom_tpid_cfg - custom TPID configuration. Contains custom TPID values
+ *		used in current dpni object to detect 802.1q frames.
+ *	@tpid1: first tag. Not used if zero.
+ *	@tpid2: second tag. Not used if zero.
+ */
+struct dpni_custom_tpid_cfg {
+	uint16_t tpid1;
+	uint16_t tpid2;
+};
+
+int dpni_get_custom_tpid(struct fsl_mc_io *mc_io, uint32_t cmd_flags, uint16_t token,
+		struct dpni_custom_tpid_cfg *tpid);
+/*
  * struct dpni_ptp_cfg - configure single step PTP (IEEE 1588)
  *	@en: enable single step PTP. When enabled the PTPv1 functionality will
  *		not work. If the field is zero, offset and ch_update parameters
@@ -1858,6 +1955,7 @@ struct dpni_single_step_cfg {
 	uint8_t ch_update;
 	uint16_t offset;
 	uint32_t peer_delay;
+	uint32_t ptp_onestep_reg_base;
 };
 
 int dpni_set_single_step_cfg(struct fsl_mc_io *mc_io, uint32_t cmd_flags,
@@ -1885,61 +1983,35 @@ int dpni_set_port_cfg(struct fsl_mc_io *mc_io, uint32_t cmd_flags,
 int dpni_get_port_cfg(struct fsl_mc_io *mc_io, uint32_t cmd_flags,
 		uint16_t token, struct dpni_port_cfg *port_cfg);
 
-/**
- * When used for queue_idx in function dpni_set_rx_dist_default_queue will
- * signal to dpni to drop all unclassified frames
- */
-#define DPNI_FS_MISS_DROP		((uint16_t)-1)
-
-/**
- * struct dpni_rx_dist_cfg - distribution configuration
- * @dist_size:	distribution size; supported values: 1,2,3,4,6,7,8,
- *		12,14,16,24,28,32,48,56,64,96,112,128,192,224,256,384,448,
- *		512,768,896,1024
- * @key_cfg_iova: I/O virtual address of 256 bytes DMA-able memory filled with
- *		the extractions to be used for the distribution key by calling
- *		dpkg_prepare_key_cfg() relevant only when enable!=0 otherwise
- *		it can be '0'
- * @enable: enable/disable the distribution.
- * @tc: TC id for which distribution is set
- * @fs_miss_flow_id: when packet misses all rules from flow steering table and
- *		hash is disabled it will be put into this queue id; use
- *		DPNI_FS_MISS_DROP to drop frames. The value of this field is
- *		used only when flow steering distribution is enabled and hash
- *		distribution is disabled
- */
-struct dpni_rx_dist_cfg {
-	uint16_t dist_size;
-	uint64_t key_cfg_iova;
-	uint8_t enable;
-	uint8_t tc;
-	uint16_t fs_miss_flow_id;
+enum dpni_table_type {
+	DPNI_FS_TABLE = 1,
+	DPNI_MAC_TABLE = 2,
+	DPNI_QOS_TABLE = 3,
+	DPNI_VLAN_TABLE = 4,
 };
 
-int dpni_set_rx_fs_dist(struct fsl_mc_io *mc_io, uint32_t cmd_flags,
-		uint16_t token, const struct dpni_rx_dist_cfg *cfg);
-
-int dpni_set_rx_hash_dist(struct fsl_mc_io *mc_io, uint32_t cmd_flags,
-		uint16_t token, const struct dpni_rx_dist_cfg *cfg);
-
-int dpni_add_custom_tpid(struct fsl_mc_io *mc_io, uint32_t cmd_flags,
-		uint16_t token, uint16_t tpid);
-
-int dpni_remove_custom_tpid(struct fsl_mc_io *mc_io, uint32_t cmd_flags,
-		uint16_t token, uint16_t tpid);
+int dpni_dump_table(struct fsl_mc_io *mc_io,
+			 uint32_t cmd_flags,
+			 uint16_t token,
+			 uint16_t table_type,
+			 uint16_t table_index,
+			 uint64_t iova_addr,
+			 uint32_t iova_size,
+			 uint16_t *num_entries);
 
 /**
- * struct dpni_custom_tpid_cfg - custom TPID configuration. Contains custom TPID
- *	values used in current dpni object to detect 802.1q frames.
- *	@tpid1: first tag. Not used if zero.
- *	@tpid2: second tag. Not used if zero.
+ * SP Profile on Ingress DPNI
  */
-struct dpni_custom_tpid_cfg {
-	uint16_t tpid1;
-	uint16_t tpid2;
-};
+#define DPNI_SP_PROFILE_INGRESS 0x1
+/**
+ * SP Profile on Egress DPNI
+ */
+#define DPNI_SP_PROFILE_EGRESS	0x2
+
+int dpni_set_sp_profile(struct fsl_mc_io *mc_io, uint32_t cmd_flags, uint16_t token,
+		uint8_t sp_profile[], uint8_t type);
 
-int dpni_get_custom_tpid(struct fsl_mc_io *mc_io, uint32_t cmd_flags,
-		uint16_t token, struct dpni_custom_tpid_cfg *tpid);
+int dpni_sp_enable(struct fsl_mc_io *mc_io, uint32_t cmd_flags, uint16_t token,
+		uint8_t type, uint8_t en);
 
 #endif /* __FSL_DPNI_H */
diff --git a/drivers/net/dpaa2/mc/fsl_dpni_cmd.h b/drivers/net/dpaa2/mc/fsl_dpni_cmd.h
index 781f936add..1152182e34 100644
--- a/drivers/net/dpaa2/mc/fsl_dpni_cmd.h
+++ b/drivers/net/dpaa2/mc/fsl_dpni_cmd.h
@@ -1,7 +1,7 @@
 /* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0)
  *
  * Copyright 2013-2016 Freescale Semiconductor Inc.
- * Copyright 2016-2022 NXP
+ * Copyright 2016-2023 NXP
  *
  */
 #ifndef _FSL_DPNI_CMD_H
@@ -9,7 +9,7 @@
 
 /* DPNI Version */
 #define DPNI_VER_MAJOR				8
-#define DPNI_VER_MINOR				2
+#define DPNI_VER_MINOR				4
 
 #define DPNI_CMD_BASE_VERSION			1
 #define DPNI_CMD_VERSION_2			2
@@ -108,8 +108,8 @@
 #define DPNI_CMDID_GET_EARLY_DROP		DPNI_CMD_V3(0x26A)
 #define DPNI_CMDID_GET_OFFLOAD			DPNI_CMD_V2(0x26B)
 #define DPNI_CMDID_SET_OFFLOAD			DPNI_CMD_V2(0x26C)
-#define DPNI_CMDID_SET_TX_CONFIRMATION_MODE	DPNI_CMD(0x266)
-#define DPNI_CMDID_GET_TX_CONFIRMATION_MODE	DPNI_CMD(0x26D)
+#define DPNI_CMDID_SET_TX_CONFIRMATION_MODE	DPNI_CMD_V2(0x266)
+#define DPNI_CMDID_GET_TX_CONFIRMATION_MODE	DPNI_CMD_V2(0x26D)
 #define DPNI_CMDID_SET_OPR			DPNI_CMD_V2(0x26e)
 #define DPNI_CMDID_GET_OPR			DPNI_CMD_V2(0x26f)
 #define DPNI_CMDID_LOAD_SW_SEQUENCE		DPNI_CMD(0x270)
@@ -121,7 +121,16 @@
 #define DPNI_CMDID_REMOVE_CUSTOM_TPID		DPNI_CMD(0x276)
 #define DPNI_CMDID_GET_CUSTOM_TPID		DPNI_CMD(0x277)
 #define DPNI_CMDID_GET_LINK_CFG			DPNI_CMD(0x278)
+#define DPNI_CMDID_SET_SINGLE_STEP_CFG			DPNI_CMD(0x279)
+#define DPNI_CMDID_GET_SINGLE_STEP_CFG		DPNI_CMD_V2(0x27a)
 #define DPNI_CMDID_SET_PORT_CFG			DPNI_CMD(0x27B)
+#define DPNI_CMDID_GET_PORT_CFG			DPNI_CMD(0x27C)
+#define DPNI_CMDID_DUMP_TABLE           DPNI_CMD(0x27D)
+#define DPNI_CMDID_SET_SP_PROFILE		DPNI_CMD(0x27E)
+#define DPNI_CMDID_GET_QDID_EX			DPNI_CMD(0x27F)
+#define DPNI_CMDID_SP_ENABLE		    DPNI_CMD(0x280)
+#define DPNI_CMDID_SET_QUEUE_TX_CONFIRMATION_MODE	DPNI_CMD(0x281)
+#define DPNI_CMDID_GET_QUEUE_TX_CONFIRMATION_MODE	DPNI_CMD(0x282)
 
 /* Macros for accessing command fields smaller than 1byte */
 #define DPNI_MASK(field)	\
@@ -329,6 +338,10 @@ struct dpni_rsp_get_qdid {
 	uint16_t qdid;
 };
 
+struct dpni_rsp_get_qdid_ex {
+	uint16_t qdid[16];
+};
+
 struct dpni_rsp_get_sp_info {
 	uint16_t spids[2];
 };
@@ -748,7 +761,16 @@ struct dpni_cmd_set_taildrop {
 };
 
 struct dpni_tx_confirmation_mode {
-	uint32_t pad;
+	uint8_t ceetm_ch_idx;
+	uint8_t pad1;
+	uint16_t pad2;
+	uint8_t confirmation_mode;
+};
+
+struct dpni_queue_tx_confirmation_mode {
+	uint8_t ceetm_ch_idx;
+	uint8_t index;
+	uint16_t pad;
 	uint8_t confirmation_mode;
 };
 
@@ -894,6 +916,42 @@ struct dpni_sw_sequence_layout_entry {
 	uint16_t pad;
 };
 
+#define DPNI_RX_FS_DIST_ENABLE_SHIFT	0
+#define DPNI_RX_FS_DIST_ENABLE_SIZE		1
+struct dpni_cmd_set_rx_fs_dist {
+	uint16_t	dist_size;
+	uint8_t		enable;
+	uint8_t		tc;
+	uint16_t	miss_flow_id;
+	uint16_t	pad1;
+	uint64_t	key_cfg_iova;
+};
+
+#define DPNI_RX_HASH_DIST_ENABLE_SHIFT	0
+#define DPNI_RX_HASH_DIST_ENABLE_SIZE		1
+struct dpni_cmd_set_rx_hash_dist {
+	uint16_t	dist_size;
+	uint8_t		enable;
+	uint8_t		tc_id;
+	uint32_t	pad;
+	uint64_t	key_cfg_iova;
+};
+
+struct dpni_cmd_add_custom_tpid {
+	uint16_t	pad;
+	uint16_t	tpid;
+};
+
+struct dpni_cmd_remove_custom_tpid {
+	uint16_t	pad;
+	uint16_t	tpid;
+};
+
+struct dpni_rsp_get_custom_tpid {
+	uint16_t	tpid1;
+	uint16_t	tpid2;
+};
+
 #define DPNI_PTP_ENABLE_SHIFT			0
 #define DPNI_PTP_ENABLE_SIZE			1
 #define DPNI_PTP_CH_UPDATE_SHIFT		1
@@ -925,40 +983,45 @@ struct dpni_rsp_get_port_cfg {
 	uint32_t	bit_params;
 };
 
-#define DPNI_RX_FS_DIST_ENABLE_SHIFT	0
-#define DPNI_RX_FS_DIST_ENABLE_SIZE		1
-struct dpni_cmd_set_rx_fs_dist {
-	uint16_t	dist_size;
-	uint8_t		enable;
-	uint8_t		tc;
-	uint16_t	miss_flow_id;
-	uint16_t	pad1;
-	uint64_t	key_cfg_iova;
+struct dpni_cmd_dump_table {
+	uint16_t table_type;
+	uint16_t table_index;
+	uint32_t pad0;
+	uint64_t iova_addr;
+	uint32_t iova_size;
 };
 
-#define DPNI_RX_HASH_DIST_ENABLE_SHIFT	0
-#define DPNI_RX_HASH_DIST_ENABLE_SIZE		1
-struct dpni_cmd_set_rx_hash_dist {
-	uint16_t	dist_size;
-	uint8_t		enable;
-	uint8_t		tc_id;
-	uint32_t	pad;
-	uint64_t	key_cfg_iova;
+struct dpni_rsp_dump_table {
+	uint16_t num_entries;
 };
 
-struct dpni_cmd_add_custom_tpid {
-	uint16_t	pad;
-	uint16_t	tpid;
+struct dump_table_header {
+	uint16_t table_type;
+	uint16_t table_num_entries;
+	uint16_t table_max_entries;
+	uint8_t default_action;
+	uint8_t match_type;
+	uint8_t reserved[24];
 };
 
-struct dpni_cmd_remove_custom_tpid {
-	uint16_t	pad;
-	uint16_t	tpid;
+struct dump_table_entry {
+	uint8_t key[DPNI_MAX_KEY_SIZE];
+	uint8_t mask[DPNI_MAX_KEY_SIZE];
+	uint8_t key_action;
+	uint16_t result[3];
+	uint8_t reserved[21];
 };
 
-struct dpni_rsp_get_custom_tpid {
-	uint16_t	tpid1;
-	uint16_t	tpid2;
+#define MAX_SP_PROFILE_ID_SIZE	8
+
+struct dpni_cmd_set_sp_profile {
+	uint8_t sp_profile[MAX_SP_PROFILE_ID_SIZE];
+	uint8_t type;
+};
+
+struct dpni_cmd_sp_enable {
+	uint8_t type;
+	uint8_t en;
 };
 
 #pragma pack(pop)
-- 
2.25.1


  parent reply	other threads:[~2024-09-13  6:01 UTC|newest]

Thread overview: 88+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-09-13  5:59 [v1 00/43] DPAA2 specific patches vanshika.shukla
2024-09-13  5:59 ` [v1 01/43] net/dpaa2: enhance Tx scatter-gather mempool vanshika.shukla
2024-09-13  5:59 ` [v1 02/43] net/dpaa2: support PTP packet one-step timestamp vanshika.shukla
2024-09-13  5:59 ` [v1 03/43] net/dpaa2: add proper MTU debugging print vanshika.shukla
2024-09-13  5:59 ` [v1 04/43] net/dpaa2: add support to dump dpdmux counters vanshika.shukla
2024-09-13  5:59 ` [v1 05/43] bus/fslmc: change dpcon close as internal symbol vanshika.shukla
2024-09-13  5:59 ` [v1 06/43] bus/fslmc: add close API to close DPAA2 device vanshika.shukla
2024-09-13  5:59 ` [v1 07/43] net/dpaa2: dpdmux: add support for CVLAN vanshika.shukla
2024-09-13  5:59 ` vanshika.shukla [this message]
2024-09-13  5:59 ` [v1 09/43] net/dpaa2: support link state for eth interfaces vanshika.shukla
2024-09-13  5:59 ` [v1 10/43] net/dpaa2: update DPNI link status method vanshika.shukla
2024-09-13  5:59 ` [v1 11/43] net/dpaa2: add new PMD API to check dpaa platform version vanshika.shukla
2024-09-13  5:59 ` [v1 12/43] bus/fslmc: improve BMAN buffer acquire vanshika.shukla
2024-09-13  5:59 ` [v1 13/43] bus/fslmc: get MC VFIO group FD directly vanshika.shukla
2024-09-13  5:59 ` [v1 14/43] bus/fslmc: enhance MC VFIO multiprocess support vanshika.shukla
2024-09-13  5:59 ` [v1 15/43] bus/fslmc: free VFIO group FD in case of add group failure vanshika.shukla
2024-09-13  5:59 ` [v1 16/43] bus/fslmc: dynamic IOVA mode configuration vanshika.shukla
2024-09-13  5:59 ` [v1 17/43] bus/fslmc: remove VFIO IRQ mapping vanshika.shukla
2024-09-13  5:59 ` [v1 18/43] bus/fslmc: create dpaa2 device with it's object vanshika.shukla
2024-09-13  5:59 ` [v1 19/43] bus/fslmc: fix coverity issue vanshika.shukla
2024-09-13  5:59 ` [v1 20/43] bus/fslmc: fix invalid error FD code vanshika.shukla
2024-09-13  5:59 ` [v1 21/43] bus/fslmc: change qbman eq desc from d to desc vanshika.shukla
2024-09-13  5:59 ` [v1 22/43] bus/fslmc: introduce VFIO DMA mapping API for fslmc vanshika.shukla
2024-09-13  5:59 ` [v1 23/43] net/dpaa2: change miss flow ID macro name vanshika.shukla
2024-09-13  5:59 ` [v1 24/43] net/dpaa2: flow API refactor vanshika.shukla
2024-09-13  5:59 ` [v1 25/43] net/dpaa2: dump Rx parser result vanshika.shukla
2024-09-13  5:59 ` [v1 26/43] net/dpaa2: enhancement of raw flow extract vanshika.shukla
2024-09-13  5:59 ` [v1 27/43] net/dpaa2: frame attribute flags parser vanshika.shukla
2024-09-13  5:59 ` [v1 28/43] net/dpaa2: add VXLAN distribution support vanshika.shukla
2024-09-13  5:59 ` [v1 29/43] net/dpaa2: protocol inside tunnel distribution vanshika.shukla
2024-09-13  5:59 ` [v1 30/43] net/dpaa2: eCPRI support by parser result vanshika.shukla
2024-09-13  5:59 ` [v1 31/43] net/dpaa2: add GTP flow support vanshika.shukla
2024-09-13  5:59 ` [v1 32/43] net/dpaa2: check if Soft parser is loaded vanshika.shukla
2024-09-13  5:59 ` [v1 33/43] net/dpaa2: soft parser flow verification vanshika.shukla
2024-09-13  5:59 ` [v1 34/43] net/dpaa2: add flow support for IPsec AH and ESP vanshika.shukla
2024-09-13  5:59 ` [v1 35/43] net/dpaa2: fix memory corruption in TM vanshika.shukla
2024-09-13  5:59 ` [v1 36/43] net/dpaa2: support software taildrop vanshika.shukla
2024-09-13  5:59 ` [v1 37/43] net/dpaa2: check IOVA before sending MC command vanshika.shukla
2024-09-13  5:59 ` [v1 38/43] net/dpaa2: improve DPDMUX error behavior settings vanshika.shukla
2024-09-13  5:59 ` [v1 39/43] net/dpaa2: store drop priority in mbuf vanshika.shukla
2024-09-13  5:59 ` [v1 40/43] net/dpaa2: add API to get endpoint name vanshika.shukla
2024-09-13  5:59 ` [v1 41/43] net/dpaa2: support VLAN traffic splitting vanshika.shukla
2024-09-13  5:59 ` [v1 42/43] net/dpaa2: add support for C-VLAN and MAC vanshika.shukla
2024-09-13  5:59 ` [v1 43/43] net/dpaa2: dpdmux single flow/multiple rules support vanshika.shukla
2024-09-18  7:50 ` [v2 00/43] DPAA2 specific patches vanshika.shukla
2024-09-18  7:50   ` [v2 01/43] net/dpaa2: enhance Tx scatter-gather mempool vanshika.shukla
2024-09-18  7:50   ` [v2 02/43] net/dpaa2: support PTP packet one-step timestamp vanshika.shukla
2024-09-18  7:50   ` [v2 03/43] net/dpaa2: add proper MTU debugging print vanshika.shukla
2024-09-18  7:50   ` [v2 04/43] net/dpaa2: add support to dump dpdmux counters vanshika.shukla
2024-09-18  7:50   ` [v2 05/43] bus/fslmc: change dpcon close as internal symbol vanshika.shukla
2024-09-18  7:50   ` [v2 06/43] bus/fslmc: add close API to close DPAA2 device vanshika.shukla
2024-09-18  7:50   ` [v2 07/43] net/dpaa2: dpdmux: add support for CVLAN vanshika.shukla
2024-09-18  7:50   ` [v2 08/43] bus/fslmc: upgrade with MC version 10.37 vanshika.shukla
2024-09-18  7:50   ` [v2 09/43] net/dpaa2: support link state for eth interfaces vanshika.shukla
2024-09-18  7:50   ` [v2 10/43] net/dpaa2: update DPNI link status method vanshika.shukla
2024-09-18  7:50   ` [v2 11/43] net/dpaa2: add new PMD API to check dpaa platform version vanshika.shukla
2024-09-18  7:50   ` [v2 12/43] bus/fslmc: improve BMAN buffer acquire vanshika.shukla
2024-09-18  7:50   ` [v2 13/43] bus/fslmc: get MC VFIO group FD directly vanshika.shukla
2024-09-18  7:50   ` [v2 14/43] bus/fslmc: enhance MC VFIO multiprocess support vanshika.shukla
2024-09-18  7:50   ` [v2 15/43] bus/fslmc: free VFIO group FD in case of add group failure vanshika.shukla
2024-09-18  7:50   ` [v2 16/43] bus/fslmc: dynamic IOVA mode configuration vanshika.shukla
2024-09-18  7:50   ` [v2 17/43] bus/fslmc: remove VFIO IRQ mapping vanshika.shukla
2024-09-18  7:50   ` [v2 18/43] bus/fslmc: create dpaa2 device with it's object vanshika.shukla
2024-09-18  7:50   ` [v2 19/43] bus/fslmc: fix coverity issue vanshika.shukla
2024-09-18  7:50   ` [v2 20/43] bus/fslmc: fix invalid error FD code vanshika.shukla
2024-09-18  7:50   ` [v2 21/43] bus/fslmc: change qbman eq desc from d to desc vanshika.shukla
2024-09-18  7:50   ` [v2 22/43] bus/fslmc: introduce VFIO DMA mapping API for fslmc vanshika.shukla
2024-09-18  7:50   ` [v2 23/43] net/dpaa2: change miss flow ID macro name vanshika.shukla
2024-09-18  7:50   ` [v2 24/43] net/dpaa2: flow API refactor vanshika.shukla
2024-09-18  7:50   ` [v2 25/43] net/dpaa2: dump Rx parser result vanshika.shukla
2024-09-18  7:50   ` [v2 26/43] net/dpaa2: enhancement of raw flow extract vanshika.shukla
2024-09-18  7:50   ` [v2 27/43] net/dpaa2: frame attribute flags parser vanshika.shukla
2024-09-18  7:50   ` [v2 28/43] net/dpaa2: add VXLAN distribution support vanshika.shukla
2024-09-18  7:50   ` [v2 29/43] net/dpaa2: protocol inside tunnel distribution vanshika.shukla
2024-09-18  7:50   ` [v2 30/43] net/dpaa2: eCPRI support by parser result vanshika.shukla
2024-09-18  7:50   ` [v2 31/43] net/dpaa2: add GTP flow support vanshika.shukla
2024-09-18  7:50   ` [v2 32/43] net/dpaa2: check if Soft parser is loaded vanshika.shukla
2024-09-18  7:50   ` [v2 33/43] net/dpaa2: soft parser flow verification vanshika.shukla
2024-09-18  7:50   ` [v2 34/43] net/dpaa2: add flow support for IPsec AH and ESP vanshika.shukla
2024-09-18  7:50   ` [v2 35/43] net/dpaa2: fix memory corruption in TM vanshika.shukla
2024-09-18  7:50   ` [v2 36/43] net/dpaa2: support software taildrop vanshika.shukla
2024-09-18  7:50   ` [v2 37/43] net/dpaa2: check IOVA before sending MC command vanshika.shukla
2024-09-18  7:50   ` [v2 38/43] net/dpaa2: improve DPDMUX error behavior settings vanshika.shukla
2024-09-18  7:50   ` [v2 39/43] net/dpaa2: store drop priority in mbuf vanshika.shukla
2024-09-18  7:50   ` [v2 40/43] net/dpaa2: add API to get endpoint name vanshika.shukla
2024-09-18  7:50   ` [v2 41/43] net/dpaa2: support VLAN traffic splitting vanshika.shukla
2024-09-18  7:50   ` [v2 42/43] net/dpaa2: add support for C-VLAN and MAC vanshika.shukla
2024-09-18  7:50   ` [v2 43/43] net/dpaa2: dpdmux single flow/multiple rules support vanshika.shukla

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20240913055959.3246917-9-vanshika.shukla@nxp.com \
    --to=vanshika.shukla@nxp.com \
    --cc=apeksha.gupta@nxp.com \
    --cc=dev@dpdk.org \
    --cc=g.singh@nxp.com \
    --cc=hemant.agrawal@nxp.com \
    --cc=sachin.saxena@nxp.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).