From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id AD0E2459C6; Wed, 18 Sep 2024 10:11:36 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 412CB42F57; Wed, 18 Sep 2024 10:10:52 +0200 (CEST) Received: from EUR05-DB8-obe.outbound.protection.outlook.com (mail-db8eur05on2043.outbound.protection.outlook.com [40.107.20.43]) by mails.dpdk.org (Postfix) with ESMTP id 3413342ECE for ; Wed, 18 Sep 2024 10:10:43 +0200 (CEST) ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=bsnVUy63LrwafITQpHboLw+MiqwTDS0g5NoBe+2rz95k8m7Ng9xOJu2a6XZQkrwZzjSy5Y+NoJfwdeGG2q6Fn6kClGeTVQcPgRjSymAHphYF3WlNiXJSKaxnXKeb1ofm4o5DQY1ePqL3tVHHskFjv18eNJqIrMKNE6s2DyGNtcoHRgjMjo6krBFxPg9+mONj3juoI8El91guK7NDaQe4JDpyFrM2KKZnpPd2NC4RSlp2SEEot5hPmrox0g9ydlXw2hGD0u0qCgfbqjyNznxgwbRN7zUSDOTLRJGBlpnEJExcyM8tCiJ0mUBIXR7lHFplMHZHq+dCJWGHHl+WegPuAg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=RPIc7W1TYz9MbgDJYfr3XCTxEgS+H0dbMvIwkf7Z82w=; b=tHu+t+WtBBWDb94+8seO35sXjGqeD4ZnSEOXd+P/S8Xd7sSFNwB6syIpVibZBkzWpDz1AYIwXiwBUalUq7dU8RG50/rXOjH7/1N3K66RYMV9Y0F0P1cHcFIJQ5XhLfxeMd+CeiNSxgfzwdAdcegaJ355XBoo6FoKZfaLJbDhZ/qQwMr9yD0yJqa1rU5DGrOcBjFSoYYevTJp8gtTDUJXjzmNNJsNArziZsqWYntd9w5QrhfdibnRmdgSgPvVq9NSW0kDytCeTYK8BxNinyvSn8F7r2Ic/ZVsrsRtJSaD8Znw7Rl7rfjJuHgm8iWKV+ielADMAp7NcYDi3LTgIiAXIQ== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 192.176.1.74) smtp.rcpttodomain=dpdk.org smtp.mailfrom=ericsson.com; dmarc=pass (p=reject sp=reject pct=100) action=none header.from=ericsson.com; dkim=none (message not signed); arc=none (0) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ericsson.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=RPIc7W1TYz9MbgDJYfr3XCTxEgS+H0dbMvIwkf7Z82w=; b=dviw8vboMlSJ9GdAgEPPcLkpY0p3d+w3YPvd5/wKnScrsuelqrOOPWnZ7LWFok/8zBEqZ9wkHR5z4sfosNNmKr2xtAziM1K3E41NtEvwta3UDeYxnoE0z1jruTUM1uDeGJN1xniV8eHlQPwGLmFyAnXEklgn8ozKnrUhUS28GSh72yRW/IxfKhOr54hslGQxswGfSBKhBUsLX0rouTYTyEUYTE8is4Rw0GypF/+zCUhq3+vFMWluwyjdIEAJGSVqYeUSxRs2VFXHeK4TVtA6Txp0feLL9uwJic61hmzkZniS8Yn3i1bUMZwgMVwahTayp88PUTIx6cYShmycYLBiYw== Received: from AM7PR04CA0019.eurprd04.prod.outlook.com (2603:10a6:20b:110::29) by AS5PR07MB10131.eurprd07.prod.outlook.com (2603:10a6:20b:680::5) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7962.24; Wed, 18 Sep 2024 08:10:38 +0000 Received: from AM3PEPF0000A793.eurprd04.prod.outlook.com (2603:10a6:20b:110:cafe::46) by AM7PR04CA0019.outlook.office365.com (2603:10a6:20b:110::29) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7939.30 via Frontend Transport; Wed, 18 Sep 2024 08:10:38 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 192.176.1.74) smtp.mailfrom=ericsson.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=ericsson.com; Received-SPF: Pass (protection.outlook.com: domain of ericsson.com designates 192.176.1.74 as permitted sender) receiver=protection.outlook.com; client-ip=192.176.1.74; helo=oa.msg.ericsson.com; pr=C Received: from oa.msg.ericsson.com (192.176.1.74) by AM3PEPF0000A793.mail.protection.outlook.com (10.167.16.122) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7918.13 via Frontend Transport; Wed, 18 Sep 2024 08:10:36 +0000 Received: from seliicinfr00050.seli.gic.ericsson.se (153.88.142.248) by smtp-central.internal.ericsson.com (100.87.178.60) with Microsoft SMTP Server id 15.2.1544.11; Wed, 18 Sep 2024 10:10:36 +0200 Received: from breslau.. (seliicwb00002.seli.gic.ericsson.se [10.156.25.100]) by seliicinfr00050.seli.gic.ericsson.se (Postfix) with ESMTP id 047EC1C006B; Wed, 18 Sep 2024 10:10:36 +0200 (CEST) From: =?UTF-8?q?Mattias=20R=C3=B6nnblom?= To: CC: , =?UTF-8?q?Morten=20Br=C3=B8rup?= , Stephen Hemminger , Konstantin Ananyev , David Marchand , Jerin Jacob , =?UTF-8?q?Mattias=20R=C3=B6nnblom?= Subject: [PATCH v6 1/7] eal: add static per-lcore memory allocation facility Date: Wed, 18 Sep 2024 10:00:48 +0200 Message-ID: <20240918080054.725164-2-mattias.ronnblom@ericsson.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240918080054.725164-1-mattias.ronnblom@ericsson.com> References: <20240917143239.724069-2-mattias.ronnblom@ericsson.com> <20240918080054.725164-1-mattias.ronnblom@ericsson.com> MIME-Version: 1.0 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8bit X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: AM3PEPF0000A793:EE_|AS5PR07MB10131:EE_ X-MS-Office365-Filtering-Correlation-Id: 23849c81-24c5-42a4-aede-08dcd7b9605c X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; ARA:13230040|36860700013|82310400026|376014|1800799024; X-Microsoft-Antispam-Message-Info: =?utf-8?B?YXI1Wnp4dHRFTW1BMjhXT3pMYU5DYUJFalNSSDkvdlEwT0l5Wkx2TXJpYnUz?= =?utf-8?B?Y1FVdUM2cmJGcTZQOVJkbTI3UWtRc2hRR0prK1YzT2tzNklaUk1MbnBYRlNO?= =?utf-8?B?ZE1qaVR2RXVWWjZlV01uMnRqSkp0WHIwZ1pCOTN6VjRhbVk1L1IrNyttOGZq?= =?utf-8?B?Y3lmMUFNRFBJdzdRQml0ZTgrckY3aHRsZDZsV094YU5ueS8rUG43eDUraWRN?= =?utf-8?B?Zi9tTThjeGVOemhtQWlQUXRnTGY0bGxsNW1MeFVZMllPd1N3YTYvUFBMZlVv?= =?utf-8?B?MnhsNlFFU1FBQmowZm9qejU0MXduZzU2ZG8vWXV2ais1RDNZeS9OcDluWXJX?= =?utf-8?B?Wmg5QWZkamIxTXlBcXRHUi9SajNpaVplYkhTWUdaeFlMNkl4Q0R0ZzZFdThQ?= =?utf-8?B?anpORWpJTGxqOWI5SnlCK2dScUJZeEcvcjBEM0FvR1dXZ0ZrU3k5MVRGcDky?= =?utf-8?B?ZHYyZGVBS3puTDhscS9qVDZvbmgxclJTNXNOV0JZNS9WRENYTUVWa00zOWli?= =?utf-8?B?TGsvZXdMZFdoZjhXMmJGRHRtb0VxT2E2LzVQOEZtNStZT0hrMWRxbTdzTzlr?= =?utf-8?B?NC9xUmZIbzNuYzdtS21OQTZKRlF2Wm1QMWJsd21oa0RDaVNtSERyc2JXcUUz?= =?utf-8?B?amZ6ajZyNFp4RVlQOUp6dEdlQ2poQ3hRdXNlYTdLSkFsMk55YXpaQitJRHEy?= =?utf-8?B?UHZCaCt6ZGpOZFhJblZZMHhZYUcyVUhjT0M4TmkrQitKc3gvdWpwRnBjVkhN?= =?utf-8?B?cUZFWmY2K243OVhiamUvaTJsRDlwM2g3L0QycVJoYmtnK2dFdERPUjVnWXlY?= =?utf-8?B?RE1WaExTd0ZUNnFYYlJnSFBoTm4zditacFRpeldnVTVXRWtIek1EZ0RpMC9K?= =?utf-8?B?Nkh4WkVWNlBVWk9zNWs0U21LQjE2Q2M1a2N1a0lsYXBGZmxUSDlsN2NmdkE4?= =?utf-8?B?blhiTHgxNGZiaS9OOVhVSEd6Qm1aNWdJOFBhZGJVbHpvR0p5SWZCUHFYNnJv?= =?utf-8?B?SVM2bFNiRTk0UWlrOUcwWWppTTVmUERESXE2T2ljbFFCTWhNTE5lYXduMWJa?= =?utf-8?B?MFlUK3ZZRXVkZG1pQmVpNEN6aHJMazR2UndYNzUycG4xNit4cFdPb2ZRcDRO?= =?utf-8?B?Qi96TVFrRUVKVVJFZUlQU0FGelYzOE1CWEtJR0dWOVE0WWhyZDFuTk1BK0tz?= =?utf-8?B?d3ptVmlUeFRYVCtuY1loOEdTWjV6NDJKZm1GTG53L1RacWM2c0t3by8yZmlV?= =?utf-8?B?KzVKYklmYmg5NExmWlNKVnF3VU5Rc1MrMVFnaGpHcEFyc3k1c05JV1loenpV?= =?utf-8?B?eGU4eGtYVXY2UTA4U09RRkZMN0diOG9WTklkS2p3WnZVdXFIS09mSHU2VHNU?= =?utf-8?B?RXNvZWFDQmhCNGVYRWVYYlJxQithQzhmN0VkTFU5ZU5GY0Q2VWE3a2NjK3ZP?= =?utf-8?B?OWFRTkhMcEZkOXczNFN3RmdEM1JRbGNpOWRabHo3R1QzNDdPSFhQR05JbGo1?= =?utf-8?B?Q1dzclNGS2djL2FIVmJGVHJjaHJmdDlpS1p3ajhieWVUVENnQi9UMzlJZjBx?= =?utf-8?B?NHNYdDFWdG5jVkIvMXBDdFpscjhwRitmSDBCYWxuWUk0ejR0NTBuVnl6RDhv?= =?utf-8?B?aUIvRDh2K1V4STRaMXNXc0NkSkpWc1FBR1F0eEo2bTNEZXhQYkNDa0tvWnY2?= =?utf-8?B?WFBubDdWaGRvREhuajVtb05qRFRiMjFKdEc3MEpZbjJ5OXFBbUUrc3l3b3Nu?= =?utf-8?B?dmh0aVoxWmxLTlBORk9RZTYrKzJNU2o4UFFnVEh1SUJjR2l3NnBJVm1ncUdl?= =?utf-8?B?QXFPWERLaXl3OFFPKzdrcGZPTnFidnBiMmRsV3k1SG1nUmdnQ0dVL0pjRS9u?= =?utf-8?Q?Iq0iJ0Pix23KA?= X-Forefront-Antispam-Report: CIP:192.176.1.74; CTRY:SE; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:oa.msg.ericsson.com; PTR:office365.se.ericsson.net; CAT:NONE; SFS:(13230040)(36860700013)(82310400026)(376014)(1800799024); DIR:OUT; SFP:1101; X-OriginatorOrg: ericsson.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 18 Sep 2024 08:10:36.4907 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 23849c81-24c5-42a4-aede-08dcd7b9605c X-MS-Exchange-CrossTenant-Id: 92e84ceb-fbfd-47ab-be52-080c6b87953f X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=92e84ceb-fbfd-47ab-be52-080c6b87953f; Ip=[192.176.1.74]; Helo=[oa.msg.ericsson.com] X-MS-Exchange-CrossTenant-AuthSource: AM3PEPF0000A793.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: AS5PR07MB10131 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Introduce DPDK per-lcore id variables, or lcore variables for short. An lcore variable has one value for every current and future lcore id-equipped thread. The primary use case is for statically allocating small, frequently-accessed data structures, for which one instance should exist for each lcore. Lcore variables are similar to thread-local storage (TLS, e.g., C11 _Thread_local), but decoupling the values' life time with that of the threads. Lcore variables are also similar in terms of functionality provided by FreeBSD kernel's DPCPU_*() family of macros and the associated build-time machinery. DPCPU uses linker scripts, which effectively prevents the reuse of its, otherwise seemingly viable, approach. The currently-prevailing way to solve the same problem as lcore variables is to keep a module's per-lcore data as RTE_MAX_LCORE-sized array of cache-aligned, RTE_CACHE_GUARDed structs. The benefit of lcore variables over this approach is that data related to the same lcore now is close (spatially, in memory), rather than data used by the same module, which in turn avoid excessive use of padding, polluting caches with unused data. Signed-off-by: Mattias Rönnblom Acked-by: Morten Brørup -- PATCH v6: * Have API user provide the loop variable in the FOREACH macro, to avoid subtle bugs where the loop variable name clashes with some other user-defined variable. (Konstantin Ananyev) PATCH v5: * Update EAL programming guide. PATCH v2: * Add Windows support. (Morten Brørup) * Fix lcore variables API index reference. (Morten Brørup) * Various improvements of the API documentation. (Morten Brørup) * Elimination of unused symbol in version.map. (Morten Brørup) PATCH: * Update MAINTAINERS and release notes. * Stop covering included files in extern "C" {}. RFC v6: * Include to get aligned_alloc(). * Tweak documentation (grammar). * Provide API-level guarantees that lcore variable values take on an initial value of zero. * Fix misplaced __rte_cache_aligned in the API doc example. RFC v5: * In Doxygen, consistenly use @ (and not \). * The RTE_LCORE_VAR_GET() and SET() convience access macros covered an uncommon use case, where the lcore value is of a primitive type, rather than a struct, and is thus eliminated from the API. (Morten Brørup) * In the wake up GET()/SET() removeal, rename RTE_LCORE_VAR_PTR() RTE_LCORE_VAR_VALUE(). * The underscores are removed from __rte_lcore_var_lcore_ptr() to signal that this function is a part of the public API. * Macro arguments are documented. RFV v4: * Replace large static array with libc heap-allocated memory. One implication of this change is there no longer exists a fixed upper bound for the total amount of memory used by lcore variables. RTE_MAX_LCORE_VAR has changed meaning, and now represent the maximum size of any individual lcore variable value. * Fix issues in example. (Morten Brørup) * Improve access macro type checking. (Morten Brørup) * Refer to the lcore variable handle as "handle" and not "name" in various macros. * Document lack of thread safety in rte_lcore_var_alloc(). * Provide API-level assurance the lcore variable handle is always non-NULL, to all applications to use NULL to mean "not yet allocated". * Note zero-sized allocations are not allowed. * Give API-level guarantee the lcore variable values are zeroed. RFC v3: * Replace use of GCC-specific alignof() with alignof(). * Update example to reflect FOREACH macro name change (in RFC v2). RFC v2: * Use alignof to derive alignment requirements. (Morten Brørup) * Change name of FOREACH to make it distinct from 's *per-EAL-thread* RTE_LCORE_FOREACH(). (Morten Brørup) * Allow user-specified alignment, but limit max to cache line size. --- MAINTAINERS | 6 + config/rte_config.h | 1 + doc/api/doxy-api-index.md | 1 + .../prog_guide/env_abstraction_layer.rst | 45 +- doc/guides/rel_notes/release_24_11.rst | 14 + lib/eal/common/eal_common_lcore_var.c | 79 ++++ lib/eal/common/meson.build | 1 + lib/eal/include/meson.build | 1 + lib/eal/include/rte_lcore_var.h | 388 ++++++++++++++++++ lib/eal/version.map | 2 + 10 files changed, 532 insertions(+), 6 deletions(-) create mode 100644 lib/eal/common/eal_common_lcore_var.c create mode 100644 lib/eal/include/rte_lcore_var.h diff --git a/MAINTAINERS b/MAINTAINERS index c5a703b5c0..362d9a3f28 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -282,6 +282,12 @@ F: lib/eal/include/rte_random.h F: lib/eal/common/rte_random.c F: app/test/test_rand_perf.c +Lcore Variables +M: Mattias Rönnblom +F: lib/eal/include/rte_lcore_var.h +F: lib/eal/common/eal_common_lcore_var.c +F: app/test/test_lcore_var.c + ARM v7 M: Wathsala Vithanage F: config/arm/ diff --git a/config/rte_config.h b/config/rte_config.h index dd7bb0d35b..311692e498 100644 --- a/config/rte_config.h +++ b/config/rte_config.h @@ -41,6 +41,7 @@ /* EAL defines */ #define RTE_CACHE_GUARD_LINES 1 #define RTE_MAX_HEAPS 32 +#define RTE_MAX_LCORE_VAR 1048576 #define RTE_MAX_MEMSEG_LISTS 128 #define RTE_MAX_MEMSEG_PER_LIST 8192 #define RTE_MAX_MEM_MB_PER_LIST 32768 diff --git a/doc/api/doxy-api-index.md b/doc/api/doxy-api-index.md index f9f0300126..ed577f14ee 100644 --- a/doc/api/doxy-api-index.md +++ b/doc/api/doxy-api-index.md @@ -99,6 +99,7 @@ The public API headers are grouped by topics: [interrupts](@ref rte_interrupts.h), [launch](@ref rte_launch.h), [lcore](@ref rte_lcore.h), + [lcore variables](@ref rte_lcore_var.h), [per-lcore](@ref rte_per_lcore.h), [service cores](@ref rte_service.h), [keepalive](@ref rte_keepalive.h), diff --git a/doc/guides/prog_guide/env_abstraction_layer.rst b/doc/guides/prog_guide/env_abstraction_layer.rst index 9559c12a98..12b49672a6 100644 --- a/doc/guides/prog_guide/env_abstraction_layer.rst +++ b/doc/guides/prog_guide/env_abstraction_layer.rst @@ -433,12 +433,45 @@ with them once they're registered. Per-lcore and Shared Variables ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -.. note:: - - lcore refers to a logical execution unit of the processor, sometimes called a hardware *thread*. - -Shared variables are the default behavior. -Per-lcore variables are implemented using *Thread Local Storage* (TLS) to provide per-thread local storage. +By default static variables, blocks allocated on the DPDK heap, and +other type of memory is shared by all DPDK threads. + +An application, a DPDK library or PMD may keep opt to keep per-thread +state. + +Per-thread data may be maintained using either *lcore variables* +(``rte_lcore_var.h``), *thread-local storage (TLS)* +(``rte_per_lcore.h``), or a static array of ``RTE_MAX_LCORE`` +elements, index by ``rte_lcore_id()``. These methods allows for +per-lcore data to be a largely module-internal affair, and not +directly visible in its API. Another possibility is to have deal +explicitly with per-thread aspects in the API (e.g., the ports of the +Eventdev API). + +Lcore varibles are suitable for small object statically allocated at +the time of module or application initialization. An lcore variable +take on one value for each lcore id-equipped thread (i.e., for EAL +threads and registered non-EAL threads, in total ``RTE_MAX_LCORE`` +instances). The lifetime of lcore variables are detached from that of +the owning threads, and may thus be initialized prior to the owner +having been created. + +Variables with thread-local storage are allocated at the time of +thread creation, and exists until the thread terminates, for every +thread in the process. Only very small object should be allocated in +TLS, since large TLS objects significantly slows down thread creation +and may needlessly increase memory footprint for application that make +extensive use of unregistered threads. + +A common but now largely obsolete DPDK pattern is to use a static +array sized according to the maximum number of lcore id-equipped +threads (i.e., with ``RTE_MAX_LCORE`` elements). To avoid *false +sharing*, each element must both cache-aligned, and include a +``RTE_CACHE_GUARD``. Such extensive use of padding cause internal +fragmentation (i.e., unused space) and lower cache hit rates. + +For more discussions on per-lcore state, see the ``rte_lcore_var.h`` +API documentation. Logs ~~~~ diff --git a/doc/guides/rel_notes/release_24_11.rst b/doc/guides/rel_notes/release_24_11.rst index 0ff70d9057..a3884f7491 100644 --- a/doc/guides/rel_notes/release_24_11.rst +++ b/doc/guides/rel_notes/release_24_11.rst @@ -55,6 +55,20 @@ New Features Also, make sure to start the actual text at the margin. ======================================================= +* **Added EAL per-lcore static memory allocation facility.** + + Added EAL API for statically allocating small, + frequently-accessed data structures, for which one instance should + exist for each EAL thread and registered non-EAL thread. + + With lcore variables, data is organized spatially on a per-lcore id + basis, rather than per library or PMD, avoiding the need for cache + aligning (or RTE_CACHE_GUARDing) data structures, which in turn + reduces CPU cache internal fragmentation, improving performance. + + Lcore variables are similar to thread-local storage (TLS, e.g., + C11 _Thread_local), but decoupling the values' life time from that + of the threads. Removed Items ------------- diff --git a/lib/eal/common/eal_common_lcore_var.c b/lib/eal/common/eal_common_lcore_var.c new file mode 100644 index 0000000000..6b7690795e --- /dev/null +++ b/lib/eal/common/eal_common_lcore_var.c @@ -0,0 +1,79 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(c) 2024 Ericsson AB + */ + +#include +#include + +#ifdef RTE_EXEC_ENV_WINDOWS +#include +#endif + +#include +#include +#include + +#include + +#include "eal_private.h" + +#define LCORE_BUFFER_SIZE (RTE_MAX_LCORE_VAR * RTE_MAX_LCORE) + +static void *lcore_buffer; +static size_t offset = RTE_MAX_LCORE_VAR; + +static void * +lcore_var_alloc(size_t size, size_t align) +{ + void *handle; + unsigned int lcore_id; + void *value; + + offset = RTE_ALIGN_CEIL(offset, align); + + if (offset + size > RTE_MAX_LCORE_VAR) { +#ifdef RTE_EXEC_ENV_WINDOWS + lcore_buffer = _aligned_malloc(LCORE_BUFFER_SIZE, + RTE_CACHE_LINE_SIZE); +#else + lcore_buffer = aligned_alloc(RTE_CACHE_LINE_SIZE, + LCORE_BUFFER_SIZE); +#endif + RTE_VERIFY(lcore_buffer != NULL); + + offset = 0; + } + + handle = RTE_PTR_ADD(lcore_buffer, offset); + + offset += size; + + RTE_LCORE_VAR_FOREACH_VALUE(lcore_id, value, handle) + memset(value, 0, size); + + EAL_LOG(DEBUG, "Allocated %"PRIuPTR" bytes of per-lcore data with a " + "%"PRIuPTR"-byte alignment", size, align); + + return handle; +} + +void * +rte_lcore_var_alloc(size_t size, size_t align) +{ + /* Having the per-lcore buffer size aligned on cache lines + * assures as well as having the base pointer aligned on cache + * size assures that aligned offsets also translate to alipgned + * pointers across all values. + */ + RTE_BUILD_BUG_ON(RTE_MAX_LCORE_VAR % RTE_CACHE_LINE_SIZE != 0); + RTE_ASSERT(align <= RTE_CACHE_LINE_SIZE); + RTE_ASSERT(size <= RTE_MAX_LCORE_VAR); + + /* '0' means asking for worst-case alignment requirements */ + if (align == 0) + align = alignof(max_align_t); + + RTE_ASSERT(rte_is_power_of_2(align)); + + return lcore_var_alloc(size, align); +} diff --git a/lib/eal/common/meson.build b/lib/eal/common/meson.build index 22a626ba6f..d41403680b 100644 --- a/lib/eal/common/meson.build +++ b/lib/eal/common/meson.build @@ -18,6 +18,7 @@ sources += files( 'eal_common_interrupts.c', 'eal_common_launch.c', 'eal_common_lcore.c', + 'eal_common_lcore_var.c', 'eal_common_mcfg.c', 'eal_common_memalloc.c', 'eal_common_memory.c', diff --git a/lib/eal/include/meson.build b/lib/eal/include/meson.build index e94b056d46..9449253e23 100644 --- a/lib/eal/include/meson.build +++ b/lib/eal/include/meson.build @@ -27,6 +27,7 @@ headers += files( 'rte_keepalive.h', 'rte_launch.h', 'rte_lcore.h', + 'rte_lcore_var.h', 'rte_lock_annotations.h', 'rte_malloc.h', 'rte_mcslock.h', diff --git a/lib/eal/include/rte_lcore_var.h b/lib/eal/include/rte_lcore_var.h new file mode 100644 index 0000000000..e8db1391fe --- /dev/null +++ b/lib/eal/include/rte_lcore_var.h @@ -0,0 +1,388 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(c) 2024 Ericsson AB + */ + +#ifndef _RTE_LCORE_VAR_H_ +#define _RTE_LCORE_VAR_H_ + +/** + * @file + * + * RTE Lcore variables + * + * This API provides a mechanism to create and access per-lcore id + * variables in a space- and cycle-efficient manner. + * + * A per-lcore id variable (or lcore variable for short) has one value + * for each EAL thread and registered non-EAL thread. There is one + * instance for each current and future lcore id-equipped thread, with + * a total of RTE_MAX_LCORE instances. The value of an lcore variable + * for a particular lcore id is independent from other values (for + * other lcore ids) within the same lcore variable. + * + * In order to access the values of an lcore variable, a handle is + * used. The type of the handle is a pointer to the value's type + * (e.g., for an @c uint32_t lcore variable, the handle is a + * uint32_t *. The handle type is used to inform the + * access macros the type of the values. A handle may be passed + * between modules and threads just like any pointer, but its value + * must be treated as a an opaque identifier. An allocated handle + * never has the value NULL. + * + * @b Creation + * + * An lcore variable is created in two steps: + * 1. Define an lcore variable handle by using @ref RTE_LCORE_VAR_HANDLE. + * 2. Allocate lcore variable storage and initialize the handle with + * a unique identifier by @ref RTE_LCORE_VAR_ALLOC or + * @ref RTE_LCORE_VAR_INIT. Allocation generally occurs the time of + * module initialization, but may be done at any time. + * + * An lcore variable is not tied to the owning thread's lifetime. It's + * available for use by any thread immediately after having been + * allocated, and continues to be available throughout the lifetime of + * the EAL. + * + * Lcore variables cannot and need not be freed. + * + * @b Access + * + * The value of any lcore variable for any lcore id may be accessed + * from any thread (including unregistered threads), but it should + * only be *frequently* read from or written to by the owner. + * + * Values of the same lcore variable but owned by two different lcore + * ids may be frequently read or written by the owners without risking + * false sharing. + * + * An appropriate synchronization mechanism (e.g., atomic loads and + * stores) should employed to assure there are no data races between + * the owning thread and any non-owner threads accessing the same + * lcore variable instance. + * + * The value of the lcore variable for a particular lcore id is + * accessed using @ref RTE_LCORE_VAR_LCORE_VALUE. + * + * A common pattern is for an EAL thread or a registered non-EAL + * thread to access its own lcore variable value. For this purpose, a + * short-hand exists in the form of @ref RTE_LCORE_VAR_VALUE. + * + * Although the handle (as defined by @ref RTE_LCORE_VAR_HANDLE) is a + * pointer with the same type as the value, it may not be directly + * dereferenced and must be treated as an opaque identifier. + * + * Lcore variable handles and value pointers may be freely passed + * between different threads. + * + * @b Storage + * + * An lcore variable's values may by of a primitive type like @c int, + * but would more typically be a @c struct. + * + * The lcore variable handle introduces a per-variable (not + * per-value/per-lcore id) overhead of @c sizeof(void *) bytes, so + * there are some memory footprint gains to be made by organizing all + * per-lcore id data for a particular module as one lcore variable + * (e.g., as a struct). + * + * An application may choose to define an lcore variable handle, which + * it then it goes on to never allocate. + * + * The size of an lcore variable's value must be less than the DPDK + * build-time constant @c RTE_MAX_LCORE_VAR. + * + * The lcore variable are stored in a series of lcore buffers, which + * are allocated from the libc heap. Heap allocation failures are + * treated as fatal. + * + * Lcore variables should generally *not* be @ref __rte_cache_aligned + * and need *not* include a @ref RTE_CACHE_GUARD field, since the use + * of these constructs are designed to avoid false sharing. In the + * case of an lcore variable instance, the thread most recently + * accessing nearby data structures should almost-always be the lcore + * variables' owner. Adding padding will increase the effective memory + * working set size, potentially reducing performance. + * + * Lcore variable values take on an initial value of zero. + * + * @b Example + * + * Below is an example of the use of an lcore variable: + * + * @code{.c} + * struct foo_lcore_state { + * int a; + * long b; + * }; + * + * static RTE_LCORE_VAR_HANDLE(struct foo_lcore_state, lcore_states); + * + * long foo_get_a_plus_b(void) + * { + * struct foo_lcore_state *state = RTE_LCORE_VAR_VALUE(lcore_states); + * + * return state->a + state->b; + * } + * + * RTE_INIT(rte_foo_init) + * { + * RTE_LCORE_VAR_ALLOC(lcore_states); + * + * unsigned int lcore_id; + * struct foo_lcore_state *state; + * RTE_LCORE_VAR_FOREACH_VALUE(lcore_id, state, lcore_states) { + * (initialize 'state') + * } + * + * (other initialization) + * } + * @endcode + * + * + * @b Alternatives + * + * Lcore variables are designed to replace a pattern exemplified below: + * @code{.c} + * struct __rte_cache_aligned foo_lcore_state { + * int a; + * long b; + * RTE_CACHE_GUARD; + * }; + * + * static struct foo_lcore_state lcore_states[RTE_MAX_LCORE]; + * @endcode + * + * This scheme is simple and effective, but has one drawback: the data + * is organized so that objects related to all lcores for a particular + * module is kept close in memory. At a bare minimum, this requires + * sizing data structures (e.g., using `__rte_cache_aligned`) to an + * even number of cache lines to avoid false sharing. With CPU + * hardware prefetching and memory loads resulting from speculative + * execution (functions which seemingly are getting more eager faster + * than they are getting more intelligent), one or more "guard" cache + * lines may be required to separate one lcore's data from another's. + * + * Lcore variables have the upside of working with, not against, the + * CPU's assumptions and for example next-line prefetchers may well + * work the way its designers intended (i.e., to the benefit, not + * detriment, of system performance). + * + * Another alternative to @ref rte_lcore_var.h is the @ref + * rte_per_lcore.h API, which makes use of thread-local storage (TLS, + * e.g., GCC __thread or C11 _Thread_local). The main differences + * between by using the various forms of TLS (e.g., @ref + * RTE_DEFINE_PER_LCORE or _Thread_local) and the use of lcore + * variables are: + * + * * The existence and non-existence of a thread-local variable + * instance follow that of particular thread's. The data cannot be + * accessed before the thread has been created, nor after it has + * exited. As a result, thread-local variables must be initialized in + * a "lazy" manner (e.g., at the point of thread creation). Lcore + * variables may be accessed immediately after having been + * allocated (which may be prior any thread beyond the main + * thread is running). + * * A thread-local variable is duplicated across all threads in the + * process, including unregistered non-EAL threads (i.e., + * "regular" threads). For DPDK applications heavily relying on + * multi-threading (in conjunction to DPDK's "one thread per core" + * pattern), either by having many concurrent threads or + * creating/destroying threads at a high rate, an excessive use of + * thread-local variables may cause inefficiencies (e.g., + * increased thread creation overhead due to thread-local storage + * initialization or increased total RAM footprint usage). Lcore + * variables *only* exist for threads with an lcore id. + * * If data in thread-local storage may be shared between threads + * (i.e., can a pointer to a thread-local variable be passed to + * and successfully dereferenced by non-owning thread) depends on + * the details of the TLS implementation. With GCC __thread and + * GCC _Thread_local, such data sharing is supported. In the C11 + * standard, the result of accessing another thread's + * _Thread_local object is implementation-defined. Lcore variable + * instances may be accessed reliably by any thread. + */ + +#include +#include + +#include +#include +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * Given the lcore variable type, produces the type of the lcore + * variable handle. + */ +#define RTE_LCORE_VAR_HANDLE_TYPE(type) \ + type * + +/** + * Define an lcore variable handle. + * + * This macro defines a variable which is used as a handle to access + * the various instances of a per-lcore id variable. + * + * The aim with this macro is to make clear at the point of + * declaration that this is an lcore handle, rather than a regular + * pointer. + * + * Add @b static as a prefix in case the lcore variable is only to be + * accessed from a particular translation unit. + */ +#define RTE_LCORE_VAR_HANDLE(type, name) \ + RTE_LCORE_VAR_HANDLE_TYPE(type) name + +/** + * Allocate space for an lcore variable, and initialize its handle. + * + * The values of the lcore variable are initialized to zero. + */ +#define RTE_LCORE_VAR_ALLOC_SIZE_ALIGN(handle, size, align) \ + handle = rte_lcore_var_alloc(size, align) + +/** + * Allocate space for an lcore variable, and initialize its handle, + * with values aligned for any type of object. + * + * The values of the lcore variable are initialized to zero. + */ +#define RTE_LCORE_VAR_ALLOC_SIZE(handle, size) \ + RTE_LCORE_VAR_ALLOC_SIZE_ALIGN(handle, size, 0) + +/** + * Allocate space for an lcore variable of the size and alignment requirements + * suggested by the handle pointer type, and initialize its handle. + * + * The values of the lcore variable are initialized to zero. + */ +#define RTE_LCORE_VAR_ALLOC(handle) \ + RTE_LCORE_VAR_ALLOC_SIZE_ALIGN(handle, sizeof(*(handle)), \ + alignof(typeof(*(handle)))) + +/** + * Allocate an explicitly-sized, explicitly-aligned lcore variable by + * means of a @ref RTE_INIT constructor. + * + * The values of the lcore variable are initialized to zero. + */ +#define RTE_LCORE_VAR_INIT_SIZE_ALIGN(name, size, align) \ + RTE_INIT(rte_lcore_var_init_ ## name) \ + { \ + RTE_LCORE_VAR_ALLOC_SIZE_ALIGN(name, size, align); \ + } + +/** + * Allocate an explicitly-sized lcore variable by means of a @ref + * RTE_INIT constructor. + * + * The values of the lcore variable are initialized to zero. + */ +#define RTE_LCORE_VAR_INIT_SIZE(name, size) \ + RTE_LCORE_VAR_INIT_SIZE_ALIGN(name, size, 0) + +/** + * Allocate an lcore variable by means of a @ref RTE_INIT constructor. + * + * The values of the lcore variable are initialized to zero. + */ +#define RTE_LCORE_VAR_INIT(name) \ + RTE_INIT(rte_lcore_var_init_ ## name) \ + { \ + RTE_LCORE_VAR_ALLOC(name); \ + } + +/** + * Get void pointer to lcore variable instance with the specified + * lcore id. + * + * @param lcore_id + * The lcore id specifying which of the @c RTE_MAX_LCORE value + * instances should be accessed. The lcore id need not be valid + * (e.g., may be @ref LCORE_ID_ANY), but in such a case, the pointer + * is also not valid (and thus should not be dereferenced). + * @param handle + * The lcore variable handle. + */ +static inline void * +rte_lcore_var_lcore_ptr(unsigned int lcore_id, void *handle) +{ + return RTE_PTR_ADD(handle, lcore_id * RTE_MAX_LCORE_VAR); +} + +/** + * Get pointer to lcore variable instance with the specified lcore id. + * + * @param lcore_id + * The lcore id specifying which of the @c RTE_MAX_LCORE value + * instances should be accessed. The lcore id need not be valid + * (e.g., may be @ref LCORE_ID_ANY), but in such a case, the pointer + * is also not valid (and thus should not be dereferenced). + * @param handle + * The lcore variable handle. + */ +#define RTE_LCORE_VAR_LCORE_VALUE(lcore_id, handle) \ + ((typeof(handle))rte_lcore_var_lcore_ptr(lcore_id, handle)) + +/** + * Get pointer to lcore variable instance of the current thread. + * + * May only be used by EAL threads and registered non-EAL threads. + */ +#define RTE_LCORE_VAR_VALUE(handle) \ + RTE_LCORE_VAR_LCORE_VALUE(rte_lcore_id(), handle) + +/** + * Iterate over each lcore id's value for an lcore variable. + * + * @param lcore_id + * An unsigned int variable successively set to the + * lcore id of every valid lcore id (up to @c RTE_MAX_LCORE). + * @param value + * A pointer variable successively set to point to lcore variable + * value instance of the current lcore id being processed. + * @param handle + * The lcore variable handle. + */ +#define RTE_LCORE_VAR_FOREACH_VALUE(lcore_id, value, handle) \ + for (lcore_id = (((value) = RTE_LCORE_VAR_LCORE_VALUE(0, handle)), 0); \ + lcore_id < RTE_MAX_LCORE; \ + lcore_id++, (value) = RTE_LCORE_VAR_LCORE_VALUE(lcore_id, handle)) + +/** + * Allocate space in the per-lcore id buffers for an lcore variable. + * + * The pointer returned is only an opaque identifer of the variable. To + * get an actual pointer to a particular instance of the variable use + * @ref RTE_LCORE_VAR_VALUE or @ref RTE_LCORE_VAR_LCORE_VALUE. + * + * The lcore variable values' memory is set to zero. + * + * The allocation is always successful, barring a fatal exhaustion of + * the per-lcore id buffer space. + * + * rte_lcore_var_alloc() is not multi-thread safe. + * + * @param size + * The size (in bytes) of the variable's per-lcore id value. Must be > 0. + * @param align + * If 0, the values will be suitably aligned for any kind of type + * (i.e., alignof(max_align_t)). Otherwise, the values will be aligned + * on a multiple of *align*, which must be a power of 2 and equal or + * less than @c RTE_CACHE_LINE_SIZE. + * @return + * The variable's handle, stored in a void pointer value. The value + * is always non-NULL. + */ +__rte_experimental +void * +rte_lcore_var_alloc(size_t size, size_t align); + +#ifdef __cplusplus +} +#endif + +#endif /* _RTE_LCORE_VAR_H_ */ diff --git a/lib/eal/version.map b/lib/eal/version.map index e3ff412683..0c80bf7331 100644 --- a/lib/eal/version.map +++ b/lib/eal/version.map @@ -396,6 +396,8 @@ EXPERIMENTAL { # added in 24.03 rte_vfio_get_device_info; # WINDOWS_NO_EXPORT + + rte_lcore_var_alloc; }; INTERNAL { -- 2.34.1