From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 03BF145AAF; Fri, 4 Oct 2024 17:50:53 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id B0D93427B0; Fri, 4 Oct 2024 17:50:46 +0200 (CEST) Received: from egress-ip11b.ess.de.barracuda.com (egress-ip11b.ess.de.barracuda.com [18.185.115.215]) by mails.dpdk.org (Postfix) with ESMTP id 3BD76427D2 for ; Fri, 4 Oct 2024 17:50:44 +0200 (CEST) Received: from EUR03-DBA-obe.outbound.protection.outlook.com (mail-dbaeur03lp2170.outbound.protection.outlook.com [104.47.51.170]) by mx-outbound22-159.eu-central-1b.ess.aws.cudaops.com (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NO); Fri, 04 Oct 2024 15:50:43 +0000 ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=FN65CiGXZIlPeVoN4cX34ozhulm7WK55JPjZp44b2vitgX4NaC1tTW4sWG8vlNe2S9F5tDfQTfiMpoByfqZ9gcWeZqsBb5SIbrT4tLPmqNu/t/PBhOWl0BY+Hrf0rny/A3tT3RrV1Mv8dU0Ej2LAEGy2o/OOMuwD8bI2r7OTWYFaQFVkoNV0a60y2Jq7soni2MULsZ5VwoPK4eTBc2HDI1RdMUa/az06z9mWCXVFL10DuHUwVHZ4pEkQVZar+yXv18pO74KxzAozmVqtdHtXdHtwUDcLfee2bIDic8089wBnBsg5DKrGoRRMYliAaV3Fd4iOeGYHZmIYBHJhjnfvow== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=m7EsbddnTEzfze8bceOS5giOxKTQObkS2bk7iPi+jnc=; b=SAiK4ngWWnjZFa+UOEP0RoICIXb45TtrG+rQ9rDd/u1/xoZ9amdZyIanMHWA9jdI4FXqJLe/hVYIVCiXbG//PVymrtR4geSKCLRjuarsNj+elyRPoFJSWO4IxTAfe2yg3u03IhgjSjwzcNrsitszPLf537NR8vgo4vKeP+9UbwGX7lPYwpqGAr092dEPPOnFyRSatzxbP5SE2rF36nIxtY6yyn6/MQWXnvOWS8HguhoFwVsy+cqAJ8E1HBhAmcyVpV+oMHqmOFxlUQZgnPaYjbF9/FatUEteQixLG8hfPPkvmwkeoQeLyiTjGFH83JRlJYVtvk5eiTd+Rv8QoWVOAA== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=fail (sender ip is 178.72.21.4) smtp.rcpttodomain=dpdk.org smtp.mailfrom=napatech.com; dmarc=fail (p=reject sp=reject pct=100) action=oreject header.from=napatech.com; dkim=none (message not signed); arc=none (0) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=napatech.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=m7EsbddnTEzfze8bceOS5giOxKTQObkS2bk7iPi+jnc=; b=CnRwrTjrCM4ZHeiZjQ8mvkfpQz3AbqPuyv0L2S+VOn3+txIYbJnuZSRCZGoKimGeCadtMqnzWVwFJQAgQaO0r5fgrWkjGoDHPTBlHhQ3R6Qr3w/FGvgxl1Pan9LaqkGtqQNDipmobPcXzhTZ6f/Gx6ISE5rasPwcyXg/CWIIA24= Received: from AM0PR10CA0108.EURPRD10.PROD.OUTLOOK.COM (2603:10a6:208:e6::25) by DBAP190MB0824.EURP190.PROD.OUTLOOK.COM (2603:10a6:10:1a9::20) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8026.18; Fri, 4 Oct 2024 15:36:24 +0000 Received: from AM2PEPF0001C715.eurprd05.prod.outlook.com (2603:10a6:208:e6:cafe::e4) by AM0PR10CA0108.outlook.office365.com (2603:10a6:208:e6::25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8026.19 via Frontend Transport; Fri, 4 Oct 2024 15:36:24 +0000 X-MS-Exchange-Authentication-Results: spf=fail (sender IP is 178.72.21.4) smtp.mailfrom=napatech.com; dkim=none (message not signed) header.d=none;dmarc=fail action=oreject header.from=napatech.com; Received-SPF: Fail (protection.outlook.com: domain of napatech.com does not designate 178.72.21.4 as permitted sender) receiver=protection.outlook.com; client-ip=178.72.21.4; helo=localhost.localdomain; Received: from localhost.localdomain (178.72.21.4) by AM2PEPF0001C715.mail.protection.outlook.com (10.167.16.185) with Microsoft SMTP Server id 15.20.7918.13 via Frontend Transport; Fri, 4 Oct 2024 15:36:24 +0000 From: Serhii Iliushyk To: dev@dpdk.org Cc: mko-plv@napatech.com, sil-plv@napatech.com, ckm@napatech.com, andrew.rybchenko@oktetlabs.ru, ferruh.yigit@amd.com, Oleksandr Kolomeiets Subject: [PATCH v1 26/31] net/ntnic: add hasher (HSH) FPGA module Date: Fri, 4 Oct 2024 17:34:49 +0200 Message-ID: <20241004153551.267935-32-sil-plv@napatech.com> X-Mailer: git-send-email 2.45.0 In-Reply-To: <20241004153551.267935-1-sil-plv@napatech.com> References: <20241004153551.267935-1-sil-plv@napatech.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: AM2PEPF0001C715:EE_|DBAP190MB0824:EE_ Content-Type: text/plain X-MS-Office365-Filtering-Correlation-Id: 43b53cde-174a-41ef-18cd-08dce48a4e2b X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; ARA:13230040|1800799024|376014|36860700013|82310400026; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?f0Uj4BK44/gTkyJCooi5ret+XqA0vcpvMxwPpAnxFOxpZcnSM/vqvAlh9qiF?= =?us-ascii?Q?i441BeuPio+e1Ud8lxllNzx+ct3AIAoxvZ19vGoWyvVU8gvtcf1Tz8oDpJdq?= =?us-ascii?Q?jD1Z7AN5MzkPLmzjPXX2g2BWTAUOfIwb210JPZ7X3JMrju7w7D8Yg1cHbSzl?= =?us-ascii?Q?bjzKZibgS4LWeXHK7NUJLFZksJAs1V/x+bcaDiV3AF6hrya1PpOxwZML4qM5?= =?us-ascii?Q?9yyMIcGfikQXbH7I98qQ6ZTxJoW3t08Th3jmYptEpHinecFr59t3BhCELY6E?= =?us-ascii?Q?RF4841mLdo6uVRHOWKzAqoBVbqDh7pjNJsRVogXEvvzF5GcWXRXxMd1uY9u7?= =?us-ascii?Q?AUNB3QwNO6jvcQOjvW173lTli+IZnADWkOH8F687gTEsmDT+sbO7pEN/ytzm?= =?us-ascii?Q?45mpIre4DSmIj1G6nnBVICVbP9D85dvoZlYJUY4SJ1gCfw5NMuDQYU+bY37s?= =?us-ascii?Q?8FyzOZH7hn8HX0fNWEhApbdhV4OOxfCIpntDHMnwxq/o98KYfvwRQgXlQpdX?= =?us-ascii?Q?HEthL+Yh8qa+hchayZ9pQSKUi8kXmYQkSxVmvX4QhLruxfv0wEzqv/8gpn2U?= =?us-ascii?Q?x9czb4oxc8FHiOixKHV7vQPSFSWaCvR/LHZu3hDWsrBzQqisRqHckGP6EHcO?= =?us-ascii?Q?SiJ1mjAAgZjswcOzKDq5IgL2ZuBX0j7KhWIcwOTEm74SzBMpCw9VpT6AD/dk?= =?us-ascii?Q?wPnrRkweUHBv2zRAkWYg4D1LY1/baTJdY1CHAdo0PptSjYGCXJAGZaKo7Qe/?= =?us-ascii?Q?Qu/ikf9GpYDvaqSy1KPq+uHzjWKX5tvTmESQ8tmP8T6M1WZPhPv2QhJGjgGY?= =?us-ascii?Q?CIAsKcWuUxcd+hOEPWDxuWgQ1Uhl6eFeVh11uauChCvTTGWNJZJk2la611vF?= =?us-ascii?Q?K0OO+noX84H+N7w/0e5Ge9dfdzUUvez3oKHeLcopoFFrhpzzKQOsNrKhmBbk?= =?us-ascii?Q?hM5+3W8aaOIAyoEqQEOg29qwTfM9iIlQiFM9nkSIwd8lFUO1dNQlUSuQUQmQ?= =?us-ascii?Q?44/mByM/sIHxRX+grSbuS+jV3wr0gpShKWcVTedLXnSDa+0iXkeaAS8GKlgF?= =?us-ascii?Q?npwefDdA6WsmlcXW04DqSX4B2wS7Ol6czmkJE9yhc1C2yu9z+TO0D/ZMY8QM?= =?us-ascii?Q?EoJEKOSKfJ0bWnTynJ79fYtiGN/9BQVAoQDvAc2BesBTXvoONzG7mphhyRFK?= =?us-ascii?Q?upQfI9Dnrbyj6MWlLIkQ7P+XqaSPKsh0HgzsqItHcM33wPc0nQqdAY2r+V/1?= =?us-ascii?Q?i9o1oyZPtomT1o2/2lLCxv45p/5IsoredCljYyqskdgcqmMU3122qUqKrVWe?= =?us-ascii?Q?COqyIyq06gaKyPNmvMKyVv//BOHNJXba2D/qI+81QOxDHc9wDuKwhm0HAHES?= =?us-ascii?Q?BhRuqEXthIiVi4UY7/gh2+ewW4C2?= X-Forefront-Antispam-Report: CIP:178.72.21.4; CTRY:DK; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:localhost.localdomain; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230040)(1800799024)(376014)(36860700013)(82310400026); DIR:OUT; SFP:1102; X-MS-Exchange-AntiSpam-ExternalHop-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-ExternalHop-MessageData-0: lwTIN9QHeuc7SsJbOxpXDZW04yHOkh/UizP3ceKS0fNWyEqzub5KuyH0JjiW9Bec7wVJ0ZuWB5gGlb5TrFerFqIGQIGkzQKALcaVw5ds7UPTB9q7iCSJ14d/HPTCz/C8/x6F9NOaQP9Bo0Olj0k7BALbZEkneW7VS+wEmDR/yIH7RIk/8S62LYV6r0JkaFB4d1zXJJDLrMOzuIoXKEODXcvs3TsABRCOojEb+quPKhfDpGlTUcxyju6uiXerqC97jghJZXVkRW1oARCUnv3aEp4W4Yi3EAdlUSfTWpZRwAFBgL4VVe5ChUJ6yN+Uo+gtrL/z9lT0MuxSr0llStpHNZB1bszCimXIQzQFggwlWkBdrLplGXsRCh2LMj7AFRr5NXnJVW+F8gZEoADS03hKGcTJmZPmHm/Zpdo8qw7B86YJdJya4zfhjeUpDLIA6eznVK7MX4JS51hc4ldA6+6jf+Qy30BUiPi36k1coKWudGW134jgMJLYK+ISfSc0AqkJ2qaESved2w5IT0ZPBf4u4x3S6PDI/byTbaI+KhoOzVIA2JDgLBS4qwxGW9bpCr/ZQNU5Y+lR6Gm1hHtBjQphce1VEC6REF47giV1rDe2g+fZPct1KHx5rDY00DfiDaIG/9DgbUVDHZgXyjJLZaZ/YA== X-MS-Exchange-CrossTenant-OriginalArrivalTime: 04 Oct 2024 15:36:24.5959 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 43b53cde-174a-41ef-18cd-08dce48a4e2b X-MS-Exchange-CrossTenant-Id: c4540d0b-728a-4233-9da5-9ea30c7ec3ed X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=c4540d0b-728a-4233-9da5-9ea30c7ec3ed; Ip=[178.72.21.4]; Helo=[localhost.localdomain] X-MS-Exchange-CrossTenant-AuthSource: AM2PEPF0001C715.eurprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DBAP190MB0824 X-OriginatorOrg: napatech.com X-BESS-ID: 1728057043-305791-12642-36002-1 X-BESS-VER: 2019.1_20240924.1654 X-BESS-Apparent-Source-IP: 104.47.51.170 X-BESS-Parts: H4sIAAAAAAACA4uuVkqtKFGyUioBkjpK+cVKVpYGloZAVgZQMNHIKNU4NcnCMD XRzNQ01Twl0dTCOMnAMNnMMik5OTFRqTYWADt/UBNBAAAA X-BESS-Outbound-Spam-Score: 0.00 X-BESS-Outbound-Spam-Report: Code version 3.2, rules version 3.2.2.259494 [from cloudscan16-215.eu-central-1b.ess.aws.cudaops.com] Rule breakdown below pts rule name description ---- ---------------------- -------------------------------- 0.00 BSF_BESS_OUTBOUND META: BESS Outbound X-BESS-Outbound-Spam-Status: SCORE=0.00 using account:ESS113687 scores of KILL_LEVEL=7.0 tests=BSF_BESS_OUTBOUND X-BESS-BRTS-Status: 1 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Oleksandr Kolomeiets The Hasher module calculates a configurable hash value to be used internally by the FPGA. The module support both Toeplitz and NT-hash. Signed-off-by: Oleksandr Kolomeiets --- drivers/net/ntnic/include/hw_mod_backend.h | 36 ++++++++ drivers/net/ntnic/meson.build | 1 + drivers/net/ntnic/nthw/flow_api/flow_api.c | 3 + .../nthw/flow_api/hw_mod/hw_mod_backend.c | 1 + .../ntnic/nthw/flow_api/hw_mod/hw_mod_hsh.c | 84 +++++++++++++++++++ .../supported/nthw_fpga_9563_055_049_0000.c | 39 ++++++++- 6 files changed, 163 insertions(+), 1 deletion(-) create mode 100644 drivers/net/ntnic/nthw/flow_api/hw_mod/hw_mod_hsh.c diff --git a/drivers/net/ntnic/include/hw_mod_backend.h b/drivers/net/ntnic/include/hw_mod_backend.h index 3933d4bf53..6bf651272f 100644 --- a/drivers/net/ntnic/include/hw_mod_backend.h +++ b/drivers/net/ntnic/include/hw_mod_backend.h @@ -493,6 +493,41 @@ struct hsh_func_s { struct hw_mod_hsh_v5_s v5; }; }; +enum hw_hsh_e { + /* functions */ + HW_HSH_RCP_PRESET_ALL = 0, + HW_HSH_RCP_COMPARE, + HW_HSH_RCP_FIND, + /* fields */ + HW_HSH_RCP_LOAD_DIST_TYPE = FIELD_START_INDEX, + HW_HSH_RCP_MAC_PORT_MASK, + HW_HSH_RCP_SORT, + HW_HSH_RCP_QW0_PE, + HW_HSH_RCP_QW0_OFS, + HW_HSH_RCP_QW4_PE, + HW_HSH_RCP_QW4_OFS, + HW_HSH_RCP_W8_PE, + HW_HSH_RCP_W8_OFS, + HW_HSH_RCP_W8_SORT, + HW_HSH_RCP_W9_PE, + HW_HSH_RCP_W9_OFS, + HW_HSH_RCP_W9_SORT, + HW_HSH_RCP_W9_P, + HW_HSH_RCP_P_MASK, + HW_HSH_RCP_WORD_MASK, + HW_HSH_RCP_SEED, + HW_HSH_RCP_TNL_P, + HW_HSH_RCP_HSH_VALID, + HW_HSH_RCP_HSH_TYPE, + HW_HSH_RCP_TOEPLITZ, + HW_HSH_RCP_K, + HW_HSH_RCP_AUTO_IPV4_MASK +}; +bool hw_mod_hsh_present(struct flow_api_backend_s *be); +int hw_mod_hsh_alloc(struct flow_api_backend_s *be); +void hw_mod_hsh_free(struct flow_api_backend_s *be); +int hw_mod_hsh_reset(struct flow_api_backend_s *be); +int hw_mod_hsh_rcp_flush(struct flow_api_backend_s *be, int start_idx, int count); struct qsl_func_s { COMMON_FUNC_INFO_S; @@ -685,6 +720,7 @@ struct flow_api_backend_s { struct cat_func_s cat; struct km_func_s km; struct flm_func_s flm; + struct hsh_func_s hsh; /* NIC attributes */ unsigned int num_phy_ports; diff --git a/drivers/net/ntnic/meson.build b/drivers/net/ntnic/meson.build index 9af7e3d813..18aafc57f0 100644 --- a/drivers/net/ntnic/meson.build +++ b/drivers/net/ntnic/meson.build @@ -51,6 +51,7 @@ sources = files( 'nthw/flow_api/hw_mod/hw_mod_backend.c', 'nthw/flow_api/hw_mod/hw_mod_cat.c', 'nthw/flow_api/hw_mod/hw_mod_flm.c', + 'nthw/flow_api/hw_mod/hw_mod_hsh.c', 'nthw/flow_api/hw_mod/hw_mod_km.c', 'nthw/flow_filter/flow_nthw_cat.c', 'nthw/flow_filter/flow_nthw_csu.c', diff --git a/drivers/net/ntnic/nthw/flow_api/flow_api.c b/drivers/net/ntnic/nthw/flow_api/flow_api.c index d39bdc9936..b43c8fef1a 100644 --- a/drivers/net/ntnic/nthw/flow_api/flow_api.c +++ b/drivers/net/ntnic/nthw/flow_api/flow_api.c @@ -290,6 +290,9 @@ struct flow_nic_dev *flow_api_create(uint8_t adapter_no, const struct flow_api_b if (init_resource_elements(ndev, RES_KM_CATEGORY, ndev->be.km.nb_categories)) goto err_exit; + if (init_resource_elements(ndev, RES_HSH_RCP, ndev->be.hsh.nb_rcp)) + goto err_exit; + if (init_resource_elements(ndev, RES_SLC_LR_RCP, ndev->be.max_categories)) goto err_exit; diff --git a/drivers/net/ntnic/nthw/flow_api/hw_mod/hw_mod_backend.c b/drivers/net/ntnic/nthw/flow_api/hw_mod/hw_mod_backend.c index fe66493336..3ccc14c4ce 100644 --- a/drivers/net/ntnic/nthw/flow_api/hw_mod/hw_mod_backend.c +++ b/drivers/net/ntnic/nthw/flow_api/hw_mod/hw_mod_backend.c @@ -20,6 +20,7 @@ static const struct { { "CAT", hw_mod_cat_alloc, hw_mod_cat_free, hw_mod_cat_reset, hw_mod_cat_present }, { "KM", hw_mod_km_alloc, hw_mod_km_free, hw_mod_km_reset, hw_mod_km_present }, { "FLM", hw_mod_flm_alloc, hw_mod_flm_free, hw_mod_flm_reset, hw_mod_flm_present }, + { "HSH", hw_mod_hsh_alloc, hw_mod_hsh_free, hw_mod_hsh_reset, hw_mod_hsh_present }, }; #define MOD_COUNT (ARRAY_SIZE(module)) diff --git a/drivers/net/ntnic/nthw/flow_api/hw_mod/hw_mod_hsh.c b/drivers/net/ntnic/nthw/flow_api/hw_mod/hw_mod_hsh.c new file mode 100644 index 0000000000..77dfbb5374 --- /dev/null +++ b/drivers/net/ntnic/nthw/flow_api/hw_mod/hw_mod_hsh.c @@ -0,0 +1,84 @@ +/* + * SPDX-License-Identifier: BSD-3-Clause + * Copyright(c) 2023 Napatech A/S + */ + +#include +#include +#include + +#include "hw_mod_backend.h" + +#define _MOD_ "HSH" +#define _VER_ be->hsh.ver + +bool hw_mod_hsh_present(struct flow_api_backend_s *be) +{ + return be->iface->get_hsh_present(be->be_dev); +} + +int hw_mod_hsh_alloc(struct flow_api_backend_s *be) +{ + int nb; + _VER_ = be->iface->get_hsh_version(be->be_dev); + NT_LOG(DBG, FILTER, "HSH MODULE VERSION %i.%i\n", VER_MAJOR(_VER_), VER_MINOR(_VER_)); + + /* detect number of HSH categories supported by FPGA */ + nb = be->iface->get_nb_hsh_categories(be->be_dev); + + if (nb <= 0) + return COUNT_ERROR(hsh_categories); + + be->hsh.nb_rcp = (uint32_t)nb; + + /* detect if Toeplitz hashing function is supported by FPGA */ + nb = be->iface->get_nb_hsh_toeplitz(be->be_dev); + + if (nb < 0) + return COUNT_ERROR(hsh_toeplitz); + + be->hsh.toeplitz = (uint32_t)nb; + + switch (_VER_) { + case 5: + if (!callocate_mod((struct common_func_s *)&be->hsh, 1, &be->hsh.v5.rcp, + be->hsh.nb_rcp, sizeof(struct hsh_v5_rcp_s))) + return -1; + + break; + + /* end case 5 */ + default: + return UNSUP_VER; + } + + return 0; +} + +void hw_mod_hsh_free(struct flow_api_backend_s *be) +{ + if (be->hsh.base) { + free(be->hsh.base); + be->hsh.base = NULL; + } +} + +int hw_mod_hsh_reset(struct flow_api_backend_s *be) +{ + /* Zero entire cache area */ + zero_module_cache((struct common_func_s *)(&be->hsh)); + + NT_LOG(DBG, FILTER, "INIT HSH RCP\n"); + return hw_mod_hsh_rcp_flush(be, 0, be->hsh.nb_rcp); +} + +int hw_mod_hsh_rcp_flush(struct flow_api_backend_s *be, int start_idx, int count) +{ + if (count == ALL_ENTRIES) + count = be->hsh.nb_rcp; + + if ((start_idx + count) > (int)be->hsh.nb_rcp) + return INDEX_TOO_LARGE; + + return be->iface->hsh_rcp_flush(be->be_dev, &be->hsh, start_idx, count); +} diff --git a/drivers/net/ntnic/nthw/supported/nthw_fpga_9563_055_049_0000.c b/drivers/net/ntnic/nthw/supported/nthw_fpga_9563_055_049_0000.c index a003334a23..4317da8094 100644 --- a/drivers/net/ntnic/nthw/supported/nthw_fpga_9563_055_049_0000.c +++ b/drivers/net/ntnic/nthw/supported/nthw_fpga_9563_055_049_0000.c @@ -544,6 +544,42 @@ static nthw_fpga_register_init_s hif_registers[] = { { HIF_UUID3, 176, 32, NTHW_FPGA_REG_TYPE_RO, 462142918, 1, hif_uuid3_fields }, }; +static nthw_fpga_field_init_s hsh_rcp_ctrl_fields[] = { + { HSH_RCP_CTRL_ADR, 4, 0, 0x0000 }, + { HSH_RCP_CTRL_CNT, 16, 16, 0x0000 }, +}; + +static nthw_fpga_field_init_s hsh_rcp_data_fields[] = { + { HSH_RCP_DATA_AUTO_IPV4_MASK, 1, 742, 0x0000 }, + { HSH_RCP_DATA_HSH_TYPE, 5, 416, 0x0000 }, + { HSH_RCP_DATA_HSH_VALID, 1, 415, 0x0000 }, + { HSH_RCP_DATA_K, 320, 422, 0x0000 }, + { HSH_RCP_DATA_LOAD_DIST_TYPE, 2, 0, 0x0000 }, + { HSH_RCP_DATA_MAC_PORT_MASK, 2, 2, 0x0000 }, + { HSH_RCP_DATA_P_MASK, 1, 61, 0x0000 }, + { HSH_RCP_DATA_QW0_OFS, 8, 11, 0x0000 }, + { HSH_RCP_DATA_QW0_PE, 5, 6, 0x0000 }, + { HSH_RCP_DATA_QW4_OFS, 8, 24, 0x0000 }, + { HSH_RCP_DATA_QW4_PE, 5, 19, 0x0000 }, + { HSH_RCP_DATA_SEED, 32, 382, 0x0000 }, + { HSH_RCP_DATA_SORT, 2, 4, 0x0000 }, + { HSH_RCP_DATA_TNL_P, 1, 414, 0x0000 }, + { HSH_RCP_DATA_TOEPLITZ, 1, 421, 0x0000 }, + { HSH_RCP_DATA_W8_OFS, 8, 37, 0x0000 }, + { HSH_RCP_DATA_W8_PE, 5, 32, 0x0000 }, + { HSH_RCP_DATA_W8_SORT, 1, 45, 0x0000 }, + { HSH_RCP_DATA_W9_OFS, 8, 51, 0x0000 }, + { HSH_RCP_DATA_W9_P, 1, 60, 0x0000 }, + { HSH_RCP_DATA_W9_PE, 5, 46, 0x0000 }, + { HSH_RCP_DATA_W9_SORT, 1, 59, 0x0000 }, + { HSH_RCP_DATA_WORD_MASK, 320, 62, 0x0000 }, +}; + +static nthw_fpga_register_init_s hsh_registers[] = { + { HSH_RCP_CTRL, 0, 32, NTHW_FPGA_REG_TYPE_WO, 0, 2, hsh_rcp_ctrl_fields }, + { HSH_RCP_DATA, 1, 743, NTHW_FPGA_REG_TYPE_WO, 0, 23, hsh_rcp_data_fields }, +}; + static nthw_fpga_field_init_s iic_adr_fields[] = { { IIC_ADR_SLV_ADR, 7, 1, 0 }, }; @@ -1398,6 +1434,7 @@ static nthw_fpga_module_init_s fpga_modules[] = { gpio_phy_registers }, { MOD_HIF, 0, MOD_HIF, 0, 0, NTHW_FPGA_BUS_TYPE_PCI, 0, 18, hif_registers }, + { MOD_HSH, 0, MOD_HSH, 0, 5, NTHW_FPGA_BUS_TYPE_RAB1, 1536, 2, hsh_registers }, { MOD_IIC, 0, MOD_IIC, 0, 1, NTHW_FPGA_BUS_TYPE_RAB0, 768, 22, iic_registers }, { MOD_IIC, 1, MOD_IIC, 0, 1, NTHW_FPGA_BUS_TYPE_RAB0, 896, 22, iic_registers }, { MOD_IIC, 2, MOD_IIC, 0, 1, NTHW_FPGA_BUS_TYPE_RAB0, 24832, 22, iic_registers }, @@ -1580,5 +1617,5 @@ static nthw_fpga_prod_param_s product_parameters[] = { }; nthw_fpga_prod_init_s nthw_fpga_9563_055_049_0000 = { - 200, 9563, 55, 49, 0, 0, 1726740521, 152, product_parameters, 17, fpga_modules, + 200, 9563, 55, 49, 0, 0, 1726740521, 152, product_parameters, 18, fpga_modules, }; -- 2.45.0