From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 4218445ACC; Sun, 6 Oct 2024 22:38:34 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 4DEF6406FF; Sun, 6 Oct 2024 22:37:50 +0200 (CEST) Received: from egress-ip42b.ess.de.barracuda.com (egress-ip42b.ess.de.barracuda.com [18.185.115.246]) by mails.dpdk.org (Postfix) with ESMTP id 6020D40669 for ; Sun, 6 Oct 2024 22:37:41 +0200 (CEST) Received: from EUR02-VI1-obe.outbound.protection.outlook.com (mail-vi1eur02lp2044.outbound.protection.outlook.com [104.47.11.44]) by mx-outbound22-159.eu-central-1b.ess.aws.cudaops.com (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NO); Sun, 06 Oct 2024 20:37:40 +0000 ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=TAWv1iTQ2zzJ9NE/5EEVYtBd3aNyQiRZj/9uLlITrnBKzJRKeHjIYmxGMm006yeZwdf006/Mc4CBgdB3/o27NhHJC9c6O10YQfJbYbJkFEUfl9Uvh8KOKXOx85tX0INiDIzRsLYIlyt/TAhLYoRUZmP3iEzTTcGobPklOdNjWjzKqzT/aPd+dv6xk3djsWPu1BxHdAlAulZeH0IWG9uTuvf3IBpTfbQZjNejvFCpoRC/vgVvKoh50V/TLsER4X3D7xJLbLPweBbtkDdxXqynnkft/ilJYIfxKe3SuPJI8N6htwiY2n1puOuXKoHAiN61WMumnWK2LPIpX+eyEDXC8Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=PkI2O2Yy0dRfXTgFsOREU5r9N8GXa+7OoFMHpWtWl8c=; b=Y50q2SOZJRwLOyaYQUhKJn2f5+uutq2b2sR0ks5Fepev/y3Am7gsW3aaD4CWu0sFq2uqCHB/X/of4wsxizITvik6uB1vomSw+zPvE+uqyyLQygkoIMRqSIy7j4J9ELM+DIiWw38PG76ND/mVZU8rJuR5+yx5qdYwwyswlSAjRKn1YwoimmedktCWtGBlDBj8GNiXmQGBb9x3yhZEUm+pXFG/2lrKLU7TxKxtuX9rRSCz5SzZuD+4grAzy/hZj6ZainyeXHlrHikTzxt1CSF2d5hLMJiEAO99ZLFwZSLSmfFibopncTCJVv1DOQzEMbFEkey7TU+DnNWN6mYjZyzpGA== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=fail (sender ip is 178.72.21.4) smtp.rcpttodomain=dpdk.org smtp.mailfrom=napatech.com; dmarc=fail (p=reject sp=reject pct=100) action=oreject header.from=napatech.com; dkim=none (message not signed); arc=none (0) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=napatech.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=PkI2O2Yy0dRfXTgFsOREU5r9N8GXa+7OoFMHpWtWl8c=; b=c8pLdBdbHwTXPY7Mb6qVcMeUNUzeo7EExS2xO1M7jNk905G6wCnkZ5Yg6gIjuazDR1/kJe9ZF1sovwyUgDM92DMHGDzWzIFF8iiPcIwzH43zR26i/Ho41V2F6f84t5GPcsyiBQud3WSsyn4GKAOBU6lnsWeYvNYXnrb+UusyQt8= Received: from AM6PR04CA0006.eurprd04.prod.outlook.com (2603:10a6:20b:92::19) by DB8P190MB0780.EURP190.PROD.OUTLOOK.COM (2603:10a6:10:124::19) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8026.20; Sun, 6 Oct 2024 20:37:33 +0000 Received: from AMS0EPF00000190.eurprd05.prod.outlook.com (2603:10a6:20b:92:cafe::5c) by AM6PR04CA0006.outlook.office365.com (2603:10a6:20b:92::19) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8026.20 via Frontend Transport; Sun, 6 Oct 2024 20:37:33 +0000 X-MS-Exchange-Authentication-Results: spf=fail (sender IP is 178.72.21.4) smtp.mailfrom=napatech.com; dkim=none (message not signed) header.d=none;dmarc=fail action=oreject header.from=napatech.com; Received-SPF: Fail (protection.outlook.com: domain of napatech.com does not designate 178.72.21.4 as permitted sender) receiver=protection.outlook.com; client-ip=178.72.21.4; helo=localhost.localdomain; Received: from localhost.localdomain (178.72.21.4) by AMS0EPF00000190.mail.protection.outlook.com (10.167.16.213) with Microsoft SMTP Server id 15.20.7918.13 via Frontend Transport; Sun, 6 Oct 2024 20:37:33 +0000 From: Serhii Iliushyk To: dev@dpdk.org Cc: mko-plv@napatech.com, sil-plv@napatech.com, ckm@napatech.com, andrew.rybchenko@oktetlabs.ru, ferruh.yigit@amd.com, Danylo Vodopianov , Thomas Monjalon Subject: [PATCH v1 02/50] net/ntnic: fix coverity issues: Date: Sun, 6 Oct 2024 22:36:29 +0200 Message-ID: <20241006203728.330792-3-sil-plv@napatech.com> X-Mailer: git-send-email 2.45.0 In-Reply-To: <20241006203728.330792-1-sil-plv@napatech.com> References: <20241006203728.330792-1-sil-plv@napatech.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: AMS0EPF00000190:EE_|DB8P190MB0780:EE_ Content-Type: text/plain X-MS-Office365-Filtering-Correlation-Id: 8ebefe55-7b3c-4616-5ff7-08dce646b4d3 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; ARA:13230040|1800799024|376014|36860700013|82310400026; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?2FGgZa3SoVxQ8/ExnazjZ67e83+LD3zM/8E5fMtM07l0sJUGUwRntB8bn+KJ?= =?us-ascii?Q?T+76rBIMGW8WebEhahc6LXE7ZfeeB+Xm8a370Q3mSw9w7Y+zSUxEASWqi7R4?= =?us-ascii?Q?gCET5MFjB/zhRSx+b0l/ON8ZdYH3OglAcVaYrnG+BZp5T6JjcL26keU7Q20H?= =?us-ascii?Q?11OTmLtvm4VeNYukmko9rTwcZBsmruKo+wVryhqMJV7eMFtNIgdG+GHXinuj?= =?us-ascii?Q?f7fAT4Knr0RkBy2pBIFVlVermxPWOiAF/8p4IOCbuDqKokpfafa5/ZLAIE9x?= =?us-ascii?Q?qzBi37Y2IrkMHBwG9qIjzkDSDGgcgOmu6Wlzr5hSEYeypralIaYJWkDtMK29?= =?us-ascii?Q?62IyYiLXgi+nqaRInIsIPLvhb/EPxsWQsDqnRRtfqKdfb16hO242sA9lkT7/?= =?us-ascii?Q?UPas9o7HKqsNEo9UVFOXbSLHOOygOTG8A8UHQhohMVTn+46WbHCbDUKtluZl?= =?us-ascii?Q?VYS3CFWVvo+NxAL1LaDQr4c7bWqJjRpphB3Q2XCJcY7yW0MGnNL45lKySYiL?= =?us-ascii?Q?Wxhg/wG2Tjhc7A626MwZVYcqjW/pD/j8LjM5oac9l2Qc1ZnLUrqBLKy9yeuP?= =?us-ascii?Q?zNBLlOC8ewzd7bTgX2h27+PrDOpYvggwF+B2KHic1HNw9cIBNA0UirkCV3Pc?= =?us-ascii?Q?/w/OY8YYgoSc9h+xcKAKzu0Tcne8bJdztWS2+9TP/3ATl1f0844ELVaXRATm?= =?us-ascii?Q?JHUJc2piX/pD4VT8fviQSbZvppmRKgbz/6yibgKqoJQSV0zfso8SjGTUxUJu?= =?us-ascii?Q?Vs506E/yv0q7W+T744yFClKvlL8R3Lzfky7GdKWNPJPoVX/gebxyLyHMv4gW?= =?us-ascii?Q?Xtk/fvCxACMG5N84c0NWmc8UVc07X+OHz/WOMx1Ul+gAvD9AkpBO8pbo5aSU?= =?us-ascii?Q?p3YQVhy1yE4nsDwQlDFODG658rYDx6h9aekS4UqDEr3tKyLMK0ScKnCZKyhC?= =?us-ascii?Q?PjDlp2XV+ukOz5itFXm5vws9qqB2SWtC+rQzSyvXBHFXxk/66mwP8T1MQTUX?= =?us-ascii?Q?dDQp38siTdt4h3TxSKLhNT1fFMyvvf9mDWBMys0MrCrbdxZIufidwWMFo4X7?= =?us-ascii?Q?rEYMh9MF3i5VDY1G+79X0pY7DKPC7h5pOo+E80xKvihVRqzCsuRKo4HRO8od?= =?us-ascii?Q?mLriWYM07eS9oVxCJRrzuc4LpxWgjxk2znyLMevnzhq4H7ZXXnjB3Ty2G5Wr?= =?us-ascii?Q?JRTnPPfedntWNVaaaXNm9xNnhnVJ4MjuIGD9ujpIfmAw1a86SRmQFbBQRPJ2?= =?us-ascii?Q?VKFb/ik0Mg4BDKni0kpBQJx0n9LJ1BVosZsZHhP1D9YMSQyN+ZYQYAGgukht?= =?us-ascii?Q?GMWZ6w9fpG9S6GwHsGrp0QGFKF/27TpV8S7gZ016pupYNuo/rmkZbtvu0reX?= =?us-ascii?Q?SIBRu1myZFoDnRwkxGXi1hAjtW6U?= X-Forefront-Antispam-Report: CIP:178.72.21.4; CTRY:DK; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:localhost.localdomain; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230040)(1800799024)(376014)(36860700013)(82310400026); DIR:OUT; SFP:1102; X-MS-Exchange-AntiSpam-ExternalHop-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-ExternalHop-MessageData-0: l/4t0QBLjFA2BMcg8Jz/mxJRo9AxqsyzLOVjjwMCsCLszvKxEHZ0k36ArgMX/pPCMvyZjl4BymaRAuh5iYJasK8qMhDwQ57cYuX5LUvfz2N7qfEu/BPnleO7ZksGM5u9HinK5F/aNIkXUk10i74Ed0zza6iQOoFcGDCnX9K93/ZjIof3XqRBDQzQVQNaItdCj8TqFIlyCrGZw/qEAJKJns3t1OuFZiOR2P2ZkA8i4F9v1Bpa2K/DJlcPUcDn8aK1xMKuc3yFbBYd9IRiIXRJQZq4a7fAao4ht4kUF2nep1urVeMi3I7ehJttJNf77PmUpfWxibK71tC7pWGS50a34nz26VCCk9h0AOl5ayulJFkOKXQt7yXptZK9miS54op7GK4sZA8ejmPCBxLUjpv5kbDbcZeLVs0GT6uKSs+3hffcIEIb4pySMQvAeWogrsDnK4jCeXKnLLd4sVguqWfqc2df1PSOAgiZ1f+y6E5V9amjk7Ul05mzMetLj+bpnbeNmAe5DV64YfvDvgfPrN6ua4s0c8LDGttpVHx30V2KajbQmPkosMWQlB+VZDNl/kLtv6jhu8WG6r8XYF8We4gYaf5nkdxAlSDwxGiUTcjuRnyKVXD/5bvITU3nM4kK4J7p1pGdirH8v7XWLbG5XWIn2w== X-OriginatorOrg: napatech.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 06 Oct 2024 20:37:33.3587 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 8ebefe55-7b3c-4616-5ff7-08dce646b4d3 X-MS-Exchange-CrossTenant-Id: c4540d0b-728a-4233-9da5-9ea30c7ec3ed X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=c4540d0b-728a-4233-9da5-9ea30c7ec3ed; Ip=[178.72.21.4]; Helo=[localhost.localdomain] X-MS-Exchange-CrossTenant-AuthSource: AMS0EPF00000190.eurprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB8P190MB0780 X-BESS-ID: 1728247055-305791-12646-147787-2 X-BESS-VER: 2019.1_20240924.1654 X-BESS-Apparent-Source-IP: 104.47.11.44 X-BESS-Parts: H4sIAAAAAAACA4uuVkqtKFGyUioBkjpK+cVKVoaGBgaGQGYGUNTM1NLQKNUyzd DAyNwwKcnQyNAy2cjU1Nw4LTHZyMwkUak2FgAsB3MOQgAAAA== X-BESS-Outbound-Spam-Score: 0.50 X-BESS-Outbound-Spam-Report: Code version 3.2, rules version 3.2.2.259547 [from cloudscan15-206.eu-central-1a.ess.aws.cudaops.com] Rule breakdown below pts rule name description ---- ---------------------- -------------------------------- 0.50 BSF_RULE_7582B META: Custom Rule 7582B 0.00 BSF_BESS_OUTBOUND META: BESS Outbound X-BESS-Outbound-Spam-Status: SCORE=0.50 using account:ESS113687 scores of KILL_LEVEL=7.0 tests=BSF_RULE_7582B, BSF_BESS_OUTBOUND X-BESS-BRTS-Status: 1 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Danylo Vodopianov CI founc couple coverity problems which were fixed in this commit. CID 440550, 440551, 440545, 440553, 440552, 440547: Null pointer dereferences (REVERSE_INULL) These issues were fixed by reworking variable NULL checking and adding NULL checking before var using. CID 440543: Incorrect expression (IDENTICAL_BRANCHES) This issue was fixed by removing useless if statements from the code. CID 440548: Null pointer dereferences (FORWARD_NULL) This issue was fixed by adding NULL checking before mp_fld_rst_serdes_rx var using. CID 440546: Resource leaks (RESOURCE_LEAK) This issue was fixed by moving NULL checking before var using. CID 440540: Error handling issues (CHECKED_RETURN) This issue was fixed with return value checking adding. CID 440549: (OVERRUN) This issue was fixed with array edge values fixing. Coverity issue: 440550 Fixes: 51052594f795 ("net/ntnic: add physical layer control module") Signed-off-by: Danylo Vodopianov --- .mailmap | 1 + .../nt200a0x/reset/nthw_fpga_rst_nt200a0x.c | 2 +- drivers/net/ntnic/nthw/core/nthw_fpga.c | 24 ++++---- drivers/net/ntnic/nthw/core/nthw_hif.c | 18 +----- .../net/ntnic/nthw/model/nthw_fpga_model.c | 58 ++++++++++--------- drivers/net/ntnic/ntnic_ethdev.c | 21 +++---- drivers/net/ntnic/ntnic_vfio.c | 5 +- drivers/net/ntnic/ntutil/nt_util.c | 3 +- 8 files changed, 66 insertions(+), 66 deletions(-) diff --git a/.mailmap b/.mailmap index d2f30cf8eb..3ea3a70762 100644 --- a/.mailmap +++ b/.mailmap @@ -295,6 +295,7 @@ Dan Nowlin Danny Patel Danny Zhou Dan Wei +Danylo Vodopianov Dapeng Yu Darek Stojaczyk Daria Kolistratova diff --git a/drivers/net/ntnic/nthw/core/nt200a0x/reset/nthw_fpga_rst_nt200a0x.c b/drivers/net/ntnic/nthw/core/nt200a0x/reset/nthw_fpga_rst_nt200a0x.c index ea0276a90c..aa0d97dafd 100644 --- a/drivers/net/ntnic/nthw/core/nt200a0x/reset/nthw_fpga_rst_nt200a0x.c +++ b/drivers/net/ntnic/nthw/core/nt200a0x/reset/nthw_fpga_rst_nt200a0x.c @@ -263,7 +263,7 @@ static int nthw_fpga_rst_nt200a0x_reset(nthw_fpga_t *p_fpga, if (p->mp_fld_rst_serdes_rx) nthw_field_set_flush(p->mp_fld_rst_serdes_rx); /* 0x03 2 ports */ - if (p->mp_fld_rst_serdes_rx_datapath) { + if (p->mp_fld_rst_serdes_rx_datapath && p->mp_fld_rst_serdes_rx) { nthw_field_set_flush(p->mp_fld_rst_serdes_rx_datapath); nthw_field_clr_flush(p->mp_fld_rst_serdes_rx); } diff --git a/drivers/net/ntnic/nthw/core/nthw_fpga.c b/drivers/net/ntnic/nthw/core/nthw_fpga.c index d70205e5e3..082d3950bb 100644 --- a/drivers/net/ntnic/nthw/core/nthw_fpga.c +++ b/drivers/net/ntnic/nthw/core/nthw_fpga.c @@ -217,19 +217,19 @@ int nthw_fpga_init(struct fpga_info_s *p_fpga_info) n_fpga_ident = p_fpga_info->n_fpga_ident; p_fpga_mgr = nthw_fpga_mgr_new(); - nthw_fpga_mgr_init(p_fpga_mgr, nthw_fpga_instances, - (const void *)sa_nthw_fpga_mod_str_map); - nthw_fpga_mgr_log_dump(p_fpga_mgr); - p_fpga = nthw_fpga_mgr_query_fpga(p_fpga_mgr, n_fpga_ident, p_fpga_info); - p_fpga_info->mp_fpga = p_fpga; - - if (p_fpga == NULL) { - NT_LOG(ERR, NTHW, "%s: Unsupported FPGA: %s (%08X)\n", p_adapter_id_str, - s_fpga_prod_ver_rev_str, p_fpga_info->n_fpga_build_time); - return -1; - } - if (p_fpga_mgr) { + nthw_fpga_mgr_init(p_fpga_mgr, nthw_fpga_instances, + (const void *)sa_nthw_fpga_mod_str_map); + nthw_fpga_mgr_log_dump(p_fpga_mgr); + p_fpga = nthw_fpga_mgr_query_fpga(p_fpga_mgr, n_fpga_ident, p_fpga_info); + p_fpga_info->mp_fpga = p_fpga; + + if (p_fpga == NULL) { + NT_LOG(ERR, NTHW, "%s: Unsupported FPGA: %s (%08X)\n", p_adapter_id_str, + s_fpga_prod_ver_rev_str, p_fpga_info->n_fpga_build_time); + return -1; + } + nthw_fpga_mgr_delete(p_fpga_mgr); p_fpga_mgr = NULL; } diff --git a/drivers/net/ntnic/nthw/core/nthw_hif.c b/drivers/net/ntnic/nthw/core/nthw_hif.c index f05e1a0c51..cc2aaf83e4 100644 --- a/drivers/net/ntnic/nthw/core/nthw_hif.c +++ b/drivers/net/ntnic/nthw/core/nthw_hif.c @@ -83,23 +83,11 @@ int nthw_hif_init(nthw_hif_t *p, nthw_fpga_t *p_fpga, int n_instance) p->mn_instance, p->mn_fpga_hif_ref_clk_freq, p->mn_fpga_param_hif_per_ps); p->mp_reg_build_seed = NULL; /* Reg/Fld not present on HIF */ - - if (p->mp_reg_build_seed) - p->mp_fld_build_seed = NULL; /* Reg/Fld not present on HIF */ - else - p->mp_fld_build_seed = NULL; + p->mp_fld_build_seed = NULL; /* Reg/Fld not present on HIF */ p->mp_reg_core_speed = NULL; /* Reg/Fld not present on HIF */ - - if (p->mp_reg_core_speed) { - p->mp_fld_core_speed = NULL; /* Reg/Fld not present on HIF */ - p->mp_fld_ddr3_speed = NULL; /* Reg/Fld not present on HIF */ - - } else { - p->mp_reg_core_speed = NULL; - p->mp_fld_core_speed = NULL; - p->mp_fld_ddr3_speed = NULL; - } + p->mp_fld_core_speed = NULL; /* Reg/Fld not present on HIF */ + p->mp_fld_ddr3_speed = NULL; /* Reg/Fld not present on HIF */ /* Optional registers since: 2018-04-25 */ p->mp_reg_int_mask = NULL; /* Reg/Fld not present on HIF */ diff --git a/drivers/net/ntnic/nthw/model/nthw_fpga_model.c b/drivers/net/ntnic/nthw/model/nthw_fpga_model.c index f8e6da2d7f..14d1ebf5fa 100644 --- a/drivers/net/ntnic/nthw/model/nthw_fpga_model.c +++ b/drivers/net/ntnic/nthw/model/nthw_fpga_model.c @@ -28,7 +28,7 @@ static const char *const sa_nthw_fpga_bus_type_str[] = { static const char *get_bus_name(int n_bus_type_id) { - if (n_bus_type_id >= 1 && n_bus_type_id <= (int)ARRAY_SIZE(sa_nthw_fpga_bus_type_str)) + if (n_bus_type_id >= 0 && n_bus_type_id < (int)ARRAY_SIZE(sa_nthw_fpga_bus_type_str)) return sa_nthw_fpga_bus_type_str[n_bus_type_id]; return "ERR"; @@ -678,45 +678,51 @@ void nthw_register_set_debug_mode(nthw_register_t *p, unsigned int debug_mode) static int nthw_register_read_data(const nthw_register_t *p) { int rc = -1; + if (p) { + if (p->mp_owner) { + const int n_bus_type_id = nthw_module_get_bus(p->mp_owner); + const uint32_t addr = p->mn_addr; + const uint32_t len = p->mn_len; + uint32_t *const p_data = p->mp_shadow; + const bool trc = (p->mn_debug_mode & NTHW_REG_TRACE_ON_READ); - const int n_bus_type_id = nthw_module_get_bus(p->mp_owner); - const uint32_t addr = p->mn_addr; - const uint32_t len = p->mn_len; - uint32_t *const p_data = p->mp_shadow; - const bool trc = (p->mn_debug_mode & NTHW_REG_TRACE_ON_READ); + struct fpga_info_s *p_fpga_info = NULL; - struct fpga_info_s *p_fpga_info = NULL; + if (p->mp_owner->mp_owner) + p_fpga_info = p->mp_owner->mp_owner->p_fpga_info; - if (p && p->mp_owner && p->mp_owner->mp_owner) - p_fpga_info = p->mp_owner->mp_owner->p_fpga_info; + assert(p_fpga_info); + assert(p_data); - assert(p_fpga_info); - assert(p_data); - - rc = nthw_read_data(p_fpga_info, trc, n_bus_type_id, addr, len, p_data); + rc = nthw_read_data(p_fpga_info, trc, n_bus_type_id, addr, len, p_data); + } + } return rc; } static int nthw_register_write_data(const nthw_register_t *p, uint32_t cnt) { int rc = -1; + if (p) { + if (p->mp_owner) { + const int n_bus_type_id = nthw_module_get_bus(p->mp_owner); + const uint32_t addr = p->mn_addr; + const uint32_t len = p->mn_len; + uint32_t *const p_data = p->mp_shadow; + const bool trc = (p->mn_debug_mode & NTHW_REG_TRACE_ON_WRITE); - const int n_bus_type_id = nthw_module_get_bus(p->mp_owner); - const uint32_t addr = p->mn_addr; - const uint32_t len = p->mn_len; - uint32_t *const p_data = p->mp_shadow; - const bool trc = (p->mn_debug_mode & NTHW_REG_TRACE_ON_WRITE); + struct fpga_info_s *p_fpga_info = NULL; - struct fpga_info_s *p_fpga_info = NULL; + if (p->mp_owner->mp_owner) + p_fpga_info = p->mp_owner->mp_owner->p_fpga_info; - if (p && p->mp_owner && p->mp_owner->mp_owner) - p_fpga_info = p->mp_owner->mp_owner->p_fpga_info; - - assert(p_fpga_info); - assert(p_data); - - rc = nthw_write_data(p_fpga_info, trc, n_bus_type_id, addr, (len * cnt), p_data); + assert(p_fpga_info); + assert(p_data); + rc = nthw_write_data(p_fpga_info, trc, n_bus_type_id, addr, (len * cnt), + p_data); + } + } return rc; } diff --git a/drivers/net/ntnic/ntnic_ethdev.c b/drivers/net/ntnic/ntnic_ethdev.c index 8568798ec8..f351469d0a 100644 --- a/drivers/net/ntnic/ntnic_ethdev.c +++ b/drivers/net/ntnic/ntnic_ethdev.c @@ -42,7 +42,7 @@ static struct drv_s *_g_p_drv[NUM_ADAPTER_MAX] = { NULL }; static void store_pdrv(struct drv_s *p_drv) { - if (p_drv->adapter_no > NUM_ADAPTER_MAX) { + if (p_drv->adapter_no >= NUM_ADAPTER_MAX) { NT_LOG(ERR, NTNIC, "Internal error adapter number %u out of range. Max number of adapters: %u\n", p_drv->adapter_no, NUM_ADAPTER_MAX); @@ -384,16 +384,17 @@ eth_dev_close(struct rte_eth_dev *eth_dev) internals->p_drv = NULL; rte_eth_dev_release_port(eth_dev); + if (p_drv) { + /* decrease initialized ethernet devices */ + p_drv->n_eth_dev_init_count--; - /* decrease initialized ethernet devices */ - p_drv->n_eth_dev_init_count--; - - /* - * rte_pci_dev has no private member for p_drv - * wait until all rte_eth_dev's are closed - then close adapters via p_drv - */ - if (!p_drv->n_eth_dev_init_count && p_drv) - drv_deinit(p_drv); + /* + * rte_pci_dev has no private member for p_drv + * wait until all rte_eth_dev's are closed - then close adapters via p_drv + */ + if (!p_drv->n_eth_dev_init_count) + drv_deinit(p_drv); + } return 0; } diff --git a/drivers/net/ntnic/ntnic_vfio.c b/drivers/net/ntnic/ntnic_vfio.c index f4433152b7..0542b1ce62 100644 --- a/drivers/net/ntnic/ntnic_vfio.c +++ b/drivers/net/ntnic/ntnic_vfio.c @@ -49,6 +49,7 @@ vfio_get(int vf_num) int nt_vfio_setup(struct rte_pci_device *dev) { + int ret; char devname[RTE_DEV_NAME_MAX_LEN] = { 0 }; int iommu_group_num; int vf_num; @@ -71,7 +72,9 @@ nt_vfio_setup(struct rte_pci_device *dev) vfio->iova_addr = START_VF_IOVA; rte_pci_device_name(&dev->addr, devname, RTE_DEV_NAME_MAX_LEN); - rte_vfio_get_group_num(rte_pci_get_sysfs_path(), devname, &iommu_group_num); + ret = rte_vfio_get_group_num(rte_pci_get_sysfs_path(), devname, &iommu_group_num); + if (ret <= 0) + return -1; if (vf_num == 0) { /* use default container for pf0 */ diff --git a/drivers/net/ntnic/ntutil/nt_util.c b/drivers/net/ntnic/ntutil/nt_util.c index 9904e3df3b..a69a8e10c1 100644 --- a/drivers/net/ntnic/ntutil/nt_util.c +++ b/drivers/net/ntnic/ntutil/nt_util.c @@ -31,7 +31,8 @@ uint64_t nt_os_get_time_monotonic_counter(void) /* Allocation size matching minimum alignment of specified size */ uint64_t nt_util_align_size(uint64_t size) { - return 1 << rte_log2_u64(size); + uint64_t alignment_size = 1ULL << rte_log2_u64(size); + return alignment_size; } void nt_util_vfio_init(struct nt_util_vfio_impl *impl) -- 2.45.0