* [PATCH] net/mlx5: support no host PF configuration
@ 2023-10-11 6:41 Jiawei Wang
2024-09-27 7:11 ` Bing Zhao
` (2 more replies)
0 siblings, 3 replies; 5+ messages in thread
From: Jiawei Wang @ 2023-10-11 6:41 UTC (permalink / raw)
To: suanmingm, xuemingl, viacheslavo; +Cc: dev, rasland
From: Xueming Li <xuemingl@nvidia.com>
In BlueField, a new firmware configuration option NUM_OF_PF=0 disables
PF on the x86 host side, no HPF on the ARM side, and the only RDMA port
on the ARM side is the bonding device(PF0). A device probe with devargs
of representor=pf[0-1]vf[...] will probe PF0 and PF1 one by one, and
it's possible that PF1 device scan results in no switch ports.
This patch supports the new configuration by allowing a PF scan with
empty switch ports.
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
Signed-off-by: Jiawei Wang <jiaweiw@nvidia.com>
---
drivers/net/mlx5/linux/mlx5_os.c | 7 -------
1 file changed, 7 deletions(-)
diff --git a/drivers/net/mlx5/linux/mlx5_os.c b/drivers/net/mlx5/linux/mlx5_os.c
index d5ef695e6d..75f53ade8e 100644
--- a/drivers/net/mlx5/linux/mlx5_os.c
+++ b/drivers/net/mlx5/linux/mlx5_os.c
@@ -2195,13 +2195,6 @@ mlx5_os_pci_probe_pf(struct mlx5_common_device *cdev,
list[ns].info.master))
ns++;
}
- if (!ns) {
- DRV_LOG(ERR,
- "Unable to recognize master/representors on the IB device with multiple ports.");
- rte_errno = ENOENT;
- ret = -rte_errno;
- goto exit;
- }
} else {
/*
* The existence of several matching entries (nd > 1) means
--
2.18.1
^ permalink raw reply [flat|nested] 5+ messages in thread* RE: [PATCH] net/mlx5: support no host PF configuration
2023-10-11 6:41 [PATCH] net/mlx5: support no host PF configuration Jiawei Wang
@ 2024-09-27 7:11 ` Bing Zhao
2024-10-28 9:35 ` Dariusz Sosnowski
2024-10-07 18:09 ` Stephen Hemminger
2024-10-28 13:12 ` Raslan Darawsheh
2 siblings, 1 reply; 5+ messages in thread
From: Bing Zhao @ 2024-09-27 7:11 UTC (permalink / raw)
To: Jiawei(Jonny) Wang, Suanming Mou, Xueming Li, Slava Ovsiienko
Cc: dev, Raslan Darawsheh
Hi,
> -----Original Message-----
> From: Jiawei Wang <jiaweiw@nvidia.com>
> Sent: Wednesday, October 11, 2023 2:42 PM
> To: Suanming Mou <suanmingm@nvidia.com>; Xueming(Steven) Li
> <xuemingl@nvidia.com>; Slava Ovsiienko <viacheslavo@nvidia.com>
> Cc: dev@dpdk.org; Raslan Darawsheh <rasland@nvidia.com>
> Subject: [PATCH] net/mlx5: support no host PF configuration
>
> External email: Use caution opening links or attachments
>
>
> From: Xueming Li <xuemingl@nvidia.com>
>
> In BlueField, a new firmware configuration option NUM_OF_PF=0 disables PF
> on the x86 host side, no HPF on the ARM side, and the only RDMA port on
> the ARM side is the bonding device(PF0). A device probe with devargs of
> representor=pf[0-1]vf[...] will probe PF0 and PF1 one by one, and it's
> possible that PF1 device scan results in no switch ports.
>
> This patch supports the new configuration by allowing a PF scan with empty
> switch ports.
>
> Signed-off-by: Xueming Li <xuemingl@nvidia.com>
> Signed-off-by: Jiawei Wang <jiaweiw@nvidia.com>
> ---
> drivers/net/mlx5/linux/mlx5_os.c | 7 -------
> 1 file changed, 7 deletions(-)
>
> diff --git a/drivers/net/mlx5/linux/mlx5_os.c
> b/drivers/net/mlx5/linux/mlx5_os.c
> index d5ef695e6d..75f53ade8e 100644
> --- a/drivers/net/mlx5/linux/mlx5_os.c
> +++ b/drivers/net/mlx5/linux/mlx5_os.c
> @@ -2195,13 +2195,6 @@ mlx5_os_pci_probe_pf(struct mlx5_common_device
> *cdev,
> list[ns].info.master))
> ns++;
> }
> - if (!ns) {
> - DRV_LOG(ERR,
> - "Unable to recognize master/representors
> on the IB device with multiple ports.");
> - rte_errno = ENOENT;
> - ret = -rte_errno;
> - goto exit;
> - }
> } else {
> /*
> * The existence of several matching entries (nd > 1)
> means
> --
Acked-by: Bing Zhao <bingz@nvidia.com>
Thanks
> 2.18.1
^ permalink raw reply [flat|nested] 5+ messages in thread* RE: [PATCH] net/mlx5: support no host PF configuration
2024-09-27 7:11 ` Bing Zhao
@ 2024-10-28 9:35 ` Dariusz Sosnowski
0 siblings, 0 replies; 5+ messages in thread
From: Dariusz Sosnowski @ 2024-10-28 9:35 UTC (permalink / raw)
To: Bing Zhao, Jiawei(Jonny) Wang, Suanming Mou, Xueming Li, Slava Ovsiienko
Cc: dev, Raslan Darawsheh
> -----Original Message-----
> From: Bing Zhao <bingz@nvidia.com>
> Sent: Friday, September 27, 2024 09:12
> To: Jiawei(Jonny) Wang <jiaweiw@nvidia.com>; Suanming Mou
> <suanmingm@nvidia.com>; Xueming Li <xuemingl@nvidia.com>; Slava Ovsiienko
> <viacheslavo@nvidia.com>
> Cc: dev@dpdk.org; Raslan Darawsheh <rasland@nvidia.com>
> Subject: RE: [PATCH] net/mlx5: support no host PF configuration
>
> External email: Use caution opening links or attachments
>
>
> Hi,
>
> > -----Original Message-----
> > From: Jiawei Wang <jiaweiw@nvidia.com>
> > Sent: Wednesday, October 11, 2023 2:42 PM
> > To: Suanming Mou <suanmingm@nvidia.com>; Xueming(Steven) Li
> > <xuemingl@nvidia.com>; Slava Ovsiienko <viacheslavo@nvidia.com>
> > Cc: dev@dpdk.org; Raslan Darawsheh <rasland@nvidia.com>
> > Subject: [PATCH] net/mlx5: support no host PF configuration
> >
> > External email: Use caution opening links or attachments
> >
> >
> > From: Xueming Li <xuemingl@nvidia.com>
> >
> > In BlueField, a new firmware configuration option NUM_OF_PF=0 disables
> > PF on the x86 host side, no HPF on the ARM side, and the only RDMA
> > port on the ARM side is the bonding device(PF0). A device probe with
> > devargs of representor=pf[0-1]vf[...] will probe PF0 and PF1 one by
> > one, and it's possible that PF1 device scan results in no switch ports.
> >
> > This patch supports the new configuration by allowing a PF scan with
> > empty switch ports.
> >
> > Signed-off-by: Xueming Li <xuemingl@nvidia.com>
> > Signed-off-by: Jiawei Wang <jiaweiw@nvidia.com>
> > ---
> > drivers/net/mlx5/linux/mlx5_os.c | 7 -------
> > 1 file changed, 7 deletions(-)
> >
> > diff --git a/drivers/net/mlx5/linux/mlx5_os.c
> > b/drivers/net/mlx5/linux/mlx5_os.c
> > index d5ef695e6d..75f53ade8e 100644
> > --- a/drivers/net/mlx5/linux/mlx5_os.c
> > +++ b/drivers/net/mlx5/linux/mlx5_os.c
> > @@ -2195,13 +2195,6 @@ mlx5_os_pci_probe_pf(struct
> mlx5_common_device
> > *cdev,
> > list[ns].info.master))
> > ns++;
> > }
> > - if (!ns) {
> > - DRV_LOG(ERR,
> > - "Unable to recognize master/representors
> > on the IB device with multiple ports.");
> > - rte_errno = ENOENT;
> > - ret = -rte_errno;
> > - goto exit;
> > - }
> > } else {
> > /*
> > * The existence of several matching entries (nd > 1)
> > means
> > --
>
> Acked-by: Bing Zhao <bingz@nvidia.com>
>
> Thanks
>
Acked-by: Dariusz Sosnowski <dsosnowski@nvidia.com>
Best regards,
Dariusz Sosnowski
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH] net/mlx5: support no host PF configuration
2023-10-11 6:41 [PATCH] net/mlx5: support no host PF configuration Jiawei Wang
2024-09-27 7:11 ` Bing Zhao
@ 2024-10-07 18:09 ` Stephen Hemminger
2024-10-28 13:12 ` Raslan Darawsheh
2 siblings, 0 replies; 5+ messages in thread
From: Stephen Hemminger @ 2024-10-07 18:09 UTC (permalink / raw)
To: Jiawei Wang; +Cc: suanmingm, xuemingl, viacheslavo, dev, rasland
On Wed, 11 Oct 2023 09:41:53 +0300
Jiawei Wang <jiaweiw@nvidia.com> wrote:
> From: Xueming Li <xuemingl@nvidia.com>
>
> In BlueField, a new firmware configuration option NUM_OF_PF=0 disables
> PF on the x86 host side, no HPF on the ARM side, and the only RDMA port
> on the ARM side is the bonding device(PF0). A device probe with devargs
> of representor=pf[0-1]vf[...] will probe PF0 and PF1 one by one, and
> it's possible that PF1 device scan results in no switch ports.
>
> This patch supports the new configuration by allowing a PF scan with
> empty switch ports.
>
> Signed-off-by: Xueming Li <xuemingl@nvidia.com>
> Signed-off-by: Jiawei Wang <jiaweiw@nvidia.com>
Not sure why it never got merged but looks fine.
Acked-by: Stephen Hemminger <stephen@networkplumber.org>
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH] net/mlx5: support no host PF configuration
2023-10-11 6:41 [PATCH] net/mlx5: support no host PF configuration Jiawei Wang
2024-09-27 7:11 ` Bing Zhao
2024-10-07 18:09 ` Stephen Hemminger
@ 2024-10-28 13:12 ` Raslan Darawsheh
2 siblings, 0 replies; 5+ messages in thread
From: Raslan Darawsheh @ 2024-10-28 13:12 UTC (permalink / raw)
To: Jiawei(Jonny) Wang, Suanming Mou, Xueming Li, Slava Ovsiienko; +Cc: dev
Hi,
From: Jiawei(Jonny) Wang <jiaweiw@nvidia.com>
Sent: Wednesday, October 11, 2023 9:41 AM
To: Suanming Mou; Xueming(Steven) Li; Slava Ovsiienko
Cc: dev@dpdk.org; Raslan Darawsheh
Subject: [PATCH] net/mlx5: support no host PF configuration
From: Xueming Li <xuemingl@nvidia.com>
In BlueField, a new firmware configuration option NUM_OF_PF=0 disables
PF on the x86 host side, no HPF on the ARM side, and the only RDMA port
on the ARM side is the bonding device(PF0). A device probe with devargs
of representor=pf[0-1]vf[...] will probe PF0 and PF1 one by one, and
it's possible that PF1 device scan results in no switch ports.
This patch supports the new configuration by allowing a PF scan with
empty switch ports.
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
Signed-off-by: Jiawei Wang <jiaweiw@nvidia.com>
Patch applied to next-net-mlx,
Kindest regards,
Raslan Darawsheh
^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2024-10-28 13:12 UTC | newest]
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2023-10-11 6:41 [PATCH] net/mlx5: support no host PF configuration Jiawei Wang
2024-09-27 7:11 ` Bing Zhao
2024-10-28 9:35 ` Dariusz Sosnowski
2024-10-07 18:09 ` Stephen Hemminger
2024-10-28 13:12 ` Raslan Darawsheh
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