From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 2C38A45AD8; Mon, 7 Oct 2024 21:37:53 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 947DD40E35; Mon, 7 Oct 2024 21:35:35 +0200 (CEST) Received: from egress-ip11b.ess.de.barracuda.com (egress-ip11b.ess.de.barracuda.com [18.185.115.215]) by mails.dpdk.org (Postfix) with ESMTP id 5BFB74060C for ; Mon, 7 Oct 2024 21:35:22 +0200 (CEST) Received: from EUR05-AM6-obe.outbound.protection.outlook.com (mail-am6eur05lp2111.outbound.protection.outlook.com [104.47.18.111]) by mx-outbound18-114.eu-central-1b.ess.aws.cudaops.com (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NO); Mon, 07 Oct 2024 19:35:21 +0000 ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=uhGWTLj7eIKRZcr1GGM0Cv99r6ELZP30OjKTMI1K6vc3kNFGPi36oUDAaiy0Fo9VFz7KAu2KnxmqljkxJ1vhPu/mM7Ql8bAW3VD1lOV+FdJcd+nODYsrCJu2An0R/+Kpd8Slm5odult2Z0pJ86TLke1PaTtOnq9JYNpFGQlxYtSdqWtxd3ObOTq2y9EFPuEOFgcMuzPsTiqPy350y5OEKXAwCTcUPMzzjguEbXM0TgfbPiF92/r2wSqA+glUPR2v/ZrKtEz8mm94w/onlfRDyhvvYUxNqCbavU47VJZJQ1iD/9BLYaYW5N7k3uxloU1pnfsfdY3+M4nBcyIf0f4sOw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=LlysQ6hu+7CudenBwvzrIqDqcyKqj9C49dP3v/c3LhE=; b=p24nSn7U6N4eadJ1BYHvVgB5+k44WwJt10H6ojOsKPUq6IdLXhXj3OouoZL5lEYBeOkzaoPiyVYvcSA9SDjxrRn4uEMFe49EFEfSHayzEDvTckxE4Dss5wBQLLMQOOi7eAmEUoBA9wMM9GuQCncZvLoCS0YvIaBuAAXYe0i/iIQ2V3vQFZ6PLaALLwrFu8ToXZKsLtMVTs+/UGjhUJ+pFthzcT5Je/Lriwo/dfGYupmVd3ZmhagPACbFaArx+tnK5etLGDIitPU7QgpqQlm98o+zopuJegP6/dCLYTWQS3DSk42rIX2HvByU08MAmg2knJigSibfBnF+V+6wkxmTjQ== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=fail (sender ip is 178.72.21.4) smtp.rcpttodomain=dpdk.org smtp.mailfrom=napatech.com; dmarc=fail (p=reject sp=reject pct=100) action=oreject header.from=napatech.com; dkim=none (message not signed); arc=none (0) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=napatech.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=LlysQ6hu+7CudenBwvzrIqDqcyKqj9C49dP3v/c3LhE=; b=DPiCws4aviKiLHU/4UafT8Gznu1EC47ySWjIab+ZnURrpjetCRp4Gw+AYhQsnaD9MnnkGgVUg2KN88/UeR6GNHm1tNPWDr9wnbc8+GOZoJ3yU9qYcjQxBUceNWJwHX1hBuBv0WBpbh1AoikUzKNsnovuUsxUhELWGYytqRM1AI4= Received: from DB9PR05CA0018.eurprd05.prod.outlook.com (2603:10a6:10:1da::23) by DU0P190MB1882.EURP190.PROD.OUTLOOK.COM (2603:10a6:10:3a6::17) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8026.23; Mon, 7 Oct 2024 19:35:19 +0000 Received: from DB1PEPF000509EC.eurprd03.prod.outlook.com (2603:10a6:10:1da:cafe::b4) by DB9PR05CA0018.outlook.office365.com (2603:10a6:10:1da::23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7982.34 via Frontend Transport; Mon, 7 Oct 2024 19:35:19 +0000 X-MS-Exchange-Authentication-Results: spf=fail (sender IP is 178.72.21.4) smtp.mailfrom=napatech.com; dkim=none (message not signed) header.d=none;dmarc=fail action=oreject header.from=napatech.com; Received-SPF: Fail (protection.outlook.com: domain of napatech.com does not designate 178.72.21.4 as permitted sender) receiver=protection.outlook.com; client-ip=178.72.21.4; helo=localhost.localdomain; Received: from localhost.localdomain (178.72.21.4) by DB1PEPF000509EC.mail.protection.outlook.com (10.167.242.70) with Microsoft SMTP Server id 15.20.8048.13 via Frontend Transport; Mon, 7 Oct 2024 19:35:19 +0000 From: Serhii Iliushyk To: dev@dpdk.org Cc: mko-plv@napatech.com, sil-plv@napatech.com, ckm@napatech.com, andrew.rybchenko@oktetlabs.ru, ferruh.yigit@amd.com, Oleksandr Kolomeiets Subject: [PATCH v2 20/50] net/ntnic: add RPP local retransmit (RPP LR) flow module Date: Mon, 7 Oct 2024 21:33:56 +0200 Message-ID: <20241007193436.675785-21-sil-plv@napatech.com> X-Mailer: git-send-email 2.45.0 In-Reply-To: <20241007193436.675785-1-sil-plv@napatech.com> References: <20241006203728.330792-2-sil-plv@napatech.com> <20241007193436.675785-1-sil-plv@napatech.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DB1PEPF000509EC:EE_|DU0P190MB1882:EE_ Content-Type: text/plain X-MS-Office365-Filtering-Correlation-Id: d911d1d1-ec59-4182-ed78-08dce7072dc5 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; ARA:13230040|376014|36860700013|1800799024|82310400026; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?65Kr50IZ7olsoxARN/joCVq7PqXzi6NzkpNtgxtq6QvbELyEsTBjnQ30awc5?= =?us-ascii?Q?qIuEKXSg9ImMdFItDuB3P+vFE5kSlYpEl70+UBNRMoSYqa0PHzxcmNLiO9PF?= =?us-ascii?Q?1B02X3KB2v7aB0PJo3UAVN5u0gfMt+kopxfyCnL4SJDNfka2dhXYmC6hqiWM?= =?us-ascii?Q?yYkg5Qmu2mB/nYFbqjHi1S9tB/tThWq0K5TmLXAJuf2qlDxk+e0OTtbmb9/8?= =?us-ascii?Q?AhVOu+rzSmeIDnzTqhF4kahKyYlHKwOwnc231eIKS/dNJY6pPtvIdnDerxEq?= =?us-ascii?Q?LKKFMSwOjJnYDr8jl2p3hFil+mZbPmLk4a98vh00eaaN4n3+MjxjWkhtP/A9?= =?us-ascii?Q?BF9tP7LHxvcoev6h4xQ5ji8IcIO/QhL0Q4opKj3hJQ/KBPy7U0Qk1XDGkFK5?= =?us-ascii?Q?i78uhXV/Fx8M+MBg9I9kab+CPst5QLwOVS65xFCLr7+uY9zaFPQcdAS0Lmrr?= =?us-ascii?Q?xeuMnWvwsRf7bQsPY4g3xgNPYvGklAIvY/k9RIYtQxEK/NSKh6bpcOpfiNbq?= =?us-ascii?Q?GQms2GayFshluhd89ENNWLmWqCg0MRQtpNxcHr9ATvFVJApxpsNV+bPCLWcO?= =?us-ascii?Q?snNRnVTtQ6LEAmtlOu/hjHzBKXK0c9Y7CB2FImj2fBsyipeRNUcfxNIARqfN?= =?us-ascii?Q?G6lz9loFKwmXzczIAhHKal7CSRXBtQBkbOilbhYUP0RAj7NXbOQSVpfpUm4j?= =?us-ascii?Q?VloSv5sdWg1HG4b/3L1O93Te3UV6ZSv8mm4VxOz2xhztH4O3PtoJo6gN5qxQ?= =?us-ascii?Q?lCtefDTNLuqsqgsdomQriSla8fJQ14OXWrbv1XBY/svojJqc8ZjJv5sSs6bj?= =?us-ascii?Q?5rfTv6SvyWO1z06v2O5yMox/eG9IMAfWlOOchr4KpNVAXxiyh7dg8hM59LlI?= =?us-ascii?Q?70uWCIWc8/yCK+twU4mduszRvXNOrWIKsZ+70HdHLEljLmCOVFSzUQct5gp+?= =?us-ascii?Q?/fYxfM/2YhVxunnqHwns7vtrWII/ViCZnqTbKE9m6FWUMPb83/XMe6iGN1DF?= =?us-ascii?Q?ta8ZHZizGvL+SzYIQPlx0VG29l0NTJDKAxGX7buKER8VSPtMFf9B6txqMWGl?= =?us-ascii?Q?C4DukEhHjGGE1iTi6/D/jOrQv5CRqCBErL0Ltx/AWgk3Qa+wiXXyhfd4iGLn?= =?us-ascii?Q?ctv2UGWqg5zoZD8N2i9sT3elU2krHiro+cEIxVoH2JhUnQiiCvj+xQ1dXoKV?= =?us-ascii?Q?H2BwITTO9dDCyZOK8Vdeexxx1SVnWc9g4sOhVpjbnIhy+WeH0mQvqxRWD4ze?= =?us-ascii?Q?uXx1g6p3+wChZ9wEBTk1Rlb4zOhdQ0e1d7TEQxxxqKqt+VSY1G0OdqjDJbcV?= =?us-ascii?Q?5BMlDRQY/YqPVMlHSh2QHLYdF0n8ecjOjuQvWfUdX6zbBEAYKn6rJwtFaDPI?= =?us-ascii?Q?lmA6Thc9QBd5eUMJPwic/0yB527J?= X-Forefront-Antispam-Report: CIP:178.72.21.4; CTRY:DK; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:localhost.localdomain; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230040)(376014)(36860700013)(1800799024)(82310400026); DIR:OUT; SFP:1102; X-MS-Exchange-AntiSpam-ExternalHop-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-ExternalHop-MessageData-0: AMBjHAb33+Yr1Jv1CXMdWgo50CMsrx+MrXROv6NYRqEqGb3mBHt344OcDTALcKaWrnY62LoVp635wLPdIAc2bl8EknxpCy5Zj77JEqpntShqCRVkFIIXxukkq0zLMfPhJDTx0Kwq5oBNtDnHvrSgNt5mbctvpTJVFMxSVUhwpeLCwc9c3psI+YlK/EIK5EgPkchUq1vX9yEmckLTHvy2of+hoxOtm1ksQtjp6EjdXz9aO9ViO1Sd1Xug1Bmi4XfMJEC62Ibwv+WSkG9wlbNbzgZppCeIjF5JetELou/pG1Xe2ZuTk5N5uhqOZBcLLKHWwlGqEOm80zuk2s88Oq339Afoeht6NIke760vWDyimStkSvL3XiMnBNBS5xtlP6jY7NYCGmab0irZ4n9aDBxnd8kuPAlcVVVwEP23ny0p3ZEt3/vjv44dGHca4WfvBOnYDPu89NLu3mnbqsQJKIzDBKdHSPQjKu+gFeeiQHOwiCWffc8iLBNn/BdJwYsav4L0sPRhND/YxhZ2vRfFQ7SWTcRPQ788aPZavcXJF7BvKEm2bvD6wScgga9SaZiY1mj6vdMlZDrK5DCFNbU1umIMWYeKaKWj+SBd8sqaogIwc50fzs0bgr2FEvhdcdh1FNA+LfsDaMqen3EVGgyRYSgxDA== X-OriginatorOrg: napatech.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 07 Oct 2024 19:35:19.5845 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: d911d1d1-ec59-4182-ed78-08dce7072dc5 X-MS-Exchange-CrossTenant-Id: c4540d0b-728a-4233-9da5-9ea30c7ec3ed X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=c4540d0b-728a-4233-9da5-9ea30c7ec3ed; Ip=[178.72.21.4]; Helo=[localhost.localdomain] X-MS-Exchange-CrossTenant-AuthSource: DB1PEPF000509EC.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DU0P190MB1882 X-BESS-ID: 1728329721-304722-4002-4097-1 X-BESS-VER: 2019.1_20241004.2057 X-BESS-Apparent-Source-IP: 104.47.18.111 X-BESS-Parts: H4sIAAAAAAACA4uuVkqtKFGyUioBkjpK+cVKVpYWZqZAVgZQ0NgsKTnJJDHRPN kgMSnR0CTVwMzQLNnA0CDV0jzVMNVYqTYWAEJIe7pBAAAA X-BESS-Outbound-Spam-Score: 0.50 X-BESS-Outbound-Spam-Report: Code version 3.2, rules version 3.2.2.259566 [from cloudscan14-168.eu-central-1a.ess.aws.cudaops.com] Rule breakdown below pts rule name description ---- ---------------------- -------------------------------- 0.50 BSF_RULE7568M META: Custom Rule 7568M 0.00 BSF_BESS_OUTBOUND META: BESS Outbound X-BESS-Outbound-Spam-Status: SCORE=0.50 using account:ESS113687 scores of KILL_LEVEL=7.0 tests=BSF_RULE7568M, BSF_BESS_OUTBOUND X-BESS-BRTS-Status: 1 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Oleksandr Kolomeiets The RX Packet Process for Local Retransmit module can add bytes in the FPGA TX pipeline, which is needed when the packet increases in size. Note, this makes room for packet expansion, but the actual expansion is done by the modules. Signed-off-by: Oleksandr Kolomeiets --- drivers/net/ntnic/meson.build | 1 + .../nthw/flow_api/flow_backend/flow_backend.c | 13 ++++ .../ntnic/nthw/flow_filter/flow_nthw_rpp_lr.c | 76 +++++++++++++++++++ .../ntnic/nthw/flow_filter/flow_nthw_rpp_lr.h | 44 +++++++++++ .../ntnic/nthw/supported/nthw_fpga_mod_defs.h | 1 + .../ntnic/nthw/supported/nthw_fpga_reg_defs.h | 1 + .../supported/nthw_fpga_reg_defs_rpp_lr.h | 37 +++++++++ 7 files changed, 173 insertions(+) create mode 100644 drivers/net/ntnic/nthw/flow_filter/flow_nthw_rpp_lr.c create mode 100644 drivers/net/ntnic/nthw/flow_filter/flow_nthw_rpp_lr.h create mode 100644 drivers/net/ntnic/nthw/supported/nthw_fpga_reg_defs_rpp_lr.h diff --git a/drivers/net/ntnic/meson.build b/drivers/net/ntnic/meson.build index 552cbc30bf..2dfb0d0627 100644 --- a/drivers/net/ntnic/meson.build +++ b/drivers/net/ntnic/meson.build @@ -55,6 +55,7 @@ sources = files( 'nthw/flow_filter/flow_nthw_km.c', 'nthw/flow_filter/flow_nthw_pdb.c', 'nthw/flow_filter/flow_nthw_qsl.c', + 'nthw/flow_filter/flow_nthw_rpp_lr.c', 'nthw/flow_filter/flow_nthw_slc_lr.c', 'nthw/model/nthw_fpga_model.c', 'nthw/nthw_platform.c', diff --git a/drivers/net/ntnic/nthw/flow_api/flow_backend/flow_backend.c b/drivers/net/ntnic/nthw/flow_api/flow_backend/flow_backend.c index feb3355de3..e2abbf0368 100644 --- a/drivers/net/ntnic/nthw/flow_api/flow_backend/flow_backend.c +++ b/drivers/net/ntnic/nthw/flow_api/flow_backend/flow_backend.c @@ -15,6 +15,7 @@ #include "flow_nthw_qsl.h" #include "flow_nthw_slc_lr.h" #include "flow_nthw_pdb.h" +#include "flow_nthw_rpp_lr.h" #include "ntnic_mod_reg.h" #include "nthw_fpga_model.h" #include "hw_mod_backend.h" @@ -38,6 +39,7 @@ static struct backend_dev_s { struct slc_lr_nthw *p_slc_lr_nthw; struct pdb_nthw *p_pdb_nthw; struct hfu_nthw *p_hfu_nthw; /* TPE module */ + struct rpp_lr_nthw *p_rpp_lr_nthw; /* TPE module */ struct ifr_nthw *p_ifr_nthw; /* TPE module */ } be_devs[MAX_PHYS_ADAPTERS]; @@ -1795,6 +1797,16 @@ const struct flow_api_backend_ops *bin_flow_backend_init(nthw_fpga_t *p_fpga, vo be_devs[physical_adapter_no].p_hfu_nthw = NULL; } + /* Init nthw RPP_LR */ + if (rpp_lr_nthw_init(NULL, p_fpga, physical_adapter_no) == 0) { + struct rpp_lr_nthw *ptr = rpp_lr_nthw_new(); + rpp_lr_nthw_init(ptr, p_fpga, physical_adapter_no); + be_devs[physical_adapter_no].p_rpp_lr_nthw = ptr; + + } else { + be_devs[physical_adapter_no].p_rpp_lr_nthw = NULL; + } + be_devs[physical_adapter_no].adapter_no = physical_adapter_no; *dev = (void *)&be_devs[physical_adapter_no]; @@ -1813,6 +1825,7 @@ static void bin_flow_backend_done(void *dev) slc_lr_nthw_delete(be_dev->p_slc_lr_nthw); pdb_nthw_delete(be_dev->p_pdb_nthw); hfu_nthw_delete(be_dev->p_hfu_nthw); + rpp_lr_nthw_delete(be_dev->p_rpp_lr_nthw); } static const struct flow_backend_ops ops = { diff --git a/drivers/net/ntnic/nthw/flow_filter/flow_nthw_rpp_lr.c b/drivers/net/ntnic/nthw/flow_filter/flow_nthw_rpp_lr.c new file mode 100644 index 0000000000..84bbcbdc4f --- /dev/null +++ b/drivers/net/ntnic/nthw/flow_filter/flow_nthw_rpp_lr.c @@ -0,0 +1,76 @@ +/* + * SPDX-License-Identifier: BSD-3-Clause + * Copyright(c) 2023 Napatech A/S + */ + +#include +#include + +#include "ntlog.h" +#include "nthw_drv.h" +#include "nthw_register.h" + +#include "flow_nthw_rpp_lr.h" + +struct rpp_lr_nthw *rpp_lr_nthw_new(void) +{ + struct rpp_lr_nthw *p = malloc(sizeof(struct rpp_lr_nthw)); + + if (p) + (void)memset(p, 0, sizeof(*p)); + + return p; +} + +void rpp_lr_nthw_delete(struct rpp_lr_nthw *p) +{ + if (p) { + (void)memset(p, 0, sizeof(*p)); + free(p); + } +} + +int rpp_lr_nthw_init(struct rpp_lr_nthw *p, nthw_fpga_t *p_fpga, int n_instance) +{ + const char *const p_adapter_id_str = p_fpga->p_fpga_info->mp_adapter_id_str; + nthw_module_t *p_mod = nthw_fpga_query_module(p_fpga, MOD_RPP_LR, n_instance); + + assert(n_instance >= 0 && n_instance < 256); + + if (p == NULL) + return p_mod == NULL ? -1 : 0; + + if (p_mod == NULL) { + NT_LOG(ERR, NTHW, "%s: RppLr %d: no such instance\n", p_adapter_id_str, + n_instance); + return -1; + } + + p->mp_fpga = p_fpga; + p->m_physical_adapter_no = (uint8_t)n_instance; + p->m_rpp_lr = nthw_fpga_query_module(p_fpga, MOD_RPP_LR, n_instance); + + p->mp_rcp_ctrl = nthw_module_get_register(p->m_rpp_lr, RPP_LR_RCP_CTRL); + p->mp_rcp_addr = nthw_register_get_field(p->mp_rcp_ctrl, RPP_LR_RCP_CTRL_ADR); + p->mp_rcp_cnt = nthw_register_get_field(p->mp_rcp_ctrl, RPP_LR_RCP_CTRL_CNT); + p->mp_rcp_data = nthw_module_get_register(p->m_rpp_lr, RPP_LR_RCP_DATA); + p->mp_rcp_data_exp = nthw_register_get_field(p->mp_rcp_data, RPP_LR_RCP_DATA_EXP); + + p->mp_ifr_rcp_ctrl = nthw_module_query_register(p->m_rpp_lr, RPP_LR_IFR_RCP_CTRL); + p->mp_ifr_rcp_addr = + nthw_register_query_field(p->mp_ifr_rcp_ctrl, RPP_LR_IFR_RCP_CTRL_ADR); + p->mp_ifr_rcp_cnt = nthw_register_query_field(p->mp_ifr_rcp_ctrl, RPP_LR_IFR_RCP_CTRL_CNT); + p->mp_ifr_rcp_data = nthw_module_query_register(p->m_rpp_lr, RPP_LR_IFR_RCP_DATA); + p->mp_ifr_rcp_data_ipv4_en = + nthw_register_query_field(p->mp_ifr_rcp_data, RPP_LR_IFR_RCP_DATA_IPV4_EN); + p->mp_ifr_rcp_data_ipv6_en = + nthw_register_query_field(p->mp_ifr_rcp_data, RPP_LR_IFR_RCP_DATA_IPV6_EN); + p->mp_ifr_rcp_data_mtu = + nthw_register_query_field(p->mp_ifr_rcp_data, RPP_LR_IFR_RCP_DATA_MTU); + p->mp_ifr_rcp_data_ipv4_df_drop = + nthw_register_query_field(p->mp_ifr_rcp_data, RPP_LR_IFR_RCP_DATA_IPV4_DF_DROP); + p->mp_ifr_rcp_data_ipv6_drop = + nthw_register_query_field(p->mp_ifr_rcp_data, RPP_LR_IFR_RCP_DATA_IPV6_DROP); + + return 0; +} diff --git a/drivers/net/ntnic/nthw/flow_filter/flow_nthw_rpp_lr.h b/drivers/net/ntnic/nthw/flow_filter/flow_nthw_rpp_lr.h new file mode 100644 index 0000000000..509e46fc48 --- /dev/null +++ b/drivers/net/ntnic/nthw/flow_filter/flow_nthw_rpp_lr.h @@ -0,0 +1,44 @@ +/* + * SPDX-License-Identifier: BSD-3-Clause + * Copyright(c) 2023 Napatech A/S + */ + +#ifndef __FLOW_NTHW_RPP_LR_H__ +#define __FLOW_NTHW_RPP_LR_H__ + +#include + +#include "nthw_fpga_model.h" + +struct rpp_lr_nthw { + uint8_t m_physical_adapter_no; + nthw_fpga_t *mp_fpga; + + nthw_module_t *m_rpp_lr; + + nthw_register_t *mp_rcp_ctrl; + nthw_field_t *mp_rcp_addr; + nthw_field_t *mp_rcp_cnt; + + nthw_register_t *mp_rcp_data; + nthw_field_t *mp_rcp_data_exp; + + nthw_register_t *mp_ifr_rcp_ctrl; + nthw_field_t *mp_ifr_rcp_addr; + nthw_field_t *mp_ifr_rcp_cnt; + + nthw_register_t *mp_ifr_rcp_data; + nthw_field_t *mp_ifr_rcp_data_ipv4_en; + nthw_field_t *mp_ifr_rcp_data_ipv6_en; + nthw_field_t *mp_ifr_rcp_data_mtu; + nthw_field_t *mp_ifr_rcp_data_ipv4_df_drop; + nthw_field_t *mp_ifr_rcp_data_ipv6_drop; +}; + +struct rpp_lr_nthw *rpp_lr_nthw_new(void); +void rpp_lr_nthw_delete(struct rpp_lr_nthw *p); +int rpp_lr_nthw_init(struct rpp_lr_nthw *p, nthw_fpga_t *p_fpga, int n_instance); + +int rpp_lr_nthw_setup(struct rpp_lr_nthw *p, int n_idx, int n_idx_cnt); + +#endif /* __FLOW_NTHW_RPP_LR_H__ */ diff --git a/drivers/net/ntnic/nthw/supported/nthw_fpga_mod_defs.h b/drivers/net/ntnic/nthw/supported/nthw_fpga_mod_defs.h index 2d53dfdf98..f1d055a36e 100644 --- a/drivers/net/ntnic/nthw/supported/nthw_fpga_mod_defs.h +++ b/drivers/net/ntnic/nthw/supported/nthw_fpga_mod_defs.h @@ -33,6 +33,7 @@ #define MOD_PDB (0xa7771bffUL) #define MOD_QSL (0x448ed859UL) #define MOD_RAC (0xae830b42UL) +#define MOD_RPP_LR (0xba7f945cUL) #define MOD_RST9563 (0x385d6d1dUL) #define MOD_SDC (0xd2369530UL) #define MOD_SLC_LR (0x969fc50bUL) diff --git a/drivers/net/ntnic/nthw/supported/nthw_fpga_reg_defs.h b/drivers/net/ntnic/nthw/supported/nthw_fpga_reg_defs.h index c49913036e..c39901ce39 100644 --- a/drivers/net/ntnic/nthw/supported/nthw_fpga_reg_defs.h +++ b/drivers/net/ntnic/nthw/supported/nthw_fpga_reg_defs.h @@ -32,6 +32,7 @@ #include "nthw_fpga_reg_defs_pdb.h" #include "nthw_fpga_reg_defs_qsl.h" #include "nthw_fpga_reg_defs_rac.h" +#include "nthw_fpga_reg_defs_rpp_lr.h" #include "nthw_fpga_reg_defs_rst9563.h" #include "nthw_fpga_reg_defs_sdc.h" #include "nthw_fpga_reg_defs_slc.h" diff --git a/drivers/net/ntnic/nthw/supported/nthw_fpga_reg_defs_rpp_lr.h b/drivers/net/ntnic/nthw/supported/nthw_fpga_reg_defs_rpp_lr.h new file mode 100644 index 0000000000..f84cdf5939 --- /dev/null +++ b/drivers/net/ntnic/nthw/supported/nthw_fpga_reg_defs_rpp_lr.h @@ -0,0 +1,37 @@ +/* + * SPDX-License-Identifier: BSD-3-Clause + * Copyright(c) 2024 Napatech A/S + */ + +/* + * nthw_fpga_reg_defs_rpp_lr.h + * + * Auto-generated file - do *NOT* edit + * + */ + +#ifndef _NTHW_FPGA_REG_DEFS_RPP_LR_ +#define _NTHW_FPGA_REG_DEFS_RPP_LR_ + +/* RPP_LR */ +#define NTHW_MOD_RPP_LR (0xba7f945cUL) +#define RPP_LR_IFR_RCP_CTRL (0xce88594UL) +#define RPP_LR_IFR_RCP_CTRL_ADR (0x4b4cc068UL) +#define RPP_LR_IFR_RCP_CTRL_CNT (0x5b4459b9UL) +#define RPP_LR_IFR_RCP_DATA (0xa339078dUL) +#define RPP_LR_IFR_RCP_DATA_IPV4_DF_DROP (0xee1d681fUL) +#define RPP_LR_IFR_RCP_DATA_IPV4_EN (0xfe386131UL) +#define RPP_LR_IFR_RCP_DATA_IPV6_DROP (0x41f324ffUL) +#define RPP_LR_IFR_RCP_DATA_IPV6_EN (0x5431a9baUL) +#define RPP_LR_IFR_RCP_DATA_MTU (0x871a2322UL) +#define RPP_LR_RCP_CTRL (0xf3395d47UL) +#define RPP_LR_RCP_CTRL_ADR (0x4916a944UL) +#define RPP_LR_RCP_CTRL_CNT (0x591e3095UL) +#define RPP_LR_RCP_DATA (0x5ce8df5eUL) +#define RPP_LR_RCP_DATA_EXP (0x578ca035UL) + +#endif /* _NTHW_FPGA_REG_DEFS_RPP_LR_ */ + +/* + * Auto-generated file - do *NOT* edit + */ -- 2.45.0