From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 5501345ADF; Tue, 8 Oct 2024 09:43:54 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 3E179406B6; Tue, 8 Oct 2024 09:43:54 +0200 (CEST) Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.13]) by mails.dpdk.org (Postfix) with ESMTP id DBC4A40697 for ; Tue, 8 Oct 2024 09:43:51 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1728373433; x=1759909433; h=from:to:cc:subject:date:message-id:in-reply-to: references; bh=mUTM1g13aM3AfJY5MmERLpy/Lw2xHabbKQgsqcoqRWs=; b=KI1dLy499sI1DMDxDrhlexCf4pQziGkzT4VRxOTpTxtwHJ/V9nDB6lHY 9dpXWTdOQZjmHNqR+wcuMKIgj2mLfCgB4J6HSlEZKWrNWT9AeYh2/YHvH TrEZNLDjE+1y37Go9eN8bBl6ZRGo2OZSDVx4GWr8jmxFQzmyud4YHZLGc XSC84nRufDe7o6SI9mVQvJfnzmqZdVM+UWEXAsCLz+dR9Un0RY5/fBC8m DKBKBGAaIsmuWkjfP0G6sIHWXw2wo0z5bLK88TQ/KLoEYCKIugVmxwSeH 197KHPMkY9Y3cfyndhdxwDMCUISAK17CIjrrMLr7XtBrEDeLg3LgXHn9d w==; X-CSE-ConnectionGUID: el0awMeARnew2kof5rCOBg== X-CSE-MsgGUID: bEimobcWTpaJGp4nSN86Fw== X-IronPort-AV: E=McAfee;i="6700,10204,11218"; a="38682587" X-IronPort-AV: E=Sophos;i="6.11,186,1725346800"; d="scan'208";a="38682587" Received: from orviesa004.jf.intel.com ([10.64.159.144]) by orvoesa105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Oct 2024 00:43:52 -0700 X-CSE-ConnectionGUID: LazPkzqwT2ib4FHWBR9/1Q== X-CSE-MsgGUID: k1YbFKhLTjSv2qlFOA+pDQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.11,186,1725346800"; d="scan'208";a="80719812" Received: from silpixa00399302.ir.intel.com ([10.237.214.22]) by orviesa004.jf.intel.com with ESMTP; 08 Oct 2024 00:43:50 -0700 From: Arkadiusz Kusztal To: dev@dpdk.org Cc: gakhil@marvell.com, brian.dooley@intel.com, Arkadiusz Kusztal Subject: [PATCH v3 1/4] cryptodev: add partial sm2 feature flag Date: Tue, 8 Oct 2024 07:28:42 +0100 Message-Id: <20241008062845.11071-1-arkadiuszx.kusztal@intel.com> X-Mailer: git-send-email 2.13.6 In-Reply-To: <20240929172912.87859-1-arkadiuszx.kusztal@intel.com> References: <20240929172912.87859-1-arkadiuszx.kusztal@intel.com> X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Due to complex ways of handling asymmetric cryptography algorithms, capabilities may differ between hardware and software PMDs, or even between hardware PMDs. One of the examples are algorithms that need an additional round of hashing, like SM2. Signed-off-by: Arkadiusz Kusztal --- lib/cryptodev/rte_cryptodev.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/lib/cryptodev/rte_cryptodev.h b/lib/cryptodev/rte_cryptodev.h index bec947f6d5..c0e816b17f 100644 --- a/lib/cryptodev/rte_cryptodev.h +++ b/lib/cryptodev/rte_cryptodev.h @@ -554,6 +554,8 @@ rte_cryptodev_asym_get_xform_string(enum rte_crypto_asym_xform_type xform_enum); /**< Support inner checksum computation/verification */ #define RTE_CRYPTODEV_FF_SECURITY_RX_INJECT (1ULL << 28) /**< Support Rx injection after security processing */ +#define RTE_CRYPTODEV_FF_ASYM_PARTIAL_SM2 (1ULL << 29) +/**< Support the elliptic curve part only in SM2 */ /** * Get the name of a crypto device feature flag -- 2.13.6