From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 15BC445ADE; Tue, 8 Oct 2024 12:55:04 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 0A2B940DD6; Tue, 8 Oct 2024 12:54:32 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id AF9ED406BA for ; Tue, 8 Oct 2024 12:54:30 +0200 (CEST) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 498A9sn1023020; Tue, 8 Oct 2024 03:54:30 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=pfpt0220; bh=k 2wrtdLh7PZZnfMdWzGpErEv7ugAdO4LIIgDSYKxbyw=; b=U4dTBYt0TmCYgKjJE xm9fIqCEaZzN2MWnDm3ETXw/dkO2Mm0ERrQaUksOH8rTA8N+u3PlwxdcEEFpsukk dzH+ZKgNMQxs9j8CA8xFNygDXUMlTiPIno2WDIQYBtDy2GNCyMpDWIHZoqUj26rx S+t6hblns7NvNA56pt/zUnBG2vVpEQinoD4wuYOIPpB21yukrhSGFRm8R6PzTiiZ /7b+6sLcLvcM8OG+Pjcuj2NP/P0utulipy5lu9P74d4gh6QpraQ8tpK0vhZ/6wBu wIBdp+ApDmhUpmflnZm4qzFCLMjGwyTpRSJA66upp0yvbTTdFku32yv6Qe/MXJe1 wydmQ== Received: from dc6wp-exch02.marvell.com ([4.21.29.225]) by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 424vg88t9f-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 08 Oct 2024 03:54:29 -0700 (PDT) Received: from DC6WP-EXCH02.marvell.com (10.76.176.209) by DC6WP-EXCH02.marvell.com (10.76.176.209) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.4; Tue, 8 Oct 2024 03:54:29 -0700 Received: from maili.marvell.com (10.69.176.80) by DC6WP-EXCH02.marvell.com (10.76.176.209) with Microsoft SMTP Server id 15.2.1544.4 via Frontend Transport; Tue, 8 Oct 2024 03:54:29 -0700 Received: from localhost.localdomain (unknown [10.28.36.102]) by maili.marvell.com (Postfix) with ESMTP id E9BB33F7045; Tue, 8 Oct 2024 03:54:26 -0700 (PDT) From: Akhil Goyal To: CC: , , , , , "Akhil Goyal" Subject: [PATCH v2 3/9] raw/cnxk_rvu_lf: add PMD API to get BAR addresses Date: Tue, 8 Oct 2024 16:24:09 +0530 Message-ID: <20241008105415.1026962-4-gakhil@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20241008105415.1026962-1-gakhil@marvell.com> References: <20240907193311.1342310-3-gakhil@marvell.com> <20241008105415.1026962-1-gakhil@marvell.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Proofpoint-ORIG-GUID: 28-JwMserxfvC-h85fG1r-eCzwfn8to5 X-Proofpoint-GUID: 28-JwMserxfvC-h85fG1r-eCzwfn8to5 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Added rte_pmd_rvu_lf_bar_get() API to get BAR address for application to configure hardware. Signed-off-by: Akhil Goyal --- doc/guides/rawdevs/cnxk_rvu_lf.rst | 7 +++++++ drivers/raw/cnxk_rvu_lf/cnxk_rvu_lf.c | 23 +++++++++++++++++++++++ drivers/raw/cnxk_rvu_lf/cnxk_rvu_lf.h | 18 ++++++++++++++++++ 3 files changed, 48 insertions(+) diff --git a/doc/guides/rawdevs/cnxk_rvu_lf.rst b/doc/guides/rawdevs/cnxk_rvu_lf.rst index 13184ad4dc..6dfbd466ad 100644 --- a/doc/guides/rawdevs/cnxk_rvu_lf.rst +++ b/doc/guides/rawdevs/cnxk_rvu_lf.rst @@ -45,3 +45,10 @@ Get NPA and SSO PF FUNC APIs ``rte_pmd_rvu_lf_npa_pf_func_get()`` and ``rte_pmd_rvu_lf_sso_pf_func_get()`` can be used to get the cnxk NPA PF func and SSO PF func which application can use for NPA/SSO specific configuration. + +Get BAR addresses +----------------- + +Application can retrieve PCI BAR addresses of the device using the API +``rte_pmd_rvu_lf_bar_get()``. This helps application to configure the +registers of the hardware device. diff --git a/drivers/raw/cnxk_rvu_lf/cnxk_rvu_lf.c b/drivers/raw/cnxk_rvu_lf/cnxk_rvu_lf.c index 7285059cdd..bbcf33017d 100644 --- a/drivers/raw/cnxk_rvu_lf/cnxk_rvu_lf.c +++ b/drivers/raw/cnxk_rvu_lf/cnxk_rvu_lf.c @@ -15,6 +15,29 @@ #include "cnxk_rvu_lf.h" +int +rte_pmd_rvu_lf_bar_get(uint8_t dev_id, uint8_t bar_num, size_t *va, size_t *mask) +{ + struct roc_rvu_lf *roc_rvu_lf; + struct rte_rawdev *rawdev; + + rawdev = rte_rawdev_pmd_get_dev(dev_id); + if (rawdev == NULL) + return -EINVAL; + + roc_rvu_lf = (struct roc_rvu_lf *)rawdev->dev_private; + if (bar_num > PCI_MAX_RESOURCE || + (roc_rvu_lf->pci_dev->mem_resource[bar_num].addr == NULL)) { + *va = 0; + *mask = 0; + return -ENOTSUP; + } + *va = (size_t)(roc_rvu_lf->pci_dev->mem_resource[bar_num].addr); + *mask = (size_t)(roc_rvu_lf->pci_dev->mem_resource[bar_num].len - 1); + + return 0; +} + uint16_t rte_pmd_rvu_lf_npa_pf_func_get(void) { diff --git a/drivers/raw/cnxk_rvu_lf/cnxk_rvu_lf.h b/drivers/raw/cnxk_rvu_lf/cnxk_rvu_lf.h index 25da50caa2..1f4dd135e1 100644 --- a/drivers/raw/cnxk_rvu_lf/cnxk_rvu_lf.h +++ b/drivers/raw/cnxk_rvu_lf/cnxk_rvu_lf.h @@ -46,6 +46,24 @@ uint16_t rte_pmd_rvu_lf_npa_pf_func_get(void); __rte_experimental uint16_t rte_pmd_rvu_lf_sso_pf_func_get(void); +/** + * Get BAR addresses for the RVU LF device. + * + * @param dev_id + * device id of RVU LF device + * @param bar_num + * BAR number for which address is required + * @param[out] va + * Virtual address of the BAR. 0 if not mapped + * @param[out] mask + * BAR address mask, 0 if not mapped + * + * @return + * Returns 0 on success, negative error code otherwise + */ +__rte_experimental +int rte_pmd_rvu_lf_bar_get(uint8_t dev_id, uint8_t bar_num, size_t *va, size_t *mask); + #ifdef __cplusplus } #endif -- 2.25.1