From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 4B83245AF8; Wed, 9 Oct 2024 23:18:45 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id A4EDE4066C; Wed, 9 Oct 2024 23:17:58 +0200 (CEST) Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.10]) by mails.dpdk.org (Postfix) with ESMTP id DBEA1402E9 for ; Wed, 9 Oct 2024 23:17:44 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1728508665; x=1760044665; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=emkjUEUFuLVmmdsQWxAHu3g4Y0GlO/GNxiLsZmpFUfk=; b=Wxf/vnsLbENjcUBuHfPcoW1rb+ELxBsSTnRE8VmKTTHL1zsVK2LjkKhM OpKH+GIkyoTSQYkUPcCb+a6PbW3sxYsVk4woAMefJme5zSXHFQkCzApmo 5te+WiB489dmAHTKSNPQ+bs8N8HnlENVCpl+8YidSzgC6lsggcAZVmzZR 787rmTJnJ/5Nf56t9qlrqLz80nRUQUSNR0ekgeIYfc6USe2rwWl2Y7/5T 4RsV0AjD5RkKGxq/YyM55l1sSCTIeCpvhz8qQPOzfBNR7GGahwbUrIglW YKdc/0wY8Kj1F7irjjd4J4j1HWpoLB08K1UphhNwmHmE7/38fVlHaNkrI g==; X-CSE-ConnectionGUID: iNppSchyQe23MJibYQgWXQ== X-CSE-MsgGUID: Opc1gyKbSqG8TgxvvA46cQ== X-IronPort-AV: E=McAfee;i="6700,10204,11220"; a="39202249" X-IronPort-AV: E=Sophos;i="6.11,190,1725346800"; d="scan'208";a="39202249" Received: from fmviesa008.fm.intel.com ([10.60.135.148]) by fmvoesa104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Oct 2024 14:17:44 -0700 X-CSE-ConnectionGUID: BqwD9XDBSfWUjqodP+kv7A== X-CSE-MsgGUID: G3MfG7tXTbi7qdUAv+m/mQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.11,190,1725346800"; d="scan'208";a="76480622" Received: from unknown (HELO csl-npg-qt0.la.intel.com) ([10.233.181.103]) by fmviesa008.fm.intel.com with ESMTP; 09 Oct 2024 14:17:44 -0700 From: Hernan Vargas To: dev@dpdk.org, gakhil@marvell.com, trix@redhat.com, maxime.coquelin@redhat.com Cc: nicolas.chautru@intel.com, qi.z.zhang@intel.com, Hernan Vargas Subject: [PATCH v3 10/12] baseband/acc: cosmetic changes Date: Wed, 9 Oct 2024 14:13:00 -0700 Message-Id: <20241009211302.177471-11-hernan.vargas@intel.com> X-Mailer: git-send-email 2.37.1 In-Reply-To: <20241009211302.177471-1-hernan.vargas@intel.com> References: <20241009211302.177471-1-hernan.vargas@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Cosmetic code changes. No functional impact. Signed-off-by: Hernan Vargas --- drivers/baseband/acc/rte_acc100_pmd.c | 2 +- drivers/baseband/acc/rte_vrb_pmd.c | 54 +++++++++++++++++---------- 2 files changed, 36 insertions(+), 20 deletions(-) diff --git a/drivers/baseband/acc/rte_acc100_pmd.c b/drivers/baseband/acc/rte_acc100_pmd.c index c690d1492ba3..c82a0b6cc174 100644 --- a/drivers/baseband/acc/rte_acc100_pmd.c +++ b/drivers/baseband/acc/rte_acc100_pmd.c @@ -4200,7 +4200,7 @@ poweron_cleanup(struct rte_bbdev *bbdev, struct acc_device *d, acc_reg_write(d, HWPfQmgrIngressAq + 0x100, enq_req.val); usleep(ACC_LONG_WAIT * 100); if (desc->req.word0 != 2) - rte_bbdev_log(WARNING, "DMA Response %#"PRIx32, desc->req.word0); + rte_bbdev_log(WARNING, "DMA Response %#"PRIx32"", desc->req.word0); } /* Reset LDPC Cores */ diff --git a/drivers/baseband/acc/rte_vrb_pmd.c b/drivers/baseband/acc/rte_vrb_pmd.c index 42414823541e..c0464d20c641 100644 --- a/drivers/baseband/acc/rte_vrb_pmd.c +++ b/drivers/baseband/acc/rte_vrb_pmd.c @@ -957,6 +957,9 @@ vrb_queue_setup(struct rte_bbdev *dev, uint16_t queue_id, struct acc_queue *q; int32_t q_idx; int ret; + union acc_dma_desc *desc = NULL; + unsigned int desc_idx, b_idx; + int fcw_len; if (d == NULL) { rte_bbdev_log(ERR, "Undefined device"); @@ -983,16 +986,33 @@ vrb_queue_setup(struct rte_bbdev *dev, uint16_t queue_id, } /* Prepare the Ring with default descriptor format. */ - union acc_dma_desc *desc = NULL; - unsigned int desc_idx, b_idx; - int fcw_len = (conf->op_type == RTE_BBDEV_OP_LDPC_ENC ? - ACC_FCW_LE_BLEN : (conf->op_type == RTE_BBDEV_OP_TURBO_DEC ? - ACC_FCW_TD_BLEN : (conf->op_type == RTE_BBDEV_OP_LDPC_DEC ? - ACC_FCW_LD_BLEN : (conf->op_type == RTE_BBDEV_OP_FFT ? - ACC_FCW_FFT_BLEN : ACC_FCW_MLDTS_BLEN)))); - - if ((q->d->device_variant == VRB2_VARIANT) && (conf->op_type == RTE_BBDEV_OP_FFT)) - fcw_len = ACC_FCW_FFT_BLEN_3; + switch (conf->op_type) { + case RTE_BBDEV_OP_LDPC_ENC: + fcw_len = ACC_FCW_LE_BLEN; + break; + case RTE_BBDEV_OP_LDPC_DEC: + fcw_len = ACC_FCW_LD_BLEN; + break; + case RTE_BBDEV_OP_TURBO_DEC: + fcw_len = ACC_FCW_TD_BLEN; + break; + case RTE_BBDEV_OP_TURBO_ENC: + fcw_len = ACC_FCW_TE_BLEN; + break; + case RTE_BBDEV_OP_FFT: + fcw_len = ACC_FCW_FFT_BLEN; + if (q->d->device_variant == VRB2_VARIANT) + fcw_len = ACC_FCW_FFT_BLEN_3; + break; + case RTE_BBDEV_OP_MLDTS: + fcw_len = ACC_FCW_MLDTS_BLEN; + break; + default: + /* NOT REACHED. */ + fcw_len = 0; + rte_bbdev_log(ERR, "Unexpected error in %s using type %d", __func__, conf->op_type); + break; + } for (desc_idx = 0; desc_idx < d->sw_ring_max_depth; desc_idx++) { desc = q->ring_addr + desc_idx; @@ -1758,8 +1778,7 @@ vrb_fcw_ld_fill(struct rte_bbdev_dec_op *op, struct acc_fcw_ld *fcw, if (fcw->hcout_en > 0) { parity_offset = (op->ldpc_dec.basegraph == 1 ? 20 : 8) * op->ldpc_dec.z_c - op->ldpc_dec.n_filler; - k0_p = (fcw->k0 > parity_offset) ? - fcw->k0 - op->ldpc_dec.n_filler : fcw->k0; + k0_p = (fcw->k0 > parity_offset) ? fcw->k0 - op->ldpc_dec.n_filler : fcw->k0; ncb_p = fcw->ncb - op->ldpc_dec.n_filler; l = k0_p + fcw->rm_e; harq_out_length = (uint16_t) fcw->hcin_size0; @@ -2001,16 +2020,15 @@ vrb_dma_desc_ld_fill(struct rte_bbdev_dec_op *op, next_triplet++; } - if (check_bit(op->ldpc_dec.op_flags, - RTE_BBDEV_LDPC_HQ_COMBINE_OUT_ENABLE)) { + if (check_bit(op->ldpc_dec.op_flags, RTE_BBDEV_LDPC_HQ_COMBINE_OUT_ENABLE)) { if (op->ldpc_dec.harq_combined_output.data == 0) { rte_bbdev_log(ERR, "HARQ output is not defined"); return -1; } - /* Pruned size of the HARQ */ + /* Pruned size of the HARQ. */ h_p_size = fcw->hcout_size0 + fcw->hcout_size1; - /* Non-Pruned size of the HARQ */ + /* Non-Pruned size of the HARQ. */ h_np_size = fcw->hcout_offset > 0 ? fcw->hcout_offset + fcw->hcout_size1 : h_p_size; @@ -2584,7 +2602,6 @@ vrb_enqueue_ldpc_dec_one_op_cb(struct acc_queue *q, struct rte_bbdev_dec_op *op, seg_total_left = rte_pktmbuf_data_len(input) - in_offset; else seg_total_left = fcw->rm_e; - ret = vrb_dma_desc_ld_fill(op, &desc->req, &input, h_output, &in_offset, &h_out_offset, &h_out_length, &mbuf_total_left, @@ -2646,7 +2663,6 @@ vrb_enqueue_ldpc_dec_one_op_tb(struct acc_queue *q, struct rte_bbdev_dec_op *op, desc_first = desc; fcw_offset = (desc_idx << 8) + ACC_DESC_FCW_OFFSET; harq_layout = q->d->harq_layout; - vrb_fcw_ld_fill(op, &desc->req.fcw_ld, harq_layout, q->d->device_variant); input = op->ldpc_dec.input.data; @@ -3274,7 +3290,7 @@ vrb2_dequeue_ldpc_enc_one_op_tb(struct acc_queue *q, struct rte_bbdev_enc_op **r return 1; } -/* Dequeue one LDPC encode operations from device in TB mode. +/* Dequeue one encode operations from device in TB mode. * That operation may cover multiple descriptors. */ static inline int -- 2.37.1