From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id E576445AF8; Wed, 9 Oct 2024 23:18:26 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 7973E40654; Wed, 9 Oct 2024 23:17:54 +0200 (CEST) Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.10]) by mails.dpdk.org (Postfix) with ESMTP id 4202A402E9 for ; Wed, 9 Oct 2024 23:17:44 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1728508664; x=1760044664; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=rwZK1NfPhSPAOL1l4HzN+LRRdck6w+HXuEdlfyHfbdQ=; b=m8ak3FasZShFkzSnRJSNJZyy2OAFCppeRbA3dp9UgFp72gTZv2G/T6zq s0bKCZprQV6WJpQ+d2cDmstnGMWjBgR1S7/xAJ49aPAMRXdYDF1X9Vdr2 iF+S7jaKTvNjfWm4xFYOqXw3UfAaUtBbt3oNGSmxOipg6zKTMvstSoKdT C8lQd6nc7GtUZUgnzIxwRY1/WiNUOtsLCftND1QUeYD8UKch085LeqWTe e+o/0MLaLXHyjkb+wyIYrOnBS+wMjBk1TjRznh/v5PwV0R6L/pl/XXBcU FEy/MYqJQBfZ4xYmjefNqkbCNuZA7d9SqUaos/7lt5ZNoeLgsusAMmXEz g==; X-CSE-ConnectionGUID: jy69cXp4TKiea2D616DKrA== X-CSE-MsgGUID: zCqPpvSLSP6H50sjqSgFcg== X-IronPort-AV: E=McAfee;i="6700,10204,11220"; a="39202240" X-IronPort-AV: E=Sophos;i="6.11,190,1725346800"; d="scan'208";a="39202240" Received: from fmviesa008.fm.intel.com ([10.60.135.148]) by fmvoesa104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Oct 2024 14:17:43 -0700 X-CSE-ConnectionGUID: ftOXI+WwQHmtbd7sggWv6g== X-CSE-MsgGUID: PJ+T3tcQTsKneLnTFOBOcg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.11,190,1725346800"; d="scan'208";a="76480608" Received: from unknown (HELO csl-npg-qt0.la.intel.com) ([10.233.181.103]) by fmviesa008.fm.intel.com with ESMTP; 09 Oct 2024 14:17:43 -0700 From: Hernan Vargas To: dev@dpdk.org, gakhil@marvell.com, trix@redhat.com, maxime.coquelin@redhat.com Cc: nicolas.chautru@intel.com, qi.z.zhang@intel.com, Hernan Vargas Subject: [PATCH v3 07/12] baseband/acc: algorithm tuning for LDPC decoder Date: Wed, 9 Oct 2024 14:12:57 -0700 Message-Id: <20241009211302.177471-8-hernan.vargas@intel.com> X-Mailer: git-send-email 2.37.1 In-Reply-To: <20241009211302.177471-1-hernan.vargas@intel.com> References: <20241009211302.177471-1-hernan.vargas@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Reverting to MS1 version of the algorithm to improve MU1 fading conditions. Signed-off-by: Hernan Vargas Reviewed-by: Maxime Coquelin --- drivers/baseband/acc/rte_vrb_pmd.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/baseband/acc/rte_vrb_pmd.c b/drivers/baseband/acc/rte_vrb_pmd.c index 519385e82ed3..4d7535e9d99f 100644 --- a/drivers/baseband/acc/rte_vrb_pmd.c +++ b/drivers/baseband/acc/rte_vrb_pmd.c @@ -1363,7 +1363,7 @@ vrb_dev_info_get(struct rte_bbdev *dev, struct rte_bbdev_driver_info *dev_info) RTE_BBDEV_LDPC_SOFT_OUT_DEINTERLEAVER_BYPASS | RTE_BBDEV_LDPC_DEC_INTERRUPTS, .llr_size = 8, - .llr_decimals = 2, + .llr_decimals = 1, .num_buffers_src = RTE_BBDEV_LDPC_MAX_CODE_BLOCKS, .num_buffers_hard_out = @@ -1737,8 +1737,8 @@ vrb_fcw_ld_fill(struct rte_bbdev_dec_op *op, struct acc_fcw_ld *fcw, fcw->so_bypass_intlv = check_bit(op->ldpc_dec.op_flags, RTE_BBDEV_LDPC_SOFT_OUT_DEINTERLEAVER_BYPASS); fcw->so_bypass_rm = 0; - fcw->minsum_offset = 1; - fcw->dec_llrclip = 2; + fcw->minsum_offset = 0; + fcw->dec_llrclip = 0; } /* -- 2.37.1