[PATCH v3 34/50] net/ntnic: add packet descriptor builder (PDB) FPGA module

[Serhii Iliushyk <sil-plv@napatech.com>]

From: Oleksandr Kolomeiets <okl-plv@napatech.com>

The Packet Description Builder module creates packet meta-data
for example virtio-net headers.

Signed-off-by: Oleksandr Kolomeiets <okl-plv@napatech.com>
---
v3
* Remove newline characters from logs.
* Modify macros according to new logging and fix braces
---
 drivers/net/ntnic/include/hw_mod_backend.h    | 34 +++++++
 drivers/net/ntnic/meson.build                 |  1 +
 drivers/net/ntnic/nthw/flow_api/flow_api.c    |  3 +
 .../nthw/flow_api/hw_mod/hw_mod_backend.c     |  1 +
 .../ntnic/nthw/flow_api/hw_mod/hw_mod_pdb.c   | 91 +++++++++++++++++++
 .../supported/nthw_fpga_9563_055_049_0000.c   | 40 +++++++-
 6 files changed, 169 insertions(+), 1 deletion(-)
 create mode 100644 drivers/net/ntnic/nthw/flow_api/hw_mod/hw_mod_pdb.c

diff --git a/drivers/net/ntnic/include/hw_mod_backend.h b/drivers/net/ntnic/include/hw_mod_backend.h
index b26db9d939..b04ddbf638 100644
--- a/drivers/net/ntnic/include/hw_mod_backend.h
+++ b/drivers/net/ntnic/include/hw_mod_backend.h
@@ -612,6 +612,39 @@ struct pdb_func_s {
 		struct hw_mod_pdb_v9_s v9;
 	};
 };
+enum hw_pdb_e {
+	/* functions */
+	HW_PDB_RCP_PRESET_ALL = 0,
+	HW_PDB_RCP_COMPARE,
+	HW_PDB_RCP_FIND,
+	/* fields */
+	HW_PDB_RCP_DESCRIPTOR = FIELD_START_INDEX,
+	HW_PDB_RCP_DESC_LEN,
+	HW_PDB_RCP_TX_PORT,
+	HW_PDB_RCP_TX_IGNORE,
+	HW_PDB_RCP_TX_NOW,
+	HW_PDB_RCP_CRC_OVERWRITE,
+	HW_PDB_RCP_ALIGN,
+	HW_PDB_RCP_OFS0_DYN,
+	HW_PDB_RCP_OFS0_REL,
+	HW_PDB_RCP_OFS1_DYN,
+	HW_PDB_RCP_OFS1_REL,
+	HW_PDB_RCP_OFS2_DYN,
+	HW_PDB_RCP_OFS2_REL,
+	HW_PDB_RCP_IP_PROT_TNL,
+	HW_PDB_RCP_PPC_HSH,
+	HW_PDB_RCP_DUPLICATE_EN,
+	HW_PDB_RCP_DUPLICATE_BIT,
+	HW_PDB_RCP_PCAP_KEEP_FCS,
+	HW_PDB_CONFIG_TS_FORMAT,
+	HW_PDB_CONFIG_PORT_OFS,
+};
+bool hw_mod_pdb_present(struct flow_api_backend_s *be);
+int hw_mod_pdb_alloc(struct flow_api_backend_s *be);
+void hw_mod_pdb_free(struct flow_api_backend_s *be);
+int hw_mod_pdb_reset(struct flow_api_backend_s *be);
+int hw_mod_pdb_rcp_flush(struct flow_api_backend_s *be, int start_idx, int count);
+int hw_mod_pdb_config_flush(struct flow_api_backend_s *be);
 
 struct tpe_func_s {
 	COMMON_FUNC_INFO_S;
@@ -782,6 +815,7 @@ struct flow_api_backend_s {
 	struct hsh_func_s hsh;
 	struct qsl_func_s qsl;
 	struct slc_lr_func_s slc_lr;
+	struct pdb_func_s pdb;
 
 	/* NIC attributes */
 	unsigned int num_phy_ports;
diff --git a/drivers/net/ntnic/meson.build b/drivers/net/ntnic/meson.build
index 4caee8ac41..0415e5a5b2 100644
--- a/drivers/net/ntnic/meson.build
+++ b/drivers/net/ntnic/meson.build
@@ -53,6 +53,7 @@ sources = files(
         'nthw/flow_api/hw_mod/hw_mod_flm.c',
         'nthw/flow_api/hw_mod/hw_mod_hsh.c',
         'nthw/flow_api/hw_mod/hw_mod_km.c',
+        'nthw/flow_api/hw_mod/hw_mod_pdb.c',
         'nthw/flow_api/hw_mod/hw_mod_qsl.c',
         'nthw/flow_api/hw_mod/hw_mod_slc_lr.c',
         'nthw/flow_filter/flow_nthw_cat.c',
diff --git a/drivers/net/ntnic/nthw/flow_api/flow_api.c b/drivers/net/ntnic/nthw/flow_api/flow_api.c
index b58dbf1100..96496b2758 100644
--- a/drivers/net/ntnic/nthw/flow_api/flow_api.c
+++ b/drivers/net/ntnic/nthw/flow_api/flow_api.c
@@ -301,6 +301,9 @@ struct flow_nic_dev *flow_api_create(uint8_t adapter_no, const struct flow_api_b
 	if (init_resource_elements(ndev, RES_HSH_RCP, ndev->be.hsh.nb_rcp))
 		goto err_exit;
 
+	if (init_resource_elements(ndev, RES_PDB_RCP, ndev->be.pdb.nb_pdb_rcp_categories))
+		goto err_exit;
+
 	if (init_resource_elements(ndev, RES_QSL_RCP, ndev->be.qsl.nb_rcp_categories))
 		goto err_exit;
 
diff --git a/drivers/net/ntnic/nthw/flow_api/hw_mod/hw_mod_backend.c b/drivers/net/ntnic/nthw/flow_api/hw_mod/hw_mod_backend.c
index d4458980a4..0acc9612cd 100644
--- a/drivers/net/ntnic/nthw/flow_api/hw_mod/hw_mod_backend.c
+++ b/drivers/net/ntnic/nthw/flow_api/hw_mod/hw_mod_backend.c
@@ -26,6 +26,7 @@ static const struct {
 		"SLC LR", hw_mod_slc_lr_alloc, hw_mod_slc_lr_free, hw_mod_slc_lr_reset,
 		hw_mod_slc_lr_present
 	},
+	{ "PDB", hw_mod_pdb_alloc, hw_mod_pdb_free, hw_mod_pdb_reset, hw_mod_pdb_present },
 };
 #define MOD_COUNT (ARRAY_SIZE(module))
 
diff --git a/drivers/net/ntnic/nthw/flow_api/hw_mod/hw_mod_pdb.c b/drivers/net/ntnic/nthw/flow_api/hw_mod/hw_mod_pdb.c
new file mode 100644
index 0000000000..c3facacb08
--- /dev/null
+++ b/drivers/net/ntnic/nthw/flow_api/hw_mod/hw_mod_pdb.c
@@ -0,0 +1,91 @@
+/*
+ * SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2023 Napatech A/S
+ */
+
+#include <stdint.h>
+#include <stdlib.h>
+#include <string.h>
+
+#include "hw_mod_backend.h"
+
+#define _MOD_ "PDB"
+#define _VER_ be->pdb.ver
+
+bool hw_mod_pdb_present(struct flow_api_backend_s *be)
+{
+	return be->iface->get_pdb_present(be->be_dev);
+}
+
+int hw_mod_pdb_alloc(struct flow_api_backend_s *be)
+{
+	int nb;
+	_VER_ = be->iface->get_pdb_version(be->be_dev);
+	NT_LOG(DBG, FILTER, "PDB MODULE VERSION  %i.%i", VER_MAJOR(_VER_), VER_MINOR(_VER_));
+
+	nb = be->iface->get_nb_pdb_categories(be->be_dev);
+
+	if (nb <= 0) {
+		COUNT_ERROR_LOG(pdb_categories);
+		return COUNT_ERROR;
+	}
+
+	be->pdb.nb_pdb_rcp_categories = (uint32_t)nb;
+
+	switch (_VER_) {
+	case 9:
+		if (!callocate_mod((struct common_func_s *)&be->pdb, 2, &be->pdb.v9.rcp,
+				be->pdb.nb_pdb_rcp_categories, sizeof(struct pdb_v9_rcp_s),
+				&be->pdb.v9.config, 1, sizeof(struct pdb_v9_config_s)))
+			return -1;
+
+		break;
+
+	/* end case 9 */
+	default:
+		UNSUP_VER_LOG;
+		return UNSUP_VER;
+	}
+
+	return 0;
+}
+
+void hw_mod_pdb_free(struct flow_api_backend_s *be)
+{
+	if (be->pdb.base) {
+		free(be->pdb.base);
+		be->pdb.base = NULL;
+	}
+}
+
+int hw_mod_pdb_reset(struct flow_api_backend_s *be)
+{
+	int err = 0;
+	/* Zero entire cache area */
+	zero_module_cache((struct common_func_s *)(&be->hsh));
+
+	NT_LOG(DBG, FILTER, "INIT PDB RCP");
+	err |= hw_mod_pdb_rcp_flush(be, 0, ALL_ENTRIES);
+
+	NT_LOG(DBG, FILTER, "INIT PDB CONFIG");
+	err |= hw_mod_pdb_config_flush(be);
+	return err;
+}
+
+int hw_mod_pdb_rcp_flush(struct flow_api_backend_s *be, int start_idx, int count)
+{
+	if (count == ALL_ENTRIES)
+		count = be->pdb.nb_pdb_rcp_categories;
+
+	if ((unsigned int)(start_idx + count) > be->pdb.nb_pdb_rcp_categories) {
+		INDEX_TOO_LARGE_LOG;
+		return INDEX_TOO_LARGE;
+	}
+
+	return be->iface->pdb_rcp_flush(be->be_dev, &be->pdb, start_idx, count);
+}
+
+int hw_mod_pdb_config_flush(struct flow_api_backend_s *be)
+{
+	return be->iface->pdb_config_flush(be->be_dev, &be->pdb);
+}
diff --git a/drivers/net/ntnic/nthw/supported/nthw_fpga_9563_055_049_0000.c b/drivers/net/ntnic/nthw/supported/nthw_fpga_9563_055_049_0000.c
index 7eeb210b80..9f821abf55 100644
--- a/drivers/net/ntnic/nthw/supported/nthw_fpga_9563_055_049_0000.c
+++ b/drivers/net/ntnic/nthw/supported/nthw_fpga_9563_055_049_0000.c
@@ -1297,6 +1297,43 @@ static nthw_fpga_register_init_s pci_wr_tg_registers[] = {
 	{ PCI_WR_TG_TG_WR_RUN, 4, 16, NTHW_FPGA_REG_TYPE_WO, 0, 1, pci_wr_tg_tg_wr_run_fields },
 };
 
+static nthw_fpga_field_init_s pdb_config_fields[] = {
+	{ PDB_CONFIG_PORT_OFS, 6, 3, 0 },
+	{ PDB_CONFIG_TS_FORMAT, 3, 0, 0 },
+};
+
+static nthw_fpga_field_init_s pdb_rcp_ctrl_fields[] = {
+	{ PDB_RCP_CTRL_ADR, 4, 0, 0x0000 },
+	{ PDB_RCP_CTRL_CNT, 16, 16, 0x0000 },
+};
+
+static nthw_fpga_field_init_s pdb_rcp_data_fields[] = {
+	{ PDB_RCP_DATA_ALIGN, 1, 17, 0x0000 },
+	{ PDB_RCP_DATA_CRC_OVERWRITE, 1, 16, 0x0000 },
+	{ PDB_RCP_DATA_DESCRIPTOR, 4, 0, 0x0000 },
+	{ PDB_RCP_DATA_DESC_LEN, 5, 4, 0 },
+	{ PDB_RCP_DATA_DUPLICATE_BIT, 5, 61, 0x0000 },
+	{ PDB_RCP_DATA_DUPLICATE_EN, 1, 60, 0x0000 },
+	{ PDB_RCP_DATA_IP_PROT_TNL, 1, 57, 0x0000 },
+	{ PDB_RCP_DATA_OFS0_DYN, 5, 18, 0x0000 },
+	{ PDB_RCP_DATA_OFS0_REL, 8, 23, 0x0000 },
+	{ PDB_RCP_DATA_OFS1_DYN, 5, 31, 0x0000 },
+	{ PDB_RCP_DATA_OFS1_REL, 8, 36, 0x0000 },
+	{ PDB_RCP_DATA_OFS2_DYN, 5, 44, 0x0000 },
+	{ PDB_RCP_DATA_OFS2_REL, 8, 49, 0x0000 },
+	{ PDB_RCP_DATA_PCAP_KEEP_FCS, 1, 66, 0x0000 },
+	{ PDB_RCP_DATA_PPC_HSH, 2, 58, 0x0000 },
+	{ PDB_RCP_DATA_TX_IGNORE, 1, 14, 0x0000 },
+	{ PDB_RCP_DATA_TX_NOW, 1, 15, 0x0000 },
+	{ PDB_RCP_DATA_TX_PORT, 5, 9, 0x0000 },
+};
+
+static nthw_fpga_register_init_s pdb_registers[] = {
+	{ PDB_CONFIG, 2, 10, NTHW_FPGA_REG_TYPE_WO, 0, 2, pdb_config_fields },
+	{ PDB_RCP_CTRL, 0, 32, NTHW_FPGA_REG_TYPE_WO, 0, 2, pdb_rcp_ctrl_fields },
+	{ PDB_RCP_DATA, 1, 67, NTHW_FPGA_REG_TYPE_WO, 0, 18, pdb_rcp_data_fields },
+};
+
 static nthw_fpga_field_init_s qsl_qen_ctrl_fields[] = {
 	{ QSL_QEN_CTRL_ADR, 5, 0, 0x0000 },
 	{ QSL_QEN_CTRL_CNT, 16, 16, 0x0000 },
@@ -1510,6 +1547,7 @@ static nthw_fpga_module_init_s fpga_modules[] = {
 		MOD_PCI_WR_TG, 0, MOD_PCI_WR_TG, 0, 1, NTHW_FPGA_BUS_TYPE_RAB0, 2304, 7,
 		pci_wr_tg_registers
 	},
+	{ MOD_PDB, 0, MOD_PDB, 0, 9, NTHW_FPGA_BUS_TYPE_RAB1, 2560, 3, pdb_registers },
 	{ MOD_QSL, 0, MOD_QSL, 0, 7, NTHW_FPGA_BUS_TYPE_RAB1, 1792, 8, qsl_registers },
 	{ MOD_RAC, 0, MOD_RAC, 3, 0, NTHW_FPGA_BUS_TYPE_PCI, 8192, 14, rac_registers },
 	{ MOD_RST9563, 0, MOD_RST9563, 0, 5, NTHW_FPGA_BUS_TYPE_RAB0, 1024, 5, rst9563_registers },
@@ -1672,5 +1710,5 @@ static nthw_fpga_prod_param_s product_parameters[] = {
 };
 
 nthw_fpga_prod_init_s nthw_fpga_9563_055_049_0000 = {
-	200, 9563, 55, 49, 0, 0, 1726740521, 152, product_parameters, 19, fpga_modules,
+	200, 9563, 55, 49, 0, 0, 1726740521, 152, product_parameters, 20, fpga_modules,
 };
-- 
2.45.0