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(unknown [10.28.36.156]) by maili.marvell.com (Postfix) with ESMTP id 977305B6928; Fri, 11 Oct 2024 03:12:49 -0700 (PDT) From: Vamsi Krishna To: , , CC: , , , , Vamsi Attunuru , "Amit Prakash Shukla" , Anoob Joseph Subject: [PATCH v6 1/1] dmadev: support strict priority configuration Date: Fri, 11 Oct 2024 15:42:36 +0530 Message-ID: <20241011101236.1467783-1-vattunuru@marvell.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241011091306.1427077-1-vattunuru@marvell.com> References: <20241011091306.1427077-1-vattunuru@marvell.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Proofpoint-GUID: dVNyojw1BS__R3B8M7swP0PJM7mRR9Pj X-Proofpoint-ORIG-GUID: dVNyojw1BS__R3B8M7swP0PJM7mRR9Pj X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.687,Hydra:6.0.235,FMLib:17.0.607.475 definitions=2020-10-13_15,2020-10-13_02,2020-04-07_01 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Vamsi Attunuru Some DMA controllers offer the ability to configure priority level for the DMA channels, allowing for the prioritization of DMA command execution based on channel importance. This patch supports such strict priority configuration. If the dmadev supports, it should advertise the capability flag RTE_DMA_CAPA_PRI_POLICY_SP, then application could enable strict priority configuration. Signed-off-by: Vamsi Attunuru Signed-off-by: Amit Prakash Shukla Acked-by: Chengwen Feng Acked-by: Anoob Joseph --- V6 changes: * Rebased onto the latest V5 changes: * Updated comments and commit message * Addressed V4 review comments V4 changes: * Rebased onto the latest V3 changes: * Corrected patch title V2 changes: * Reverted removed text from release_24_11.rst V1 changes: * Added trace support * Added new capability flag Deprecation notice: https://patches.dpdk.org/project/dpdk/patch/20240730144612.2132848-1-amitprakashs@marvell.com/ * Assuming we do not anticipate any advanced scheduling schemes for dmadev queues, this patch is intended to support a strict priority scheme. doc/guides/rel_notes/release_24_11.rst | 8 ++++++++ lib/dmadev/rte_dmadev.c | 14 ++++++++++++++ lib/dmadev/rte_dmadev.h | 19 +++++++++++++++++++ lib/dmadev/rte_dmadev_trace.h | 2 ++ 4 files changed, 43 insertions(+) diff --git a/doc/guides/rel_notes/release_24_11.rst b/doc/guides/rel_notes/release_24_11.rst index 53d8661365..5ee318b797 100644 --- a/doc/guides/rel_notes/release_24_11.rst +++ b/doc/guides/rel_notes/release_24_11.rst @@ -150,6 +150,11 @@ New Features * Added independent enqueue feature. +* **Added strict priority capability for dmadev.** + + Added new capability flag ``RTE_DMA_CAPA_PRI_POLICY_SP`` to check if the + DMA device supports assigning fixed priority, allowing for better control + over resource allocation and scheduling. Removed Items ------------- @@ -221,6 +226,9 @@ ABI Changes * eventdev: Added ``preschedule_type`` field to ``rte_event_dev_config`` structure. +* dmadev: Added ``nb_priorities`` field to ``rte_dma_info`` structure and + ``priority`` field to ``rte_dma_conf`` structure to get device supported + priority levels and configure required priority from the application. Known Issues ------------ diff --git a/lib/dmadev/rte_dmadev.c b/lib/dmadev/rte_dmadev.c index 845727210f..0d92d15d65 100644 --- a/lib/dmadev/rte_dmadev.c +++ b/lib/dmadev/rte_dmadev.c @@ -450,6 +450,11 @@ rte_dma_info_get(int16_t dev_id, struct rte_dma_info *dev_info) if (ret != 0) return ret; + if ((dev_info->dev_capa & RTE_DMA_CAPA_PRI_POLICY_SP) && (dev_info->nb_priorities <= 1)) { + RTE_DMA_LOG(ERR, "Num of priorities must be > 1 for Device %d", dev_id); + return -EINVAL; + } + dev_info->dev_name = dev->data->dev_name; dev_info->numa_node = dev->device->numa_node; dev_info->nb_vchans = dev->data->dev_conf.nb_vchans; @@ -497,6 +502,12 @@ rte_dma_configure(int16_t dev_id, const struct rte_dma_conf *dev_conf) return -EINVAL; } + if ((dev_info.dev_capa & RTE_DMA_CAPA_PRI_POLICY_SP) && + (dev_conf->priority >= dev_info.nb_priorities)) { + RTE_DMA_LOG(ERR, "Device %d configure invalid priority", dev_id); + return -EINVAL; + } + if (*dev->dev_ops->dev_configure == NULL) return -ENOTSUP; ret = (*dev->dev_ops->dev_configure)(dev, dev_conf, @@ -769,6 +780,7 @@ dma_capability_name(uint64_t capability) { RTE_DMA_CAPA_SILENT, "silent" }, { RTE_DMA_CAPA_HANDLES_ERRORS, "handles_errors" }, { RTE_DMA_CAPA_M2D_AUTO_FREE, "m2d_auto_free" }, + { RTE_DMA_CAPA_PRI_POLICY_SP, "pri_policy_sp" }, { RTE_DMA_CAPA_OPS_COPY, "copy" }, { RTE_DMA_CAPA_OPS_COPY_SG, "copy_sg" }, { RTE_DMA_CAPA_OPS_FILL, "fill" }, @@ -955,6 +967,7 @@ dmadev_handle_dev_info(const char *cmd __rte_unused, rte_tel_data_start_dict(d); rte_tel_data_add_dict_string(d, "name", dma_info.dev_name); rte_tel_data_add_dict_int(d, "nb_vchans", dma_info.nb_vchans); + rte_tel_data_add_dict_int(d, "nb_priorities", dma_info.nb_priorities); rte_tel_data_add_dict_int(d, "numa_node", dma_info.numa_node); rte_tel_data_add_dict_int(d, "max_vchans", dma_info.max_vchans); rte_tel_data_add_dict_int(d, "max_desc", dma_info.max_desc); @@ -974,6 +987,7 @@ dmadev_handle_dev_info(const char *cmd __rte_unused, ADD_CAPA(dma_caps, dev_capa, RTE_DMA_CAPA_SILENT); ADD_CAPA(dma_caps, dev_capa, RTE_DMA_CAPA_HANDLES_ERRORS); ADD_CAPA(dma_caps, dev_capa, RTE_DMA_CAPA_M2D_AUTO_FREE); + ADD_CAPA(dma_caps, dev_capa, RTE_DMA_CAPA_PRI_POLICY_SP); ADD_CAPA(dma_caps, dev_capa, RTE_DMA_CAPA_OPS_COPY); ADD_CAPA(dma_caps, dev_capa, RTE_DMA_CAPA_OPS_COPY_SG); ADD_CAPA(dma_caps, dev_capa, RTE_DMA_CAPA_OPS_FILL); diff --git a/lib/dmadev/rte_dmadev.h b/lib/dmadev/rte_dmadev.h index d174d325a1..2f9304a9db 100644 --- a/lib/dmadev/rte_dmadev.h +++ b/lib/dmadev/rte_dmadev.h @@ -258,6 +258,13 @@ int16_t rte_dma_next_dev(int16_t start_dev_id); * rte_dma_vchan_setup() will fail. */ #define RTE_DMA_CAPA_M2D_AUTO_FREE RTE_BIT64(7) +/** Support strict priority scheduling. + * + * Application could assign fixed priority to the DMA device using 'priority' + * field in struct rte_dma_conf. Number of supported priority levels will be + * known from 'nb_priorities' field in struct rte_dma_info. + */ +#define RTE_DMA_CAPA_PRI_POLICY_SP RTE_BIT64(8) /** Support copy operation. * This capability start with index of 32, so that it could leave gap between @@ -297,6 +304,10 @@ struct rte_dma_info { int16_t numa_node; /** Number of virtual DMA channel configured. */ uint16_t nb_vchans; + /** Number of priority levels (must be > 1) if priority scheduling is supported, + * 0 otherwise. + */ + uint16_t nb_priorities; }; /** @@ -332,6 +343,14 @@ struct rte_dma_conf { * @see RTE_DMA_CAPA_SILENT */ bool enable_silent; + /* The priority of the DMA device. + * This value should be lower than the field 'nb_priorities' of struct + * rte_dma_info which get from rte_dma_info_get(). If the DMA device + * does not support priority scheduling, this value should be zero. + * + * Lowest value indicates higher priority and vice-versa. + */ + uint16_t priority; }; /** diff --git a/lib/dmadev/rte_dmadev_trace.h b/lib/dmadev/rte_dmadev_trace.h index e55c4c6091..be089c065c 100644 --- a/lib/dmadev/rte_dmadev_trace.h +++ b/lib/dmadev/rte_dmadev_trace.h @@ -35,6 +35,7 @@ RTE_TRACE_POINT( rte_trace_point_emit_u16(dev_info->max_sges); rte_trace_point_emit_i16(dev_info->numa_node); rte_trace_point_emit_u16(dev_info->nb_vchans); + rte_trace_point_emit_u16(dev_info->nb_priorities); ) RTE_TRACE_POINT( @@ -48,6 +49,7 @@ RTE_TRACE_POINT( int enable_silent = (int)dev_conf->enable_silent; rte_trace_point_emit_i16(dev_id); rte_trace_point_emit_u16(dev_conf->nb_vchans); + rte_trace_point_emit_u16(dev_conf->priority); rte_trace_point_emit_int(enable_silent); rte_trace_point_emit_int(ret); ) -- 2.34.1