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CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:dc6edge2.nvidia.com; CAT:NONE; SFS:(13230040)(1800799024)(36860700013)(376014)(82310400026); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 14 Oct 2024 08:05:32.2010 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 20a064f8-8fe1-46ec-75c0-08dcec26f9d5 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.117.161]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BL02EPF00021F69.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN7PR12MB6814 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Signed-off-by: Viacheslav Ovsiienko --- v1: https://inbox.dpdk.org/dev/20241009114028.973284-1-viacheslavo@nvidia.com/ v2: move part of code between 2nd and 3rd patches to fix single patch compilation issue. Tim Martin (2): net/mlx5: fix real time counter reading from PCI BAR net/mlx5: fix Tx tracing to use single clock source Viacheslav Ovsiienko (2): net/mlx5/tools: fix trace dump multiple burst completions net/mlx5: update dump script to show incomplete records .mailmap | 1 + doc/guides/nics/mlx5.rst | 6 ++ drivers/net/mlx5/mlx5.c | 4 ++ drivers/net/mlx5/mlx5_trace.h | 9 ++- drivers/net/mlx5/mlx5_tx.h | 53 ++++++++++++++-- drivers/net/mlx5/mlx5_txpp.c | 11 +--- drivers/net/mlx5/tools/mlx5_trace.py | 90 ++++++++++++++++++++-------- 7 files changed, 133 insertions(+), 41 deletions(-) -- 2.34.1