From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id EFC2845B3C; Tue, 15 Oct 2024 05:12:08 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id E37C14067A; Tue, 15 Oct 2024 05:12:08 +0200 (CEST) Received: from rtits2.realtek.com.tw (rtits2.realtek.com [211.75.126.72]) by mails.dpdk.org (Postfix) with ESMTP id 1033A4067A for ; Tue, 15 Oct 2024 05:12:06 +0200 (CEST) X-SpamFilter-By: ArmorX SpamTrap 5.78 with qID 49F3C4VS0820958, This message is accepted by code: ctloc85258 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=realsil.com.cn; s=dkim; t=1728961925; bh=3uwx8Od6N7lDzYbEHBYgghRfVoGnT3tvpjuSGiJbbMY=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Transfer-Encoding:Content-Type; b=hlsEEQaIKN0RD4zmofAk2DcqLQ3JKJl6un0/vBvZ2rxpoGth43PuFiTarh3rihm3/ uZUtgyoTuEL6QYOekWWNYciKx4wScSFQ35gQc7hxxbqbuDQB97CAKCUxmO4auYzwPY wEpMzFV+1FZCZxoiMpua/pzLBt0lpniRx9r1VvtWcUFeCGI8aQ8aQI+n5Vb8Ij3v3Q 98/KUmlNVTHi2fyxfEIav7+TJ+VrANA1Zke3n+E4HdLB+b1v1b2gQHm5NqbMJv9mxF eQ/ZXR7Tg69xgVCEka/CmioZ38ssezhe71r+/EH5U8i4adaFd/hdr/0Akorx+cncY4 9aGqbj5OJ64RA== Received: from RSEXMBS03.realsil.com.cn ([172.29.17.197]) by rtits2.realtek.com.tw (8.15.2/3.06/5.92) with ESMTPS id 49F3C4VS0820958 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128 verify=FAIL) for ; Tue, 15 Oct 2024 11:12:04 +0800 Received: from RSEXDAG02.realsil.com.cn (172.29.17.196) by RSEXMBS03.realsil.com.cn (172.29.17.197) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Tue, 15 Oct 2024 11:12:04 +0800 Received: from RSEXH36502.realsil.com.cn (172.29.17.3) by RSEXDAG02.realsil.com.cn (172.29.17.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Tue, 15 Oct 2024 11:12:04 +0800 Received: from 172.29.32.27 (172.29.32.27) by RSEXH36502.realsil.com.cn (172.29.17.3) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Tue, 15 Oct 2024 11:12:04 +0800 From: Howard Wang To: CC: , Howard Wang Subject: [PATCH v1 17/18] net/r8169: add driver_start and driver_stop Date: Tue, 15 Oct 2024 11:09:27 +0800 Message-ID: <20241015030928.70642-18-howard_wang@realsil.com.cn> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241015030928.70642-1-howard_wang@realsil.com.cn> References: <20241015030928.70642-1-howard_wang@realsil.com.cn> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org rtl8125ap and rtl8125bp need driver start and stop whether dash is enabled or not. Signed-off-by: Howard Wang --- drivers/net/r8169/base/rtl8126a_mcu.h | 1 + drivers/net/r8169/r8169_base.h | 6 +- drivers/net/r8169/r8169_dash.c | 149 +++++++++++++++++++++++++- drivers/net/r8169/r8169_dash.h | 25 ++++- drivers/net/r8169/r8169_ethdev.c | 4 + drivers/net/r8169/r8169_hw.c | 5 + 6 files changed, 184 insertions(+), 6 deletions(-) diff --git a/drivers/net/r8169/base/rtl8126a_mcu.h b/drivers/net/r8169/base/rtl8126a_mcu.h index ae4aa5f3d4..89e600d87c 100644 --- a/drivers/net/r8169/base/rtl8126a_mcu.h +++ b/drivers/net/r8169/base/rtl8126a_mcu.h @@ -12,5 +12,6 @@ void rtl_set_mac_mcu_8126a_3(struct rtl_hw *hw); void rtl_set_phy_mcu_8126a_1(struct rtl_hw *hw); void rtl_set_phy_mcu_8126a_2(struct rtl_hw *hw); void rtl_set_phy_mcu_8126a_3(struct rtl_hw *hw); + #endif diff --git a/drivers/net/r8169/r8169_base.h b/drivers/net/r8169/r8169_base.h index 98c965ac23..6e05ab3f3c 100644 --- a/drivers/net/r8169/r8169_base.h +++ b/drivers/net/r8169/r8169_base.h @@ -271,7 +271,11 @@ enum RTL_registers { Q_NUM_CTRL_8125 = 0x4800, RSS_KEY_8125 = 0x4600, RSS_INDIRECTION_TBL_8125_V2 = 0x4700, - EEE_TXIDLE_TIMER_8125 = 0x6048, + EEE_TXIDLE_TIMER_8125 = 0x6048, + IB2SOC_SET = 0x0010, + IB2SOC_DATA = 0x0014, + IB2SOC_CMD = 0x0018, + IB2SOC_IMR = 0x001C, }; enum RTL_register_content { diff --git a/drivers/net/r8169/r8169_dash.c b/drivers/net/r8169/r8169_dash.c index e803ce8305..0b2fd59de1 100644 --- a/drivers/net/r8169/r8169_dash.c +++ b/drivers/net/r8169/r8169_dash.c @@ -26,14 +26,14 @@ rtl_is_allow_access_dash_ocp(struct rtl_hw *hw) allow_access = true; switch (hw->mcfg) { - case CFG_METHOD_2: - case CFG_METHOD_3: + case CFG_METHOD_48: + case CFG_METHOD_49: mac_ocp_data = rtl_mac_ocp_read(hw, 0xd460); if (mac_ocp_data == 0xffff || !(mac_ocp_data & BIT_0)) allow_access = false; break; - case CFG_METHOD_8: - case CFG_METHOD_9: + case CFG_METHOD_54: + case CFG_METHOD_55: mac_ocp_data = rtl_mac_ocp_read(hw, 0xd4c0); if (mac_ocp_data == 0xffff || (mac_ocp_data & BIT_3)) allow_access = false; @@ -87,3 +87,144 @@ rtl_check_dash(struct rtl_hw *hw) return 0; } +static void +rtl8125_dash2_disable_tx(struct rtl_hw *hw) +{ + u16 wait_cnt = 0; + u8 tmp_uchar; + + if (!HW_DASH_SUPPORT_CMAC(hw)) + return; + + if (!hw->DASH) + return; + + /* Disable oob Tx */ + RTL_CMAC_W8(hw, CMAC_IBCR2, RTL_CMAC_R8(hw, CMAC_IBCR2) & ~BIT_0); + + /* Wait oob Tx disable */ + do { + tmp_uchar = RTL_CMAC_R8(hw, CMAC_IBISR0); + if (tmp_uchar & ISRIMR_DASH_TYPE2_TX_DISABLE_IDLE) + break; + + udelay(50); + wait_cnt++; + } while (wait_cnt < 2000); + + /* Clear ISRIMR_DASH_TYPE2_TX_DISABLE_IDLE */ + RTL_CMAC_W8(hw, CMAC_IBISR0, RTL_CMAC_R8(hw, CMAC_IBISR0) | + ISRIMR_DASH_TYPE2_TX_DISABLE_IDLE); +} + +static void +rtl8125_dash2_disable_rx(struct rtl_hw *hw) +{ + if (!HW_DASH_SUPPORT_CMAC(hw)) + return; + + if (!hw->DASH) + return; + + RTL_CMAC_W8(hw, CMAC_IBCR0, RTL_CMAC_R8(hw, CMAC_IBCR0) & ~BIT_0); +} + +void +rtl8125_dash2_disable_txrx(struct rtl_hw *hw) +{ + if (!HW_DASH_SUPPORT_CMAC(hw)) + return; + + rtl8125_dash2_disable_tx(hw); + rtl8125_dash2_disable_rx(hw); +} + +static void +rtl8125_notify_dash_oob_cmac(struct rtl_hw *hw, u32 cmd) +{ + u32 tmp_value; + + if (!HW_DASH_SUPPORT_CMAC(hw)) + return; + + rtl_ocp_write(hw, 0x180, 4, cmd); + tmp_value = rtl_ocp_read(hw, 0x30, 4); + tmp_value |= BIT_0; + rtl_ocp_write(hw, 0x30, 4, tmp_value); +} + +static void +rtl8125_notify_dash_oob_ipc2(struct rtl_hw *hw, u32 cmd) +{ + if (FALSE == HW_DASH_SUPPORT_TYPE_4(hw)) + return; + + rtl_ocp_write(hw, IB2SOC_DATA, 4, cmd); + rtl_ocp_write(hw, IB2SOC_CMD, 4, 0x00); + rtl_ocp_write(hw, IB2SOC_SET, 4, 0x01); +} + +static void +rtl8125_notify_dash_oob(struct rtl_hw *hw, u32 cmd) +{ + switch (hw->HwSuppDashVer) { + case 2: + case 3: + rtl8125_notify_dash_oob_cmac(hw, cmd); + break; + case 4: + rtl8125_notify_dash_oob_ipc2(hw, cmd); + break; + default: + break; + } +} + +static int +rtl8125_wait_dash_fw_ready(struct rtl_hw *hw) +{ + int rc = -1; + int timeout; + + if (!hw->DASH) + goto out; + + for (timeout = 0; timeout < 10; timeout++) { + mdelay(10); + if (rtl_ocp_read(hw, 0x124, 1) & BIT_0) { + rc = 1; + goto out; + } + } + + rc = 0; + +out: + return rc; +} + +void +rtl8125_driver_start(struct rtl_hw *hw) +{ + if (!hw->AllowAccessDashOcp) + return; + + rtl8125_notify_dash_oob(hw, OOB_CMD_DRIVER_START); + + rtl8125_wait_dash_fw_ready(hw); +} + +void +rtl8125_driver_stop(struct rtl_hw *hw) +{ + if (!hw->AllowAccessDashOcp) + return; + + if (HW_DASH_SUPPORT_CMAC(hw)) + rtl8125_dash2_disable_txrx(hw); + + rtl8125_notify_dash_oob(hw, OOB_CMD_DRIVER_STOP); + + rtl8125_wait_dash_fw_ready(hw); +} + diff --git a/drivers/net/r8169/r8169_dash.h b/drivers/net/r8169/r8169_dash.h index d89b2e2d3b..6dbc6b6539 100644 --- a/drivers/net/r8169/r8169_dash.h +++ b/drivers/net/r8169/r8169_dash.h @@ -19,17 +19,40 @@ #define HW_DASH_SUPPORT_TYPE_2(_M) ((_M)->HwSuppDashVer == 2) #define HW_DASH_SUPPORT_TYPE_3(_M) ((_M)->HwSuppDashVer == 3) #define HW_DASH_SUPPORT_TYPE_4(_M) ((_M)->HwSuppDashVer == 4) - +#define HW_DASH_SUPPORT_CMAC(_M) (HW_DASH_SUPPORT_TYPE_2(_M) || HW_DASH_SUPPORT_TYPE_3(_M)) #define HW_DASH_SUPPORT_GET_FIRMWARE_VERSION(_M) (HW_DASH_SUPPORT_TYPE_2(_M) || \ HW_DASH_SUPPORT_TYPE_3(_M) || \ HW_DASH_SUPPORT_TYPE_4(_M)) +#define OOB_CMD_DRIVER_START 0x05 +#define OOB_CMD_DRIVER_STOP 0x06 + #define OCP_REG_FIRMWARE_MAJOR_VERSION 0x120 +#define ISRIMR_DASH_TYPE2_TX_DISABLE_IDLE BIT_5 + +/* CMAC write/read MMIO register */ +#define RTL_CMAC_REG_ADDR(hw, reg) ((u8 *)(hw)->cmac_ioaddr + (reg)) +#define RTL_CMAC_R32(hw, reg) rtl_read32(RTL_CMAC_REG_ADDR(hw, reg)) +#define RTL_CMAC_R16(hw, reg) rtl_read16(RTL_CMAC_REG_ADDR(hw, reg)) +#define RTL_CMAC_R8(hw, reg) rte_read8(RTL_CMAC_REG_ADDR(hw, reg)) + +#define RTL_CMAC_W32(hw, reg, val) \ + rte_write32((rte_cpu_to_le_32(val)), RTL_CMAC_REG_ADDR(hw, reg)) + +#define RTL_CMAC_W16(hw, reg, val) \ + rte_write16((rte_cpu_to_le_16(val)), RTL_CMAC_REG_ADDR(hw, reg)) + +#define RTL_CMAC_W8(hw, reg, val) \ + rte_write8((val), RTL_CMAC_REG_ADDR(hw, reg)) + bool rtl_is_allow_access_dash_ocp(struct rtl_hw *hw); int rtl_check_dash(struct rtl_hw *hw); +void rtl8125_driver_start(struct rtl_hw *hw); +void rtl8125_driver_stop(struct rtl_hw *hw); +void rtl8125_dash2_disable_txrx(struct rtl_hw *hw); #endif diff --git a/drivers/net/r8169/r8169_ethdev.c b/drivers/net/r8169/r8169_ethdev.c index dd2c7dda24..3130f831dd 100644 --- a/drivers/net/r8169/r8169_ethdev.c +++ b/drivers/net/r8169/r8169_ethdev.c @@ -29,6 +29,7 @@ #include "r8169_base.h" #include "r8169_logs.h" #include "r8169_hw.h" +#include "r8169_dash.h" static int rtl_dev_configure(struct rte_eth_dev *dev __rte_unused); static int rtl_dev_start(struct rte_eth_dev *dev); @@ -596,6 +597,9 @@ rtl_dev_close(struct rte_eth_dev *dev) if (rte_eal_process_type() != RTE_PROC_PRIMARY) return 0; + if (HW_DASH_SUPPORT_DASH(hw)) + rtl8125_driver_stop(hw); + ret_stp = rtl_dev_stop(dev); rtl_free_queues(dev); diff --git a/drivers/net/r8169/r8169_hw.c b/drivers/net/r8169/r8169_hw.c index 27b67c1ed6..ed316687a9 100644 --- a/drivers/net/r8169/r8169_hw.c +++ b/drivers/net/r8169/r8169_hw.c @@ -1288,6 +1288,11 @@ rtl_exit_oob(struct rtl_hw *hw) rtl_disable_rx_packet_filter(hw); + if (HW_DASH_SUPPORT_DASH(hw)) { + rtl8125_driver_start(hw); + rtl8125_dash2_disable_txrx(hw); + } + rtl_exit_realwow(hw); rtl_nic_reset(hw); -- 2.34.1