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CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:dc6edge1.nvidia.com; CAT:NONE; SFS:(13230040)(376014)(36860700013)(1800799024)(82310400026); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 17 Oct 2024 07:58:21.5160 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 43994a0b-6a59-4bea-80d7-08dcee817851 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.117.160]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: SA2PEPF000015CD.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH7PR12MB6612 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org This patch adds support for destroying: - unicast DMAC control flow rules and - unicast DMAC with VLAN control flow rules, without affecting any other control flow rules, when HWS flow engine is used. Signed-off-by: Dariusz Sosnowski --- drivers/net/mlx5/mlx5_flow.h | 8 +++ drivers/net/mlx5/mlx5_flow_hw.c | 72 +++++++++++++++++++++++++++ drivers/net/mlx5/mlx5_flow_hw_stubs.c | 27 ++++++++++ 3 files changed, 107 insertions(+) diff --git a/drivers/net/mlx5/mlx5_flow.h b/drivers/net/mlx5/mlx5_flow.h index 2ff0b25d4d..165d17e40a 100644 --- a/drivers/net/mlx5/mlx5_flow.h +++ b/drivers/net/mlx5/mlx5_flow.h @@ -2994,11 +2994,19 @@ int mlx5_flow_hw_ctrl_flows(struct rte_eth_dev *dev, uint32_t flags); /** Create a control flow rule for matching unicast DMAC (HWS). */ int mlx5_flow_hw_ctrl_flow_dmac(struct rte_eth_dev *dev, const struct rte_ether_addr *addr); +/** Destroy a control flow rule for matching unicast DMAC (HWS). */ +int mlx5_flow_hw_ctrl_flow_dmac_destroy(struct rte_eth_dev *dev, const struct rte_ether_addr *addr); + /** Create a control flow rule for matching unicast DMAC with VLAN (HWS). */ int mlx5_flow_hw_ctrl_flow_dmac_vlan(struct rte_eth_dev *dev, const struct rte_ether_addr *addr, const uint16_t vlan); +/** Destroy a control flow rule for matching unicast DMAC with VLAN (HWS). */ +int mlx5_flow_hw_ctrl_flow_dmac_vlan_destroy(struct rte_eth_dev *dev, + const struct rte_ether_addr *addr, + const uint16_t vlan); + void mlx5_flow_hw_cleanup_ctrl_rx_templates(struct rte_eth_dev *dev); int mlx5_flow_group_to_table(struct rte_eth_dev *dev, diff --git a/drivers/net/mlx5/mlx5_flow_hw.c b/drivers/net/mlx5/mlx5_flow_hw.c index afc9778b97..35e9eead7e 100644 --- a/drivers/net/mlx5/mlx5_flow_hw.c +++ b/drivers/net/mlx5/mlx5_flow_hw.c @@ -16211,6 +16211,41 @@ mlx5_flow_hw_ctrl_flow_dmac(struct rte_eth_dev *dev, addr, 0); } +int +mlx5_flow_hw_ctrl_flow_dmac_destroy(struct rte_eth_dev *dev, + const struct rte_ether_addr *addr) +{ + struct mlx5_priv *priv = dev->data->dev_private; + struct mlx5_hw_ctrl_flow *entry; + struct mlx5_hw_ctrl_flow *tmp; + int ret; + + /* + * HWS does not have automatic RSS flow expansion, + * so each variant of the control flow rule is a separate entry in the list. + * In that case, the whole list must be traversed. + */ + entry = LIST_FIRST(&priv->hw_ctrl_flows); + while (entry != NULL) { + tmp = LIST_NEXT(entry, next); + + if (entry->info.type != MLX5_HW_CTRL_FLOW_TYPE_DEFAULT_RX_RSS_UNICAST_DMAC || + !rte_is_same_ether_addr(addr, &entry->info.uc.dmac)) { + entry = tmp; + continue; + } + + ret = flow_hw_destroy_ctrl_flow(dev, entry->flow); + LIST_REMOVE(entry, next); + mlx5_free(entry); + if (ret) + return ret; + + entry = tmp; + } + return 0; +} + int mlx5_flow_hw_ctrl_flow_dmac_vlan(struct rte_eth_dev *dev, const struct rte_ether_addr *addr, @@ -16220,6 +16255,43 @@ mlx5_flow_hw_ctrl_flow_dmac_vlan(struct rte_eth_dev *dev, addr, vlan); } +int +mlx5_flow_hw_ctrl_flow_dmac_vlan_destroy(struct rte_eth_dev *dev, + const struct rte_ether_addr *addr, + const uint16_t vlan) +{ + struct mlx5_priv *priv = dev->data->dev_private; + struct mlx5_hw_ctrl_flow *entry; + struct mlx5_hw_ctrl_flow *tmp; + int ret; + + /* + * HWS does not have automatic RSS flow expansion, + * so each variant of the control flow rule is a separate entry in the list. + * In that case, the whole list must be traversed. + */ + entry = LIST_FIRST(&priv->hw_ctrl_flows); + while (entry != NULL) { + tmp = LIST_NEXT(entry, next); + + if (entry->info.type != MLX5_HW_CTRL_FLOW_TYPE_DEFAULT_RX_RSS_UNICAST_DMAC_VLAN || + !rte_is_same_ether_addr(addr, &entry->info.uc.dmac) || + vlan != entry->info.uc.vlan) { + entry = tmp; + continue; + } + + ret = flow_hw_destroy_ctrl_flow(dev, entry->flow); + LIST_REMOVE(entry, next); + mlx5_free(entry); + if (ret) + return ret; + + entry = tmp; + } + return 0; +} + static __rte_always_inline uint32_t mlx5_reformat_domain_to_tbl_type(const struct rte_flow_indir_action_conf *domain) { diff --git a/drivers/net/mlx5/mlx5_flow_hw_stubs.c b/drivers/net/mlx5/mlx5_flow_hw_stubs.c index 985c046056..0e79e6c1f2 100644 --- a/drivers/net/mlx5/mlx5_flow_hw_stubs.c +++ b/drivers/net/mlx5/mlx5_flow_hw_stubs.c @@ -26,6 +26,19 @@ mlx5_flow_hw_ctrl_flow_dmac(struct rte_eth_dev *dev __rte_unused, return -rte_errno; } +/* + * This is a stub for the real implementation of this function in mlx5_flow_hw.c in case: + * - PMD is compiled on Windows or + * - available rdma-core does not support HWS. + */ +__rte_weak int +mlx5_flow_hw_ctrl_flow_dmac_destroy(struct rte_eth_dev *dev __rte_unused, + const struct rte_ether_addr *addr __rte_unused) +{ + rte_errno = ENOTSUP; + return -rte_errno; +} + /* * This is a stub for the real implementation of this function in mlx5_flow_hw.c in case: * - PMD is compiled on Windows or @@ -39,3 +52,17 @@ mlx5_flow_hw_ctrl_flow_dmac_vlan(struct rte_eth_dev *dev __rte_unused, rte_errno = ENOTSUP; return -rte_errno; } + +/* + * This is a stub for the real implementation of this function in mlx5_flow_hw.c in case: + * - PMD is compiled on Windows or + * - available rdma-core does not support HWS. + */ +__rte_weak int +mlx5_flow_hw_ctrl_flow_dmac_vlan_destroy(struct rte_eth_dev *dev __rte_unused, + const struct rte_ether_addr *addr __rte_unused, + const uint16_t vlan __rte_unused) +{ + rte_errno = ENOTSUP; + return -rte_errno; +} -- 2.39.5