From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 883FF45B67; Fri, 18 Oct 2024 05:35:15 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id DD5ED402ED; Fri, 18 Oct 2024 05:35:14 +0200 (CEST) Received: from NAM11-CO1-obe.outbound.protection.outlook.com (mail-co1nam11on2057.outbound.protection.outlook.com [40.107.220.57]) by mails.dpdk.org (Postfix) with ESMTP id 0EA0E40265 for ; Fri, 18 Oct 2024 05:35:13 +0200 (CEST) ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=hQm9cb3LGIp+qA4mzW6PKiGb2fpVD/pxzS2F5N/346jqjuyLAO6m+OV9LeTNxR4SfgnZ8tiC8hiNBrQswX3NF/3EhSeels0N0wKog1Qra6zhnxGsYl7fe6SNzBhCOAHEKnS5ZQrqP+tpjBdF6yHvLEb2/rFRF1JgXRIXR+f0wxJZf+RE1Y02K/e76czkfXNM0KQ+1DUdT6gDrsB0XDkktO6gQ3FkTfUsE5LhdAYWXLWCytaGGRdARJOxra4YXbM6ONbwIbKtvNtUMqMhpT77FGtN98+bXJipP5wmQGZB2qtaPuSpWlHcP0YXyPWi5m2kaGzQD7nnYhrJ2rO215iU0Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=bJ2XbS2A7JXgFU4h/Foj3WDTOlXpv/cnvPAsJlZ2FPc=; b=FP40HSx6qurFdX5K7weMUWlHa5ZUXOZh14ZD146nGq5Ux6Z1aQRv44kxv++cXqrkewuxciPLLYuryZJjA5642tCQfgL/3yNHjtYPMF5jICqu4rORrVpw7jmjOvy1rG8c7VRdhbbdH5WjP1U9ej7NNwe+c7k9usveydlMA/udgnL9MhwyWo61XacY/8UGtDuwygODVzVXX4Sns0VzJoaXfa9LUZNJwHw50hbaHAjuVzgSmzHjKlRrai8PQHdeuOx24aTTpVzKRBdY8YUJnNyL8HVcLaKDmIDcNHDPwogHPnta+z8ztq5VZnBT18RbR+Rp1RW4s4w0QiqaxOHRWdhdqw== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 165.204.84.17) smtp.rcpttodomain=intel.com smtp.mailfrom=amd.com; dmarc=pass (p=quarantine sp=quarantine pct=100) action=none header.from=amd.com; dkim=none (message not signed); arc=none (0) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amd.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=bJ2XbS2A7JXgFU4h/Foj3WDTOlXpv/cnvPAsJlZ2FPc=; b=JIFOFm4/gOxCxdELxFWe1Yw6V1299U/IQC3hWRDNYvL+rnNsOrFGqS16KTWMUuo2/WmSaCVmuHu/Pb33zTjtnVJ5+V1iJT4Sv7iAZRWHgKkHUZYy2uqQWmuJbK9+W6RP9SeNjcONcVtpuWOTkQCvvBtXlaitK8s70oxsGkjKIpA= Received: from CY5PR15CA0086.namprd15.prod.outlook.com (2603:10b6:930:18::19) by CY5PR12MB6573.namprd12.prod.outlook.com (2603:10b6:930:43::21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8069.18; Fri, 18 Oct 2024 03:35:05 +0000 Received: from CY4PEPF0000EE38.namprd03.prod.outlook.com (2603:10b6:930:18:cafe::3a) by CY5PR15CA0086.outlook.office365.com (2603:10b6:930:18::19) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8069.20 via Frontend Transport; Fri, 18 Oct 2024 03:35:01 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by CY4PEPF0000EE38.mail.protection.outlook.com (10.167.242.10) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.8069.17 via Frontend Transport; Fri, 18 Oct 2024 03:35:01 +0000 Received: from jfw9ny3-os.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.39; Thu, 17 Oct 2024 22:34:50 -0500 From: Sivaprasad Tummala To: , , , , , , , CC: , Huisong Li Subject: [PATCH v2 1/2] power: fix power library with --lcores Date: Fri, 18 Oct 2024 03:34:34 +0000 Message-ID: <20241018033435.1305782-1-sivaprasad.tummala@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241017110247.1051770-1-sivaprasad.tummala@amd.com> References: <20241017110247.1051770-1-sivaprasad.tummala@amd.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CY4PEPF0000EE38:EE_|CY5PR12MB6573:EE_ X-MS-Office365-Filtering-Correlation-Id: d5a11795-898f-4976-3a72-08dcef25d92d X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; ARA:13230040|82310400026|376014|36860700013|1800799024; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?I6DYTAZ3+VM53jL2KbVYxIO7SUWrsoPmDd7u1CtA/WKrpyiMzWifIFGOUjym?= =?us-ascii?Q?d93uyoje0uVZZo+bIM71oN9wDLssmAwn0egKaCf5GHbKlDtZL3xru/+eb5DR?= =?us-ascii?Q?SvOQdDijL43UvJcrZ1bvAj5+LzonoCopBVFy4wsNmz6KNPyawna3iKGdeBwx?= =?us-ascii?Q?I6HtJYih3CfBrKCltT/bjnBOcN6SEwLrpJfVrXlYhXyIRXSuVepsouxwg0gp?= =?us-ascii?Q?rAW5BDG7NUVXZgATZ4pZlgE5F6s8vVFUWrnPvE9djdgWWSY2ZQY576CYl1cE?= =?us-ascii?Q?ugemg+ez3GozRQpNg86e728irgk6ShlGNYX7m+WfA9PWi3mv0emIPb3DeD59?= =?us-ascii?Q?L2L9UF2zAkH0VSDHCtf2kBoQYGgRQk4U967zjLLGuLi+WSAJhscsVwipjGr3?= =?us-ascii?Q?yf6uNh/r9zQKm3jtF5OKTNzFvEvm7DzAAlchwYepD+Ijocm1P0x4afiXZTxc?= =?us-ascii?Q?X+GQTM9DrGfVcWaDbh7fMe3PZtgdQbrlZstISG0qeGDb1aKLx+lTOlLjTeoB?= =?us-ascii?Q?oWAxDLfbn8ifIzpK568sjPGIw42eOmASbhuV4RWrdeWepxfwkLy8oNP2GdJU?= =?us-ascii?Q?ezmq3+sMKYfaz19DF87i49XmrSExUInDHXkyOrJEdB2yeQGyD56xDTcbqOah?= =?us-ascii?Q?ptpdJSKNQXybRg0fNtyU5s117xYzbK+V8CO6RtK9Utk/pc4hLdJ5jAokGixI?= =?us-ascii?Q?vVIaOa5BWugijWQKoKkUWEoH8HyZK7qR4ygrOLnESx/Ga8M6f6u52NLijbBa?= =?us-ascii?Q?9jQgkT6zABT1c/uSCFamrVPLAYC7XJEFkWXxdsee8fd0Na6a9Ey00W1Ux9m9?= =?us-ascii?Q?2DgAyJPLd3fHfY/XJ5GDSQy+Hj+pSdhXo12yZYjGwoGxxN5XVP6NKYIVJPrt?= =?us-ascii?Q?AmB42VrlTPOGVhsZRD4HgYYFzuQ7+VJKxbCSC63vgueXD5oVA9Tx9PUM2Ltc?= =?us-ascii?Q?229UXzooCOu6Ux/GAaqYn77HvsaKyqPKYCupiQqJE7f7rUf1n2VDsV56UyyS?= =?us-ascii?Q?OwftTNrmItDfkBJaQmU2E15/aTR+omh/TLDLsk5fxC4PYTSyViQhIa0UYjYe?= =?us-ascii?Q?btKne2WgAldN3JuExQTBoF2RshlXvEpmBZEfePMARxOAEn+CEgtoZ2mLAX4P?= =?us-ascii?Q?Z/Oi2f3Z3asQ1c0WChMrMIAji/uPQTnzrXJSshRm7Ds+mtBbqwp59Uac9HGE?= =?us-ascii?Q?WveIsToLFntYVGR+5aS9cjw7IUKeSyxcai3UpcaiW29L+R5vjbMo8bM4JhcX?= =?us-ascii?Q?1lbvWmqyg5vTSJPUAdYJ6EP9Ox4a87MZC3cwK6u2NZaOtyLwMXLrFcsAQQWe?= =?us-ascii?Q?rCmQwbIJl5jdbA+9bzWUe7xSOAxmrieprpeo793GprO9U6NPejl5MzJPEB4a?= =?us-ascii?Q?X2s1u2uOMRaeloFHvfXd8brK9Z64l8EWXCpIFk/I0dnONI5SMw=3D=3D?= X-Forefront-Antispam-Report: CIP:165.204.84.17; CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB04.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230040)(82310400026)(376014)(36860700013)(1800799024); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 18 Oct 2024 03:35:01.4341 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: d5a11795-898f-4976-3a72-08dcef25d92d X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000EE38.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY5PR12MB6573 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org This commit fixes an issue in the power library related to using lcores mapped to different physical cores (--lcores option in EAL). Previously, the power library incorrectly accessed CPU sysfs attributes for power management, treating lcore IDs as CPU IDs. e.g. with --lcores '1@128', lcore_id '1' was interpreted as CPU_id instead of '128'. This patch corrects the cpu_id based on lcore and CPU mappings. It also constraints power management support for lcores mapped to multiple physical cores/threads. When multiple lcores are mapped to the same physical core, invoking frequency scaling APIs on any lcore will apply the changes effectively. v2: - renamed check_lcore_and_set_cpu to power_get_lcore_mapped_cpu_id Signed-off-by: Sivaprasad Tummala Acked-by: Konstantin Ananyev Acked-by: Huisong Li --- lib/power/power_acpi_cpufreq.c | 7 ++++++- lib/power/power_amd_pstate_cpufreq.c | 7 ++++++- lib/power/power_common.c | 23 +++++++++++++++++++++++ lib/power/power_common.h | 2 +- lib/power/power_cppc_cpufreq.c | 7 ++++++- lib/power/power_pstate_cpufreq.c | 7 ++++++- 6 files changed, 48 insertions(+), 5 deletions(-) diff --git a/lib/power/power_acpi_cpufreq.c b/lib/power/power_acpi_cpufreq.c index abad53bef1..899d594600 100644 --- a/lib/power/power_acpi_cpufreq.c +++ b/lib/power/power_acpi_cpufreq.c @@ -264,7 +264,12 @@ power_acpi_cpufreq_init(unsigned int lcore_id) return -1; } - pi->lcore_id = lcore_id; + if (power_get_lcore_mapped_cpu_id(lcore_id, &pi->lcore_id) < 0) { + POWER_LOG(ERR, + "Cannot get cpu id mapped for lcore %u", lcore_id); + return -1; + } + /* Check and set the governor */ if (power_set_governor_userspace(pi) < 0) { POWER_LOG(ERR, "Cannot set governor of lcore %u to " diff --git a/lib/power/power_amd_pstate_cpufreq.c b/lib/power/power_amd_pstate_cpufreq.c index 4809d45a22..ada6c14d54 100644 --- a/lib/power/power_amd_pstate_cpufreq.c +++ b/lib/power/power_amd_pstate_cpufreq.c @@ -382,7 +382,12 @@ power_amd_pstate_cpufreq_init(unsigned int lcore_id) return -1; } - pi->lcore_id = lcore_id; + if (power_get_lcore_mapped_cpu_id(lcore_id, &pi->lcore_id) < 0) { + POWER_LOG(ERR, + "Cannot get cpu id mapped for lcore %u", lcore_id); + return -1; + } + /* Check and set the governor */ if (power_set_governor_userspace(pi) < 0) { POWER_LOG(ERR, "Cannot set governor of lcore %u to " diff --git a/lib/power/power_common.c b/lib/power/power_common.c index 590986d5ef..96dc8d8c21 100644 --- a/lib/power/power_common.c +++ b/lib/power/power_common.c @@ -9,6 +9,7 @@ #include #include +#include #include "power_common.h" @@ -204,3 +205,25 @@ power_set_governor(unsigned int lcore_id, const char *new_governor, return ret; } + +int power_get_lcore_mapped_cpu_id(uint32_t lcore_id, uint32_t *cpu_id) +{ + rte_cpuset_t lcore_cpus; + uint32_t cpu; + + lcore_cpus = rte_lcore_cpuset(lcore_id); + if (CPU_COUNT(&lcore_cpus) != 1) { + POWER_LOG(ERR, + "Power library does not support lcore %u mapping to %u cpus", + lcore_id, CPU_COUNT(&lcore_cpus)); + return -1; + } + + for (cpu = 0; cpu < CPU_SETSIZE; cpu++) { + if (CPU_ISSET(cpu, &lcore_cpus)) + break; + } + *cpu_id = cpu; + + return 0; +} diff --git a/lib/power/power_common.h b/lib/power/power_common.h index 83f742f42a..92d53c6fe9 100644 --- a/lib/power/power_common.h +++ b/lib/power/power_common.h @@ -31,5 +31,5 @@ int open_core_sysfs_file(FILE **f, const char *mode, const char *format, ...) int read_core_sysfs_u32(FILE *f, uint32_t *val); int read_core_sysfs_s(FILE *f, char *buf, unsigned int len); int write_core_sysfs_s(FILE *f, const char *str); - +int power_get_lcore_mapped_cpu_id(uint32_t lcore_id, uint32_t *cpu_id); #endif /* _POWER_COMMON_H_ */ diff --git a/lib/power/power_cppc_cpufreq.c b/lib/power/power_cppc_cpufreq.c index e73f4520d0..9910ae85b8 100644 --- a/lib/power/power_cppc_cpufreq.c +++ b/lib/power/power_cppc_cpufreq.c @@ -368,7 +368,12 @@ power_cppc_cpufreq_init(unsigned int lcore_id) return -1; } - pi->lcore_id = lcore_id; + if (power_get_lcore_mapped_cpu_id(lcore_id, &pi->lcore_id) < 0) { + POWER_LOG(ERR, + "Cannot get cpu id mapped for lcore %u", lcore_id); + return -1; + } + /* Check and set the governor */ if (power_set_governor_userspace(pi) < 0) { POWER_LOG(ERR, "Cannot set governor of lcore %u to " diff --git a/lib/power/power_pstate_cpufreq.c b/lib/power/power_pstate_cpufreq.c index 1c2a91a178..cbe14e74ce 100644 --- a/lib/power/power_pstate_cpufreq.c +++ b/lib/power/power_pstate_cpufreq.c @@ -570,7 +570,12 @@ power_pstate_cpufreq_init(unsigned int lcore_id) return -1; } - pi->lcore_id = lcore_id; + if (power_get_lcore_mapped_cpu_id(lcore_id, &pi->lcore_id) < 0) { + POWER_LOG(ERR, + "Cannot get cpu id mapped for lcore %u", lcore_id); + return -1; + } + /* Check and set the governor */ if (power_set_governor_performance(pi) < 0) { POWER_LOG(ERR, "Cannot set governor of lcore %u to " -- 2.34.1