From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id CE9ED45BA3; Tue, 22 Oct 2024 19:31:59 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 4811E406BB; Tue, 22 Oct 2024 19:31:26 +0200 (CEST) Received: from egress-ip42a.ess.de.barracuda.com (egress-ip42a.ess.de.barracuda.com [18.185.115.201]) by mails.dpdk.org (Postfix) with ESMTP id 163FD40A6D for ; Tue, 22 Oct 2024 19:31:23 +0200 (CEST) Received: from EUR05-DB8-obe.outbound.protection.outlook.com (mail-db8eur05lp2112.outbound.protection.outlook.com [104.47.17.112]) by mx-outbound15-54.eu-central-1a.ess.aws.cudaops.com (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NO); Tue, 22 Oct 2024 17:31:20 +0000 ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=mRxw9P/rXH5oLVvYdCmWNU0ekJIcGxKHzfCWy9k/rKfwDg/Q2p6PR+A372xq+MNVa+QwjjbmHGfterU3tOowtW/rrABDwSMMwEDCVedbKq3N40qbXx1yzHZ7xH19WHgq5h2OzGPTvBVuhPA4akxPiZ9gtcuEdA6QUtFbWMCzI40bS+OMpC4IIU1VcpyUD3wh72YOhpyOCC+GCp8j2zrKcR/hNHc9JYyserjYKbcfgE2F2GvMC+YWdq1nYSV0N0hoQKX/V5mc52o0hxnY+jY77kFLjrODQC+Ejs8svCga13MWFT7x+5MyrtlJw0aVhl9b9HlUYbGz6U+ZNKP0wkfQZA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=BbqmpmgTsCQ4dsWE8BYj8BtKFmQigh/m2WMT2USsgnU=; b=avDMVD0cIEH4RaDyJ9PljutmvqcNWhHitcOaWPqGzWWtwGobr3O+avcZuSYFFHxj8CyKra7B9IfE54vh1T4EmrzYU6cGqA2+7RsR4pOaTHJClKVuKN2R7kCSnZKnN/2V8ioEtvovoL7YLRww3f2Lys6qziGtSWDUWDBJHa5/Sdqpm+WFGEpgyKGimuXNFwQ/RvwWOv0Kwy8O0++kzShpSQy6SHHEQlRG+KVaWiCqf9KKfTBgiM70RrW9vVu7C9VNi5pUxw8A4/oH4dJk53+l+sRwWNVEAmoDSZMGTZQfCB0I3FkoUgvSS46RsOC9Sbu+WNnnFInxBas05eAuEPLuxA== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=fail (sender ip is 178.72.21.4) smtp.rcpttodomain=dpdk.org smtp.mailfrom=napatech.com; dmarc=fail (p=reject sp=reject pct=100) action=oreject header.from=napatech.com; dkim=none (message not signed); arc=none (0) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=napatech.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=BbqmpmgTsCQ4dsWE8BYj8BtKFmQigh/m2WMT2USsgnU=; b=m7Ejgi1u/MXi94RYhKcj7rhJorC5fKSp3O546Y0VU4EGG2xFAtKAw0O9xOEBofAO/c6Dk1pOLSBRC+P/TlwWgoBSM0Qnw+ZQfSqDVZ5TtbhvW362g4BUsJdz53RFzeJvFpDPN4MkKhH080VhySuJreNC6v8Ylqdywszrq6u8w4A= Received: from DB9PR06CA0030.eurprd06.prod.outlook.com (2603:10a6:10:1db::35) by VI0P190MB2233.EURP190.PROD.OUTLOOK.COM (2603:10a6:800:26b::5) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8093.16; Tue, 22 Oct 2024 16:57:04 +0000 Received: from DU2PEPF0001E9C2.eurprd03.prod.outlook.com (2603:10a6:10:1db:cafe::6d) by DB9PR06CA0030.outlook.office365.com (2603:10a6:10:1db::35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8069.29 via Frontend Transport; Tue, 22 Oct 2024 16:57:04 +0000 X-MS-Exchange-Authentication-Results: spf=fail (sender IP is 178.72.21.4) smtp.mailfrom=napatech.com; dkim=none (message not signed) header.d=none;dmarc=fail action=oreject header.from=napatech.com; Received-SPF: Fail (protection.outlook.com: domain of napatech.com does not designate 178.72.21.4 as permitted sender) receiver=protection.outlook.com; client-ip=178.72.21.4; helo=localhost.localdomain; Received: from localhost.localdomain (178.72.21.4) by DU2PEPF0001E9C2.mail.protection.outlook.com (10.167.8.71) with Microsoft SMTP Server id 15.20.8093.14 via Frontend Transport; Tue, 22 Oct 2024 16:57:03 +0000 From: Serhii Iliushyk To: dev@dpdk.org Cc: mko-plv@napatech.com, sil-plv@napatech.com, ckm@napatech.com, andrew.rybchenko@oktetlabs.ru, ferruh.yigit@amd.com, stephen@networkplumber.org, Danylo Vodopianov Subject: [PATCH v2 56/73] net/ntnic: add statistics poll Date: Tue, 22 Oct 2024 18:55:13 +0200 Message-ID: <20241022165541.3186140-57-sil-plv@napatech.com> X-Mailer: git-send-email 2.45.0 In-Reply-To: <20241022165541.3186140-1-sil-plv@napatech.com> References: <20241021210527.2075431-1-sil-plv@napatech.com> <20241022165541.3186140-1-sil-plv@napatech.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DU2PEPF0001E9C2:EE_|VI0P190MB2233:EE_ Content-Type: text/plain X-MS-Office365-Filtering-Correlation-Id: b4112350-8649-45be-583f-08dcf2ba8e2d X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; ARA:13230040|1800799024|82310400026|36860700013|376014; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?8Gy54tKz2uRShEQnWrrBGr2Ql6VWQeWRqpy/MvF7pVNU6qKvQlDxUD4hg79s?= =?us-ascii?Q?rFq91n0n91eEb2KQJOGDarkdPWqLSVJZ7iGF8Jh0lBDrPjTU4M0PeOve7PX3?= =?us-ascii?Q?EsMW7JJKFcJ/VAIiGLCyezUs/Ob5XG6uuYp4rSqHpUKaJEEr3k+6RMjgbosV?= =?us-ascii?Q?L5iYLMoEdeXP7mu0TdmjNTGPFQ6e4/xoGFIiz5D2UIU5PKpt4fMW4PtdBjPW?= =?us-ascii?Q?uXBRWIlF7Rr22JKIWkxIVjqwvRlQn0s/yNPlZYMbEXcrs2n1t/H8U18R4vAm?= =?us-ascii?Q?8LMNDV43lOWo2umxf+/GTZZ+Z3/teI13bnZBB7Uu6qVWAeOXbKEpMpKfQGW5?= =?us-ascii?Q?5LsKUElXC7lMTdQ4wMfPLDBaHLWtVnuL1rCtaN984PDDRjG5CHfGerMGl3Ew?= =?us-ascii?Q?K+46qnqRAzF76Umhgo4JOMv5+70BHMcqTAA+UjveCkx7F09nJkDAfWrcFLrZ?= =?us-ascii?Q?4JGQUqjDwH9eOCLlL6JY7lmq0FhEkc0ODEarjpB8O9FkYWWozE4Uzmfayg6v?= =?us-ascii?Q?hXIx4q4CVYBTpuwMSoku5QcfZxdNp0Mq7Qinu1zaih7W01zqYJXiifk4+Qwd?= =?us-ascii?Q?vJztu1nUJ+X1zxQua1YLzSgORlQIdPZZTdra6WXd4BmeLeA7JV+3RZVfGJvR?= =?us-ascii?Q?a3qBx+g9lsWECL11apGMtKeZbcnCY/CCyiOZkUIGCifV3VRhCysY6tjKzo/9?= =?us-ascii?Q?FNDOTO7cfck2tSp5oOinfpxYjDPfny2MCxWF0sOzfkf3dvQIE7q4TqyGph1R?= =?us-ascii?Q?+Wd5zEJkpcCP0EgMQhtvGxtWjA9Jfo2SmH5WY6NPFsMCpaMNTe9+P8oNxx1+?= =?us-ascii?Q?CBWriglOiLgbDGclES9dwKYdxP6xrF7k2SmCatppeepSWgQkMVhUbUqQI213?= =?us-ascii?Q?nVsUxy7I93NFBXf26x1DPIuhavAVdprdhO8Bkhh+s4A/AfO1Y2EmwfEeCm/Y?= =?us-ascii?Q?xQzJUVkN2hTc3QfZ0l3VXbTOv1/t8HadMxdzeVs/Kb61YonUBXE56zjN53gp?= =?us-ascii?Q?4jEnvTJMfKpI7eKlWrnHWEY7AHlhcBd0Xje6GUVPlerp9NxmRv44nDUDpCDF?= =?us-ascii?Q?BvVgVitDRWg18MqIuiGFaFUWaMYu/O/cP4HoA8pq/yz6GJUcC4YNoDTfxmXs?= =?us-ascii?Q?Mwp6E3n9grsevWWt56GsP308E7JuV1i+Z/BZbY+SLWs1sYHgqz9aLBW81fpR?= =?us-ascii?Q?BxM8w8TtsnZ3kf3DYJAlA27qADTxoISifDUbmQsUZg8uFf+CQuGqfxS1eeAO?= =?us-ascii?Q?vgpHr3AY4lx4s21IiYSo5iC67SczBOl1OSKd7p/H9UP61TUZuEzZRSIn3rzz?= =?us-ascii?Q?PHYshkHEG2nbVvpmU6hPMsqR4tu9nFw0O1nqcjQUlEZK9SoHDQATYRd5j4c3?= =?us-ascii?Q?sGy6pSMI27caWLa/cyRM3uRXs04xGcorw0FER80qByi1gZHwfw=3D=3D?= X-Forefront-Antispam-Report: CIP:178.72.21.4; CTRY:DK; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:localhost.localdomain; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230040)(1800799024)(82310400026)(36860700013)(376014); DIR:OUT; SFP:1102; X-MS-Exchange-AntiSpam-ExternalHop-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-ExternalHop-MessageData-0: qDVHVSJxVQWNtj0zZ/2Uqfd4P+0AvZikcvi9KmJ+RHvxEs8tFm+ostXVNcUk3hoapCB2WuvP4lPXdljrLqfKmSkbVZGU0ygY/RkM9Jup2YxJXs8RmSMWX/ogc4TdB6+x0ZmhE1hfkjJZTrJeScVi16PSE7nbc4sHgWgSYLA7M0o8EFnuJqJRNnaXy23m+rGnYpoYChrO1I7NKjc413WDcbaliWH5TC0v7z1ERYrH0wunO4+c/TDE5TT5oP3oqBOttpruHjIZ/dqFsu5fZrLEqTdNc+Mv/52OWGj5t0bU2EJk6jE3y8MnPhODxMvssuuaQSRA8Ida5Ofd8UXYKbAMGlBzMW/KzlwK0AnRr3AzwrS7v4dlfWUahh2sPvfwDhmX68QK4S3ffjaikpY7AKr1bSljh1pUw2eYbaQgKipb2aZQ9EUPk7dkJh+7cNp8YDvy04MO0HsKd/Sbu9veO7IzNfLhpcnWYuB9Mvj5rgFx/IxR4f2SvbhlNbsULIhiHKLFTYvkK4cRv9DjmbQze94NScGcqhylQoW1cTsoa6XakgH/DuFGy5kZ8gPFf3iUgAm/3Ej1KmhxmuDMRn6WlxeTne8wI2xSUsnKSkXhdi88Q1vQJSo8vsk1hT2l9md9dF0e+toJm6rRsGhEnp4nllQ2K19FK9QXJNKyqLc4nToY4fk= X-MS-Exchange-CrossTenant-OriginalArrivalTime: 22 Oct 2024 16:57:03.9818 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: b4112350-8649-45be-583f-08dcf2ba8e2d X-MS-Exchange-CrossTenant-Id: c4540d0b-728a-4233-9da5-9ea30c7ec3ed X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=c4540d0b-728a-4233-9da5-9ea30c7ec3ed; Ip=[178.72.21.4]; Helo=[localhost.localdomain] X-MS-Exchange-CrossTenant-AuthSource: DU2PEPF0001E9C2.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: VI0P190MB2233 X-OriginatorOrg: napatech.com X-BESS-ID: 1729618280-303894-12663-15024-1 X-BESS-VER: 2019.1_20241018.1852 X-BESS-Apparent-Source-IP: 104.47.17.112 X-BESS-Parts: H4sIAAAAAAACA4uuVkqtKFGyUioBkjpK+cVKVsbGZuYmQGYGUDTZ2CAtydTEzD A50STR3NDCMMXCxNAsyTzJ0DTZ3CDNUKk2FgBKNNtoQgAAAA== X-BESS-Outbound-Spam-Score: 0.50 X-BESS-Outbound-Spam-Report: Code version 3.2, rules version 3.2.2.259902 [from cloudscan23-115.eu-central-1b.ess.aws.cudaops.com] Rule breakdown below pts rule name description ---- ---------------------- -------------------------------- 0.50 BSF_RULE7568M META: Custom Rule 7568M 0.00 BSF_BESS_OUTBOUND META: BESS Outbound X-BESS-Outbound-Spam-Status: SCORE=0.50 using account:ESS113687 scores of KILL_LEVEL=7.0 tests=BSF_RULE7568M, BSF_BESS_OUTBOUND X-BESS-BRTS-Status: 1 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Danylo Vodopianov Mechanism which poll statistics module and update values with dma module. Signed-off-by: Danylo Vodopianov --- .../net/ntnic/adapter/nt4ga_stat/nt4ga_stat.c | 343 ++++++++++++++++++ drivers/net/ntnic/include/ntdrv_4ga.h | 1 + drivers/net/ntnic/include/ntnic_stat.h | 78 ++++ .../net/ntnic/nthw/core/include/nthw_rmc.h | 5 + drivers/net/ntnic/nthw/core/nthw_rmc.c | 20 + drivers/net/ntnic/nthw/flow_api/flow_api.c | 1 + drivers/net/ntnic/nthw/stat/nthw_stat.c | 128 +++++++ drivers/net/ntnic/ntnic_ethdev.c | 143 ++++++++ drivers/net/ntnic/ntnic_mod_reg.h | 2 + 9 files changed, 721 insertions(+) diff --git a/drivers/net/ntnic/adapter/nt4ga_stat/nt4ga_stat.c b/drivers/net/ntnic/adapter/nt4ga_stat/nt4ga_stat.c index f733fd5459..3afc5b7853 100644 --- a/drivers/net/ntnic/adapter/nt4ga_stat/nt4ga_stat.c +++ b/drivers/net/ntnic/adapter/nt4ga_stat/nt4ga_stat.c @@ -16,6 +16,27 @@ #define DEFAULT_MAX_BPS_SPEED 100e9 +/* Inline timestamp format s pcap 32:32 bits. Convert to nsecs */ +static inline uint64_t timestamp2ns(uint64_t ts) +{ + return ((ts) >> 32) * 1000000000 + ((ts) & 0xffffffff); +} + +static int nt4ga_stat_collect_cap_v1_stats(struct adapter_info_s *p_adapter_info, + nt4ga_stat_t *p_nt4ga_stat, + uint32_t *p_stat_dma_virtual); + +static int nt4ga_stat_collect(struct adapter_info_s *p_adapter_info, nt4ga_stat_t *p_nt4ga_stat) +{ + nthw_stat_t *p_nthw_stat = p_nt4ga_stat->mp_nthw_stat; + + p_nt4ga_stat->last_timestamp = timestamp2ns(*p_nthw_stat->mp_timestamp); + nt4ga_stat_collect_cap_v1_stats(p_adapter_info, p_nt4ga_stat, + p_nt4ga_stat->p_stat_dma_virtual); + + return 0; +} + static int nt4ga_stat_init(struct adapter_info_s *p_adapter_info) { const char *const p_adapter_id_str = p_adapter_info->mp_adapter_id_str; @@ -203,9 +224,331 @@ static int nt4ga_stat_setup(struct adapter_info_s *p_adapter_info) return 0; } +/* Called with stat mutex locked */ +static int nt4ga_stat_collect_cap_v1_stats(struct adapter_info_s *p_adapter_info, + nt4ga_stat_t *p_nt4ga_stat, + uint32_t *p_stat_dma_virtual) +{ + (void)p_adapter_info; + const struct flow_filter_ops *flow_filter_ops = get_flow_filter_ops(); + + if (flow_filter_ops == NULL) + return -1; + + nthw_stat_t *p_nthw_stat = p_nt4ga_stat->mp_nthw_stat; + + const int n_rx_ports = p_nt4ga_stat->mn_rx_ports; + const int n_tx_ports = p_nt4ga_stat->mn_tx_ports; + int c, h, p; + + if (!p_nthw_stat || !p_nt4ga_stat) + return -1; + + if (p_nthw_stat->mn_stat_layout_version < 6) { + NT_LOG(ERR, NTNIC, "HW STA module version not supported"); + return -1; + } + + /* RX ports */ + for (c = 0; c < p_nthw_stat->m_nb_color_counters / 2; c++) { + p_nt4ga_stat->mp_stat_structs_color[c].color_packets += p_stat_dma_virtual[c * 2]; + p_nt4ga_stat->mp_stat_structs_color[c].color_bytes += + p_stat_dma_virtual[c * 2 + 1]; + } + + /* Move to Host buffer counters */ + p_stat_dma_virtual += p_nthw_stat->m_nb_color_counters; + + for (h = 0; h < p_nthw_stat->m_nb_rx_host_buffers; h++) { + p_nt4ga_stat->mp_stat_structs_hb[h].flush_packets += p_stat_dma_virtual[h * 8]; + p_nt4ga_stat->mp_stat_structs_hb[h].drop_packets += p_stat_dma_virtual[h * 8 + 1]; + p_nt4ga_stat->mp_stat_structs_hb[h].fwd_packets += p_stat_dma_virtual[h * 8 + 2]; + p_nt4ga_stat->mp_stat_structs_hb[h].dbs_drop_packets += + p_stat_dma_virtual[h * 8 + 3]; + p_nt4ga_stat->mp_stat_structs_hb[h].flush_bytes += p_stat_dma_virtual[h * 8 + 4]; + p_nt4ga_stat->mp_stat_structs_hb[h].drop_bytes += p_stat_dma_virtual[h * 8 + 5]; + p_nt4ga_stat->mp_stat_structs_hb[h].fwd_bytes += p_stat_dma_virtual[h * 8 + 6]; + p_nt4ga_stat->mp_stat_structs_hb[h].dbs_drop_bytes += + p_stat_dma_virtual[h * 8 + 7]; + } + + /* Move to Rx Port counters */ + p_stat_dma_virtual += p_nthw_stat->m_nb_rx_hb_counters; + + /* RX ports */ + for (p = 0; p < n_rx_ports; p++) { + p_nt4ga_stat->cap.mp_stat_structs_port_rx[p].octets += + p_stat_dma_virtual[p * p_nthw_stat->m_nb_rx_port_counters + 0]; + + p_nt4ga_stat->cap.mp_stat_structs_port_rx[p].broadcast_pkts += + p_stat_dma_virtual[p * p_nthw_stat->m_nb_rx_port_counters + 1]; + p_nt4ga_stat->cap.mp_stat_structs_port_rx[p].multicast_pkts += + p_stat_dma_virtual[p * p_nthw_stat->m_nb_rx_port_counters + 2]; + p_nt4ga_stat->cap.mp_stat_structs_port_rx[p].unicast_pkts += + p_stat_dma_virtual[p * p_nthw_stat->m_nb_rx_port_counters + 3]; + p_nt4ga_stat->cap.mp_stat_structs_port_rx[p].pkts_alignment += + p_stat_dma_virtual[p * p_nthw_stat->m_nb_rx_port_counters + 4]; + p_nt4ga_stat->cap.mp_stat_structs_port_rx[p].pkts_code_violation += + p_stat_dma_virtual[p * p_nthw_stat->m_nb_rx_port_counters + 5]; + p_nt4ga_stat->cap.mp_stat_structs_port_rx[p].pkts_crc += + p_stat_dma_virtual[p * p_nthw_stat->m_nb_rx_port_counters + 6]; + p_nt4ga_stat->cap.mp_stat_structs_port_rx[p].undersize_pkts += + p_stat_dma_virtual[p * p_nthw_stat->m_nb_rx_port_counters + 7]; + p_nt4ga_stat->cap.mp_stat_structs_port_rx[p].oversize_pkts += + p_stat_dma_virtual[p * p_nthw_stat->m_nb_rx_port_counters + 8]; + p_nt4ga_stat->cap.mp_stat_structs_port_rx[p].fragments += + p_stat_dma_virtual[p * p_nthw_stat->m_nb_rx_port_counters + 9]; + p_nt4ga_stat->cap.mp_stat_structs_port_rx[p].jabbers_not_truncated += + p_stat_dma_virtual[p * p_nthw_stat->m_nb_rx_port_counters + 10]; + p_nt4ga_stat->cap.mp_stat_structs_port_rx[p].jabbers_truncated += + p_stat_dma_virtual[p * p_nthw_stat->m_nb_rx_port_counters + 11]; + + p_nt4ga_stat->cap.mp_stat_structs_port_rx[p].pkts_64_octets += + p_stat_dma_virtual[p * p_nthw_stat->m_nb_rx_port_counters + 12]; + p_nt4ga_stat->cap.mp_stat_structs_port_rx[p].pkts_65_to_127_octets += + p_stat_dma_virtual[p * p_nthw_stat->m_nb_rx_port_counters + 13]; + p_nt4ga_stat->cap.mp_stat_structs_port_rx[p].pkts_128_to_255_octets += + p_stat_dma_virtual[p * p_nthw_stat->m_nb_rx_port_counters + 14]; + p_nt4ga_stat->cap.mp_stat_structs_port_rx[p].pkts_256_to_511_octets += + p_stat_dma_virtual[p * p_nthw_stat->m_nb_rx_port_counters + 15]; + p_nt4ga_stat->cap.mp_stat_structs_port_rx[p].pkts_512_to_1023_octets += + p_stat_dma_virtual[p * p_nthw_stat->m_nb_rx_port_counters + 16]; + p_nt4ga_stat->cap.mp_stat_structs_port_rx[p].pkts_1024_to_1518_octets += + p_stat_dma_virtual[p * p_nthw_stat->m_nb_rx_port_counters + 17]; + p_nt4ga_stat->cap.mp_stat_structs_port_rx[p].pkts_1519_to_2047_octets += + p_stat_dma_virtual[p * p_nthw_stat->m_nb_rx_port_counters + 18]; + p_nt4ga_stat->cap.mp_stat_structs_port_rx[p].pkts_2048_to_4095_octets += + p_stat_dma_virtual[p * p_nthw_stat->m_nb_rx_port_counters + 19]; + p_nt4ga_stat->cap.mp_stat_structs_port_rx[p].pkts_4096_to_8191_octets += + p_stat_dma_virtual[p * p_nthw_stat->m_nb_rx_port_counters + 20]; + p_nt4ga_stat->cap.mp_stat_structs_port_rx[p].pkts_8192_to_max_octets += + p_stat_dma_virtual[p * p_nthw_stat->m_nb_rx_port_counters + 21]; + + p_nt4ga_stat->cap.mp_stat_structs_port_rx[p].mac_drop_events += + p_stat_dma_virtual[p * p_nthw_stat->m_nb_rx_port_counters + 22]; + p_nt4ga_stat->cap.mp_stat_structs_port_rx[p].pkts_lr += + p_stat_dma_virtual[p * p_nthw_stat->m_nb_rx_port_counters + 23]; + p_nt4ga_stat->cap.mp_stat_structs_port_rx[p].duplicate += + p_stat_dma_virtual[p * p_nthw_stat->m_nb_rx_port_counters + 24]; + + p_nt4ga_stat->cap.mp_stat_structs_port_rx[p].pkts_ip_chksum_error += + p_stat_dma_virtual[p * p_nthw_stat->m_nb_rx_port_counters + 25]; + p_nt4ga_stat->cap.mp_stat_structs_port_rx[p].pkts_udp_chksum_error += + p_stat_dma_virtual[p * p_nthw_stat->m_nb_rx_port_counters + 26]; + p_nt4ga_stat->cap.mp_stat_structs_port_rx[p].pkts_tcp_chksum_error += + p_stat_dma_virtual[p * p_nthw_stat->m_nb_rx_port_counters + 27]; + p_nt4ga_stat->cap.mp_stat_structs_port_rx[p].pkts_giant_undersize += + p_stat_dma_virtual[p * p_nthw_stat->m_nb_rx_port_counters + 28]; + p_nt4ga_stat->cap.mp_stat_structs_port_rx[p].pkts_baby_giant += + p_stat_dma_virtual[p * p_nthw_stat->m_nb_rx_port_counters + 29]; + p_nt4ga_stat->cap.mp_stat_structs_port_rx[p].pkts_not_isl_vlan_mpls += + p_stat_dma_virtual[p * p_nthw_stat->m_nb_rx_port_counters + 30]; + p_nt4ga_stat->cap.mp_stat_structs_port_rx[p].pkts_isl += + p_stat_dma_virtual[p * p_nthw_stat->m_nb_rx_port_counters + 31]; + p_nt4ga_stat->cap.mp_stat_structs_port_rx[p].pkts_vlan += + p_stat_dma_virtual[p * p_nthw_stat->m_nb_rx_port_counters + 32]; + p_nt4ga_stat->cap.mp_stat_structs_port_rx[p].pkts_isl_vlan += + p_stat_dma_virtual[p * p_nthw_stat->m_nb_rx_port_counters + 33]; + p_nt4ga_stat->cap.mp_stat_structs_port_rx[p].pkts_mpls += + p_stat_dma_virtual[p * p_nthw_stat->m_nb_rx_port_counters + 34]; + p_nt4ga_stat->cap.mp_stat_structs_port_rx[p].pkts_isl_mpls += + p_stat_dma_virtual[p * p_nthw_stat->m_nb_rx_port_counters + 35]; + p_nt4ga_stat->cap.mp_stat_structs_port_rx[p].pkts_vlan_mpls += + p_stat_dma_virtual[p * p_nthw_stat->m_nb_rx_port_counters + 36]; + p_nt4ga_stat->cap.mp_stat_structs_port_rx[p].pkts_isl_vlan_mpls += + p_stat_dma_virtual[p * p_nthw_stat->m_nb_rx_port_counters + 37]; + + p_nt4ga_stat->cap.mp_stat_structs_port_rx[p].pkts_no_filter += + p_stat_dma_virtual[p * p_nthw_stat->m_nb_rx_port_counters + 38]; + p_nt4ga_stat->cap.mp_stat_structs_port_rx[p].pkts_dedup_drop += + p_stat_dma_virtual[p * p_nthw_stat->m_nb_rx_port_counters + 39]; + p_nt4ga_stat->cap.mp_stat_structs_port_rx[p].pkts_filter_drop += + p_stat_dma_virtual[p * p_nthw_stat->m_nb_rx_port_counters + 40]; + p_nt4ga_stat->cap.mp_stat_structs_port_rx[p].pkts_overflow += + p_stat_dma_virtual[p * p_nthw_stat->m_nb_rx_port_counters + 41]; + p_nt4ga_stat->cap.mp_stat_structs_port_rx[p].pkts_dbs_drop += + p_nthw_stat->m_dbs_present + ? p_stat_dma_virtual[p * p_nthw_stat->m_nb_rx_port_counters + 42] + : 0; + p_nt4ga_stat->cap.mp_stat_structs_port_rx[p].octets_no_filter += + p_stat_dma_virtual[p * p_nthw_stat->m_nb_rx_port_counters + 43]; + p_nt4ga_stat->cap.mp_stat_structs_port_rx[p].octets_dedup_drop += + p_stat_dma_virtual[p * p_nthw_stat->m_nb_rx_port_counters + 44]; + p_nt4ga_stat->cap.mp_stat_structs_port_rx[p].octets_filter_drop += + p_stat_dma_virtual[p * p_nthw_stat->m_nb_rx_port_counters + 45]; + p_nt4ga_stat->cap.mp_stat_structs_port_rx[p].octets_overflow += + p_stat_dma_virtual[p * p_nthw_stat->m_nb_rx_port_counters + 46]; + p_nt4ga_stat->cap.mp_stat_structs_port_rx[p].octets_dbs_drop += + p_nthw_stat->m_dbs_present + ? p_stat_dma_virtual[p * p_nthw_stat->m_nb_rx_port_counters + 47] + : 0; + + p_nt4ga_stat->cap.mp_stat_structs_port_rx[p].ipft_first_hit += + p_stat_dma_virtual[p * p_nthw_stat->m_nb_rx_port_counters + 48]; + p_nt4ga_stat->cap.mp_stat_structs_port_rx[p].ipft_first_not_hit += + p_stat_dma_virtual[p * p_nthw_stat->m_nb_rx_port_counters + 49]; + p_nt4ga_stat->cap.mp_stat_structs_port_rx[p].ipft_mid_hit += + p_stat_dma_virtual[p * p_nthw_stat->m_nb_rx_port_counters + 50]; + p_nt4ga_stat->cap.mp_stat_structs_port_rx[p].ipft_mid_not_hit += + p_stat_dma_virtual[p * p_nthw_stat->m_nb_rx_port_counters + 51]; + p_nt4ga_stat->cap.mp_stat_structs_port_rx[p].ipft_last_hit += + p_stat_dma_virtual[p * p_nthw_stat->m_nb_rx_port_counters + 52]; + p_nt4ga_stat->cap.mp_stat_structs_port_rx[p].ipft_last_not_hit += + p_stat_dma_virtual[p * p_nthw_stat->m_nb_rx_port_counters + 53]; + + /* Rx totals */ + uint64_t new_drop_events_sum = + p_stat_dma_virtual[p * p_nthw_stat->m_nb_rx_port_counters + 22] + + p_stat_dma_virtual[p * p_nthw_stat->m_nb_rx_port_counters + 38] + + p_stat_dma_virtual[p * p_nthw_stat->m_nb_rx_port_counters + 39] + + p_stat_dma_virtual[p * p_nthw_stat->m_nb_rx_port_counters + 40] + + p_stat_dma_virtual[p * p_nthw_stat->m_nb_rx_port_counters + 41] + + (p_nthw_stat->m_dbs_present + ? p_stat_dma_virtual[p * p_nthw_stat->m_nb_rx_port_counters + 42] + : 0); + + uint64_t new_packets_sum = + p_stat_dma_virtual[p * p_nthw_stat->m_nb_rx_port_counters + 7] + + p_stat_dma_virtual[p * p_nthw_stat->m_nb_rx_port_counters + 8] + + p_stat_dma_virtual[p * p_nthw_stat->m_nb_rx_port_counters + 9] + + p_stat_dma_virtual[p * p_nthw_stat->m_nb_rx_port_counters + 10] + + p_stat_dma_virtual[p * p_nthw_stat->m_nb_rx_port_counters + 11] + + p_stat_dma_virtual[p * p_nthw_stat->m_nb_rx_port_counters + 12] + + p_stat_dma_virtual[p * p_nthw_stat->m_nb_rx_port_counters + 13] + + p_stat_dma_virtual[p * p_nthw_stat->m_nb_rx_port_counters + 14] + + p_stat_dma_virtual[p * p_nthw_stat->m_nb_rx_port_counters + 15] + + p_stat_dma_virtual[p * p_nthw_stat->m_nb_rx_port_counters + 16] + + p_stat_dma_virtual[p * p_nthw_stat->m_nb_rx_port_counters + 17] + + p_stat_dma_virtual[p * p_nthw_stat->m_nb_rx_port_counters + 18] + + p_stat_dma_virtual[p * p_nthw_stat->m_nb_rx_port_counters + 19] + + p_stat_dma_virtual[p * p_nthw_stat->m_nb_rx_port_counters + 20] + + p_stat_dma_virtual[p * p_nthw_stat->m_nb_rx_port_counters + 21]; + + p_nt4ga_stat->cap.mp_stat_structs_port_rx[p].drop_events += new_drop_events_sum; + p_nt4ga_stat->cap.mp_stat_structs_port_rx[p].pkts += new_packets_sum; + + p_nt4ga_stat->a_port_rx_octets_total[p] += + p_stat_dma_virtual[p * p_nthw_stat->m_nb_rx_port_counters + 0]; + p_nt4ga_stat->a_port_rx_packets_total[p] += new_packets_sum; + p_nt4ga_stat->a_port_rx_drops_total[p] += new_drop_events_sum; + } + + /* Move to Tx Port counters */ + p_stat_dma_virtual += n_rx_ports * p_nthw_stat->m_nb_rx_port_counters; + + for (p = 0; p < n_tx_ports; p++) { + p_nt4ga_stat->cap.mp_stat_structs_port_tx[p].octets += + p_stat_dma_virtual[p * p_nthw_stat->m_nb_tx_port_counters + 0]; + + p_nt4ga_stat->cap.mp_stat_structs_port_tx[p].broadcast_pkts += + p_stat_dma_virtual[p * p_nthw_stat->m_nb_tx_port_counters + 1]; + p_nt4ga_stat->cap.mp_stat_structs_port_tx[p].multicast_pkts += + p_stat_dma_virtual[p * p_nthw_stat->m_nb_tx_port_counters + 2]; + p_nt4ga_stat->cap.mp_stat_structs_port_tx[p].unicast_pkts += + p_stat_dma_virtual[p * p_nthw_stat->m_nb_tx_port_counters + 3]; + p_nt4ga_stat->cap.mp_stat_structs_port_tx[p].pkts_alignment += + p_stat_dma_virtual[p * p_nthw_stat->m_nb_tx_port_counters + 4]; + p_nt4ga_stat->cap.mp_stat_structs_port_tx[p].pkts_code_violation += + p_stat_dma_virtual[p * p_nthw_stat->m_nb_tx_port_counters + 5]; + p_nt4ga_stat->cap.mp_stat_structs_port_tx[p].pkts_crc += + p_stat_dma_virtual[p * p_nthw_stat->m_nb_tx_port_counters + 6]; + p_nt4ga_stat->cap.mp_stat_structs_port_tx[p].undersize_pkts += + p_stat_dma_virtual[p * p_nthw_stat->m_nb_tx_port_counters + 7]; + p_nt4ga_stat->cap.mp_stat_structs_port_tx[p].oversize_pkts += + p_stat_dma_virtual[p * p_nthw_stat->m_nb_tx_port_counters + 8]; + p_nt4ga_stat->cap.mp_stat_structs_port_tx[p].fragments += + p_stat_dma_virtual[p * p_nthw_stat->m_nb_tx_port_counters + 9]; + p_nt4ga_stat->cap.mp_stat_structs_port_tx[p].jabbers_not_truncated += + p_stat_dma_virtual[p * p_nthw_stat->m_nb_tx_port_counters + 10]; + p_nt4ga_stat->cap.mp_stat_structs_port_tx[p].jabbers_truncated += + p_stat_dma_virtual[p * p_nthw_stat->m_nb_tx_port_counters + 11]; + + p_nt4ga_stat->cap.mp_stat_structs_port_tx[p].pkts_64_octets += + p_stat_dma_virtual[p * p_nthw_stat->m_nb_tx_port_counters + 12]; + p_nt4ga_stat->cap.mp_stat_structs_port_tx[p].pkts_65_to_127_octets += + p_stat_dma_virtual[p * p_nthw_stat->m_nb_tx_port_counters + 13]; + p_nt4ga_stat->cap.mp_stat_structs_port_tx[p].pkts_128_to_255_octets += + p_stat_dma_virtual[p * p_nthw_stat->m_nb_tx_port_counters + 14]; + p_nt4ga_stat->cap.mp_stat_structs_port_tx[p].pkts_256_to_511_octets += + p_stat_dma_virtual[p * p_nthw_stat->m_nb_tx_port_counters + 15]; + p_nt4ga_stat->cap.mp_stat_structs_port_tx[p].pkts_512_to_1023_octets += + p_stat_dma_virtual[p * p_nthw_stat->m_nb_tx_port_counters + 16]; + p_nt4ga_stat->cap.mp_stat_structs_port_tx[p].pkts_1024_to_1518_octets += + p_stat_dma_virtual[p * p_nthw_stat->m_nb_tx_port_counters + 17]; + p_nt4ga_stat->cap.mp_stat_structs_port_tx[p].pkts_1519_to_2047_octets += + p_stat_dma_virtual[p * p_nthw_stat->m_nb_tx_port_counters + 18]; + p_nt4ga_stat->cap.mp_stat_structs_port_tx[p].pkts_2048_to_4095_octets += + p_stat_dma_virtual[p * p_nthw_stat->m_nb_tx_port_counters + 19]; + p_nt4ga_stat->cap.mp_stat_structs_port_tx[p].pkts_4096_to_8191_octets += + p_stat_dma_virtual[p * p_nthw_stat->m_nb_tx_port_counters + 20]; + p_nt4ga_stat->cap.mp_stat_structs_port_tx[p].pkts_8192_to_max_octets += + p_stat_dma_virtual[p * p_nthw_stat->m_nb_tx_port_counters + 21]; + + p_nt4ga_stat->cap.mp_stat_structs_port_tx[p].mac_drop_events += + p_stat_dma_virtual[p * p_nthw_stat->m_nb_tx_port_counters + 22]; + p_nt4ga_stat->cap.mp_stat_structs_port_tx[p].pkts_lr += + p_stat_dma_virtual[p * p_nthw_stat->m_nb_tx_port_counters + 23]; + + /* Tx totals */ + uint64_t new_drop_events_sum = + p_stat_dma_virtual[p * p_nthw_stat->m_nb_tx_port_counters + 22]; + + uint64_t new_packets_sum = + p_stat_dma_virtual[p * p_nthw_stat->m_nb_tx_port_counters + 7] + + p_stat_dma_virtual[p * p_nthw_stat->m_nb_tx_port_counters + 8] + + p_stat_dma_virtual[p * p_nthw_stat->m_nb_tx_port_counters + 9] + + p_stat_dma_virtual[p * p_nthw_stat->m_nb_tx_port_counters + 10] + + p_stat_dma_virtual[p * p_nthw_stat->m_nb_tx_port_counters + 11] + + p_stat_dma_virtual[p * p_nthw_stat->m_nb_tx_port_counters + 12] + + p_stat_dma_virtual[p * p_nthw_stat->m_nb_tx_port_counters + 13] + + p_stat_dma_virtual[p * p_nthw_stat->m_nb_tx_port_counters + 14] + + p_stat_dma_virtual[p * p_nthw_stat->m_nb_tx_port_counters + 15] + + p_stat_dma_virtual[p * p_nthw_stat->m_nb_tx_port_counters + 16] + + p_stat_dma_virtual[p * p_nthw_stat->m_nb_tx_port_counters + 17] + + p_stat_dma_virtual[p * p_nthw_stat->m_nb_tx_port_counters + 18] + + p_stat_dma_virtual[p * p_nthw_stat->m_nb_tx_port_counters + 19] + + p_stat_dma_virtual[p * p_nthw_stat->m_nb_tx_port_counters + 20] + + p_stat_dma_virtual[p * p_nthw_stat->m_nb_tx_port_counters + 21]; + + p_nt4ga_stat->cap.mp_stat_structs_port_tx[p].drop_events += new_drop_events_sum; + p_nt4ga_stat->cap.mp_stat_structs_port_tx[p].pkts += new_packets_sum; + + p_nt4ga_stat->a_port_tx_octets_total[p] += + p_stat_dma_virtual[p * p_nthw_stat->m_nb_tx_port_counters + 0]; + p_nt4ga_stat->a_port_tx_packets_total[p] += new_packets_sum; + p_nt4ga_stat->a_port_tx_drops_total[p] += new_drop_events_sum; + } + + /* Update and get port load counters */ + for (p = 0; p < n_rx_ports; p++) { + uint32_t val; + nthw_stat_get_load_bps_rx(p_nthw_stat, p, &val); + p_nt4ga_stat->mp_port_load[p].rx_bps = + (uint64_t)(((__uint128_t)val * 32ULL * 64ULL * 8ULL) / + PORT_LOAD_WINDOWS_SIZE); + nthw_stat_get_load_pps_rx(p_nthw_stat, p, &val); + p_nt4ga_stat->mp_port_load[p].rx_pps = + (uint64_t)(((__uint128_t)val * 32ULL) / PORT_LOAD_WINDOWS_SIZE); + } + + for (p = 0; p < n_tx_ports; p++) { + uint32_t val; + nthw_stat_get_load_bps_tx(p_nthw_stat, p, &val); + p_nt4ga_stat->mp_port_load[p].tx_bps = + (uint64_t)(((__uint128_t)val * 32ULL * 64ULL * 8ULL) / + PORT_LOAD_WINDOWS_SIZE); + nthw_stat_get_load_pps_tx(p_nthw_stat, p, &val); + p_nt4ga_stat->mp_port_load[p].tx_pps = + (uint64_t)(((__uint128_t)val * 32ULL) / PORT_LOAD_WINDOWS_SIZE); + } + + return 0; +} + static struct nt4ga_stat_ops ops = { .nt4ga_stat_init = nt4ga_stat_init, .nt4ga_stat_setup = nt4ga_stat_setup, + .nt4ga_stat_collect = nt4ga_stat_collect }; void nt4ga_stat_ops_init(void) diff --git a/drivers/net/ntnic/include/ntdrv_4ga.h b/drivers/net/ntnic/include/ntdrv_4ga.h index 1135e9a539..38e4d0ca35 100644 --- a/drivers/net/ntnic/include/ntdrv_4ga.h +++ b/drivers/net/ntnic/include/ntdrv_4ga.h @@ -16,6 +16,7 @@ typedef struct ntdrv_4ga_s { volatile bool b_shutdown; rte_thread_t flm_thread; pthread_mutex_t stat_lck; + rte_thread_t stat_thread; } ntdrv_4ga_t; #endif /* __NTDRV_4GA_H__ */ diff --git a/drivers/net/ntnic/include/ntnic_stat.h b/drivers/net/ntnic/include/ntnic_stat.h index ed24a892ec..0735dbc085 100644 --- a/drivers/net/ntnic/include/ntnic_stat.h +++ b/drivers/net/ntnic/include/ntnic_stat.h @@ -85,16 +85,87 @@ struct color_counters { }; struct host_buffer_counters { + uint64_t flush_packets; + uint64_t drop_packets; + uint64_t fwd_packets; + uint64_t dbs_drop_packets; + uint64_t flush_bytes; + uint64_t drop_bytes; + uint64_t fwd_bytes; + uint64_t dbs_drop_bytes; }; struct port_load_counters { + uint64_t rx_pps; uint64_t rx_pps_max; + uint64_t tx_pps; uint64_t tx_pps_max; + uint64_t rx_bps; uint64_t rx_bps_max; + uint64_t tx_bps; uint64_t tx_bps_max; }; struct port_counters_v2 { + /* Rx/Tx common port counters */ + uint64_t drop_events; + uint64_t pkts; + /* FPGA counters */ + uint64_t octets; + uint64_t broadcast_pkts; + uint64_t multicast_pkts; + uint64_t unicast_pkts; + uint64_t pkts_alignment; + uint64_t pkts_code_violation; + uint64_t pkts_crc; + uint64_t undersize_pkts; + uint64_t oversize_pkts; + uint64_t fragments; + uint64_t jabbers_not_truncated; + uint64_t jabbers_truncated; + uint64_t pkts_64_octets; + uint64_t pkts_65_to_127_octets; + uint64_t pkts_128_to_255_octets; + uint64_t pkts_256_to_511_octets; + uint64_t pkts_512_to_1023_octets; + uint64_t pkts_1024_to_1518_octets; + uint64_t pkts_1519_to_2047_octets; + uint64_t pkts_2048_to_4095_octets; + uint64_t pkts_4096_to_8191_octets; + uint64_t pkts_8192_to_max_octets; + uint64_t mac_drop_events; + uint64_t pkts_lr; + /* Rx only port counters */ + uint64_t duplicate; + uint64_t pkts_ip_chksum_error; + uint64_t pkts_udp_chksum_error; + uint64_t pkts_tcp_chksum_error; + uint64_t pkts_giant_undersize; + uint64_t pkts_baby_giant; + uint64_t pkts_not_isl_vlan_mpls; + uint64_t pkts_isl; + uint64_t pkts_vlan; + uint64_t pkts_isl_vlan; + uint64_t pkts_mpls; + uint64_t pkts_isl_mpls; + uint64_t pkts_vlan_mpls; + uint64_t pkts_isl_vlan_mpls; + uint64_t pkts_no_filter; + uint64_t pkts_dedup_drop; + uint64_t pkts_filter_drop; + uint64_t pkts_overflow; + uint64_t pkts_dbs_drop; + uint64_t octets_no_filter; + uint64_t octets_dedup_drop; + uint64_t octets_filter_drop; + uint64_t octets_overflow; + uint64_t octets_dbs_drop; + uint64_t ipft_first_hit; + uint64_t ipft_first_not_hit; + uint64_t ipft_mid_hit; + uint64_t ipft_mid_not_hit; + uint64_t ipft_last_hit; + uint64_t ipft_last_not_hit; }; struct flm_counters_v1 { @@ -147,6 +218,8 @@ struct nt4ga_stat_s { uint64_t a_port_tx_packets_base[NUM_ADAPTER_PORTS_MAX]; uint64_t a_port_tx_packets_total[NUM_ADAPTER_PORTS_MAX]; + + uint64_t a_port_tx_drops_total[NUM_ADAPTER_PORTS_MAX]; }; typedef struct nt4ga_stat_s nt4ga_stat_t; @@ -159,4 +232,9 @@ int nthw_stat_set_dma_address(nthw_stat_t *p, uint64_t stat_dma_physical, uint32_t *p_stat_dma_virtual); int nthw_stat_trigger(nthw_stat_t *p); +int nthw_stat_get_load_bps_rx(nthw_stat_t *p, uint8_t port, uint32_t *val); +int nthw_stat_get_load_bps_tx(nthw_stat_t *p, uint8_t port, uint32_t *val); +int nthw_stat_get_load_pps_rx(nthw_stat_t *p, uint8_t port, uint32_t *val); +int nthw_stat_get_load_pps_tx(nthw_stat_t *p, uint8_t port, uint32_t *val); + #endif /* NTNIC_STAT_H_ */ diff --git a/drivers/net/ntnic/nthw/core/include/nthw_rmc.h b/drivers/net/ntnic/nthw/core/include/nthw_rmc.h index b239752674..9c40804cd9 100644 --- a/drivers/net/ntnic/nthw/core/include/nthw_rmc.h +++ b/drivers/net/ntnic/nthw/core/include/nthw_rmc.h @@ -47,4 +47,9 @@ int nthw_rmc_init(nthw_rmc_t *p, nthw_fpga_t *p_fpga, int n_instance); void nthw_rmc_block(nthw_rmc_t *p); void nthw_rmc_unblock(nthw_rmc_t *p, bool b_is_secondary); +uint32_t nthw_rmc_get_status_sf_ram_of(nthw_rmc_t *p); +uint32_t nthw_rmc_get_status_descr_fifo_of(nthw_rmc_t *p); +uint32_t nthw_rmc_get_dbg_merge(nthw_rmc_t *p); +uint32_t nthw_rmc_get_mac_if_err(nthw_rmc_t *p); + #endif /* NTHW_RMC_H_ */ diff --git a/drivers/net/ntnic/nthw/core/nthw_rmc.c b/drivers/net/ntnic/nthw/core/nthw_rmc.c index 748519aeb4..570a179fc8 100644 --- a/drivers/net/ntnic/nthw/core/nthw_rmc.c +++ b/drivers/net/ntnic/nthw/core/nthw_rmc.c @@ -77,6 +77,26 @@ int nthw_rmc_init(nthw_rmc_t *p, nthw_fpga_t *p_fpga, int n_instance) return 0; } +uint32_t nthw_rmc_get_status_sf_ram_of(nthw_rmc_t *p) +{ + return (p->mp_reg_status) ? nthw_field_get_updated(p->mp_fld_sf_ram_of) : 0xffffffff; +} + +uint32_t nthw_rmc_get_status_descr_fifo_of(nthw_rmc_t *p) +{ + return (p->mp_reg_status) ? nthw_field_get_updated(p->mp_fld_descr_fifo_of) : 0xffffffff; +} + +uint32_t nthw_rmc_get_dbg_merge(nthw_rmc_t *p) +{ + return (p->mp_reg_dbg) ? nthw_field_get_updated(p->mp_fld_dbg_merge) : 0xffffffff; +} + +uint32_t nthw_rmc_get_mac_if_err(nthw_rmc_t *p) +{ + return (p->mp_reg_mac_if) ? nthw_field_get_updated(p->mp_fld_mac_if_err) : 0xffffffff; +} + void nthw_rmc_block(nthw_rmc_t *p) { /* BLOCK_STATT(0)=1 BLOCK_KEEPA(1)=1 BLOCK_MAC_PORT(8:11)=~0 */ diff --git a/drivers/net/ntnic/nthw/flow_api/flow_api.c b/drivers/net/ntnic/nthw/flow_api/flow_api.c index d61044402d..aac3144cc0 100644 --- a/drivers/net/ntnic/nthw/flow_api/flow_api.c +++ b/drivers/net/ntnic/nthw/flow_api/flow_api.c @@ -7,6 +7,7 @@ #include "flow_api_engine.h" #include "flow_api_nic_setup.h" +#include "ntlog.h" #include "ntnic_mod_reg.h" #include "flow_api.h" diff --git a/drivers/net/ntnic/nthw/stat/nthw_stat.c b/drivers/net/ntnic/nthw/stat/nthw_stat.c index 6adcd2e090..078eec5e1f 100644 --- a/drivers/net/ntnic/nthw/stat/nthw_stat.c +++ b/drivers/net/ntnic/nthw/stat/nthw_stat.c @@ -368,3 +368,131 @@ int nthw_stat_trigger(nthw_stat_t *p) return 0; } + +int nthw_stat_get_load_bps_rx(nthw_stat_t *p, uint8_t port, uint32_t *val) +{ + switch (port) { + case 0: + if (p->mp_fld_load_bps_rx0) { + *val = nthw_field_get_updated(p->mp_fld_load_bps_rx0); + return 0; + + } else { + *val = 0; + return -1; + } + + break; + + case 1: + if (p->mp_fld_load_bps_rx1) { + *val = nthw_field_get_updated(p->mp_fld_load_bps_rx1); + return 0; + + } else { + *val = 0; + return -1; + } + + break; + + default: + return -1; + } +} + +int nthw_stat_get_load_bps_tx(nthw_stat_t *p, uint8_t port, uint32_t *val) +{ + switch (port) { + case 0: + if (p->mp_fld_load_bps_tx0) { + *val = nthw_field_get_updated(p->mp_fld_load_bps_tx0); + return 0; + + } else { + *val = 0; + return -1; + } + + break; + + case 1: + if (p->mp_fld_load_bps_tx1) { + *val = nthw_field_get_updated(p->mp_fld_load_bps_tx1); + return 0; + + } else { + *val = 0; + return -1; + } + + break; + + default: + return -1; + } +} + +int nthw_stat_get_load_pps_rx(nthw_stat_t *p, uint8_t port, uint32_t *val) +{ + switch (port) { + case 0: + if (p->mp_fld_load_pps_rx0) { + *val = nthw_field_get_updated(p->mp_fld_load_pps_rx0); + return 0; + + } else { + *val = 0; + return -1; + } + + break; + + case 1: + if (p->mp_fld_load_pps_rx1) { + *val = nthw_field_get_updated(p->mp_fld_load_pps_rx1); + return 0; + + } else { + *val = 0; + return -1; + } + + break; + + default: + return -1; + } +} + +int nthw_stat_get_load_pps_tx(nthw_stat_t *p, uint8_t port, uint32_t *val) +{ + switch (port) { + case 0: + if (p->mp_fld_load_pps_tx0) { + *val = nthw_field_get_updated(p->mp_fld_load_pps_tx0); + return 0; + + } else { + *val = 0; + return -1; + } + + break; + + case 1: + if (p->mp_fld_load_pps_tx1) { + *val = nthw_field_get_updated(p->mp_fld_load_pps_tx1); + return 0; + + } else { + *val = 0; + return -1; + } + + break; + + default: + return -1; + } +} diff --git a/drivers/net/ntnic/ntnic_ethdev.c b/drivers/net/ntnic/ntnic_ethdev.c index 86876ecda6..f94340f489 100644 --- a/drivers/net/ntnic/ntnic_ethdev.c +++ b/drivers/net/ntnic/ntnic_ethdev.c @@ -4,6 +4,9 @@ */ #include +#include + +#include #include #include @@ -25,6 +28,7 @@ #include "nt_util.h" const rte_thread_attr_t thread_attr = { .priority = RTE_THREAD_PRIORITY_NORMAL }; +#define THREAD_CREATE(a, b, c) rte_thread_create(a, &thread_attr, b, c) #define THREAD_CTRL_CREATE(a, b, c, d) rte_thread_create_internal_control(a, b, c, d) #define THREAD_JOIN(a) rte_thread_join(a, NULL) #define THREAD_FUNC static uint32_t @@ -67,6 +71,9 @@ const rte_thread_attr_t thread_attr = { .priority = RTE_THREAD_PRIORITY_NORMAL } uint64_t rte_tsc_freq; +static void (*previous_handler)(int sig); +static rte_thread_t shutdown_tid; + int kill_pmd; #define ETH_DEV_NTNIC_HELP_ARG "help" @@ -1407,6 +1414,7 @@ drv_deinit(struct drv_s *p_drv) /* stop statistics threads */ p_drv->ntdrv.b_shutdown = true; + THREAD_JOIN(p_nt_drv->stat_thread); if (fpga_info->profile == FPGA_INFO_PROFILE_INLINE) { THREAD_JOIN(p_nt_drv->flm_thread); @@ -1628,6 +1636,87 @@ THREAD_FUNC adapter_flm_update_thread_fn(void *context) return THREAD_RETURN; } +/* + * Adapter stat thread + */ +THREAD_FUNC adapter_stat_thread_fn(void *context) +{ + const struct nt4ga_stat_ops *nt4ga_stat_ops = get_nt4ga_stat_ops(); + + if (nt4ga_stat_ops == NULL) { + NT_LOG_DBGX(ERR, NTNIC, "Statistics module uninitialized"); + return THREAD_RETURN; + } + + struct drv_s *p_drv = context; + + ntdrv_4ga_t *p_nt_drv = &p_drv->ntdrv; + nt4ga_stat_t *p_nt4ga_stat = &p_nt_drv->adapter_info.nt4ga_stat; + nthw_stat_t *p_nthw_stat = p_nt4ga_stat->mp_nthw_stat; + const char *const p_adapter_id_str = p_nt_drv->adapter_info.mp_adapter_id_str; + (void)p_adapter_id_str; + + if (!p_nthw_stat) + return THREAD_RETURN; + + NT_LOG_DBGX(DBG, NTNIC, "%s: begin", p_adapter_id_str); + + assert(p_nthw_stat); + + while (!p_drv->ntdrv.b_shutdown) { + nt_os_wait_usec(10 * 1000); + + nthw_stat_trigger(p_nthw_stat); + + uint32_t loop = 0; + + while ((!p_drv->ntdrv.b_shutdown) && + (*p_nthw_stat->mp_timestamp == (uint64_t)-1)) { + nt_os_wait_usec(1 * 100); + + if (rte_log_get_level(nt_log_ntnic) == RTE_LOG_DEBUG && + (++loop & 0x3fff) == 0) { + if (p_nt4ga_stat->mp_nthw_rpf) { + NT_LOG(ERR, NTNIC, "Statistics DMA frozen"); + + } else if (p_nt4ga_stat->mp_nthw_rmc) { + uint32_t sf_ram_of = + nthw_rmc_get_status_sf_ram_of(p_nt4ga_stat + ->mp_nthw_rmc); + uint32_t descr_fifo_of = + nthw_rmc_get_status_descr_fifo_of(p_nt4ga_stat + ->mp_nthw_rmc); + + uint32_t dbg_merge = + nthw_rmc_get_dbg_merge(p_nt4ga_stat->mp_nthw_rmc); + uint32_t mac_if_err = + nthw_rmc_get_mac_if_err(p_nt4ga_stat->mp_nthw_rmc); + + NT_LOG(ERR, NTNIC, "Statistics DMA frozen"); + NT_LOG(ERR, NTNIC, "SF RAM Overflow : %08x", + sf_ram_of); + NT_LOG(ERR, NTNIC, "Descr Fifo Overflow : %08x", + descr_fifo_of); + NT_LOG(ERR, NTNIC, "DBG Merge : %08x", + dbg_merge); + NT_LOG(ERR, NTNIC, "MAC If Errors : %08x", + mac_if_err); + } + } + } + + /* Check then collect */ + { + pthread_mutex_lock(&p_nt_drv->stat_lck); + nt4ga_stat_ops->nt4ga_stat_collect(&p_nt_drv->adapter_info, p_nt4ga_stat); + pthread_mutex_unlock(&p_nt_drv->stat_lck); + } + } + + NT_LOG_DBGX(DBG, NTNIC, "%s: end", p_adapter_id_str); + return THREAD_RETURN; +} + static int nthw_pci_dev_init(struct rte_pci_device *pci_dev) { @@ -1885,6 +1974,16 @@ nthw_pci_dev_init(struct rte_pci_device *pci_dev) } } + pthread_mutex_init(&p_nt_drv->stat_lck, NULL); + res = THREAD_CTRL_CREATE(&p_nt_drv->stat_thread, "nt4ga_stat_thr", adapter_stat_thread_fn, + (void *)p_drv); + + if (res) { + NT_LOG(ERR, NTNIC, "%s: error=%d", + (pci_dev->name[0] ? pci_dev->name : "NA"), res); + return -1; + } + n_phy_ports = fpga_info->n_phy_ports; for (int n_intf_no = 0; n_intf_no < n_phy_ports; n_intf_no++) { @@ -2075,6 +2174,48 @@ nthw_pci_dev_deinit(struct rte_eth_dev *eth_dev __rte_unused) return 0; } +static void signal_handler_func_int(int sig) +{ + if (sig != SIGINT) { + signal(sig, previous_handler); + raise(sig); + return; + } + + kill_pmd = 1; +} + +THREAD_FUNC shutdown_thread(void *arg __rte_unused) +{ + while (!kill_pmd) + nt_os_wait_usec(100 * 1000); + + NT_LOG_DBGX(DBG, NTNIC, "Shutting down because of ctrl+C"); + + signal(SIGINT, previous_handler); + raise(SIGINT); + + return THREAD_RETURN; +} + +static int init_shutdown(void) +{ + NT_LOG(DBG, NTNIC, "Starting shutdown handler"); + kill_pmd = 0; + previous_handler = signal(SIGINT, signal_handler_func_int); + THREAD_CREATE(&shutdown_tid, shutdown_thread, NULL); + + /* + * 1 time calculation of 1 sec stat update rtc cycles to prevent stat poll + * flooding by OVS from multiple virtual port threads - no need to be precise + */ + uint64_t now_rtc = rte_get_tsc_cycles(); + nt_os_wait_usec(10 * 1000); + rte_tsc_freq = 100 * (rte_get_tsc_cycles() - now_rtc); + + return 0; +} + static int nthw_pci_probe(struct rte_pci_driver *pci_drv __rte_unused, struct rte_pci_device *pci_dev) @@ -2117,6 +2258,8 @@ nthw_pci_probe(struct rte_pci_driver *pci_drv __rte_unused, ret = nthw_pci_dev_init(pci_dev); + init_shutdown(); + NT_LOG_DBGX(DBG, NTNIC, "leave: ret=%d", ret); return ret; } diff --git a/drivers/net/ntnic/ntnic_mod_reg.h b/drivers/net/ntnic/ntnic_mod_reg.h index 30b9afb7d3..8b825d8c48 100644 --- a/drivers/net/ntnic/ntnic_mod_reg.h +++ b/drivers/net/ntnic/ntnic_mod_reg.h @@ -186,6 +186,8 @@ void port_init(void); struct nt4ga_stat_ops { int (*nt4ga_stat_init)(struct adapter_info_s *p_adapter_info); int (*nt4ga_stat_setup)(struct adapter_info_s *p_adapter_info); + int (*nt4ga_stat_collect)(struct adapter_info_s *p_adapter_info, + nt4ga_stat_t *p_nt4ga_stat); }; void register_nt4ga_stat_ops(const struct nt4ga_stat_ops *ops); -- 2.45.0