From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 7D30E45BB3; Wed, 23 Oct 2024 17:02:21 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id CA3EC42DBD; Wed, 23 Oct 2024 17:02:05 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id 8F5A742D0C for ; Wed, 23 Oct 2024 17:02:02 +0200 (CEST) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 49NDGjox027956 for ; Wed, 23 Oct 2024 08:02:01 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=pfpt0220; bh=5 QkicmLfZThrteaC8ReHw6mDqqBGknhdLLW7NyjxOZQ=; b=dIDNoTVxoMkl+XKAQ MRa8qaaZxrFrjqkjq4fAY3lIOn4EzqdKaB2m0w/KEzz8FGnuvJHwBy7UWjBtn/Lh qhmRZ1L3GEjnoiyc/oMn75og4n9hl9wE5TGQ4a25+H9vnyjej6qlaF8Kafcqggvy xp6iHUsVMfr/Jz3jJAsWRp0J+EwRcsvyA4ApSZShqOSuZgPl96bt+EW2XNlNUy0z BxXhmNnyY+SK3YOdVyWIlOvQvys4aDCnSWPBgQIE7DXzdBtID9JoHvjN8WXZ8NUk ScweMxoCAiM6wsv/7SvRAwY5MWrLMOwq0Xq91AVtkW16WivRu/Cu54zseThKAvnx X3oHg== Received: from dc5-exch05.marvell.com ([199.233.59.128]) by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 42f1vsg87y-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT) for ; Wed, 23 Oct 2024 08:02:01 -0700 (PDT) Received: from DC5-EXCH05.marvell.com (10.69.176.209) by DC5-EXCH05.marvell.com (10.69.176.209) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.4; Wed, 23 Oct 2024 08:02:00 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH05.marvell.com (10.69.176.209) with Microsoft SMTP Server id 15.2.1544.4 via Frontend Transport; Wed, 23 Oct 2024 08:02:00 -0700 Received: from localhost.localdomain (unknown [10.29.52.211]) by maili.marvell.com (Postfix) with ESMTP id A925B3F7069; Wed, 23 Oct 2024 08:01:58 -0700 (PDT) From: Harman Kalra To: Nithin Dabilpuram , Kiran Kumar K , Sunil Kumar Kori , Satha Rao , Harman Kalra CC: Subject: [PATCH 4/8] net/cnxk: fix eswitch multiseg Date: Wed, 23 Oct 2024 20:31:38 +0530 Message-ID: <20241023150143.113877-4-hkalra@marvell.com> X-Mailer: git-send-email 2.46.0.469.g4590f2e941 In-Reply-To: <20241023150143.113877-1-hkalra@marvell.com> References: <20241023150143.113877-1-hkalra@marvell.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Proofpoint-ORIG-GUID: bR-lWr0B2z86ha9EYJZbLAZdunSqxpul X-Proofpoint-GUID: bR-lWr0B2z86ha9EYJZbLAZdunSqxpul X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Data corruption is observed in case of VxLAN packets as the segment data was not handled properly Fixes: 6ad061cd74ad ("net/cnxk: support multi-segment in eswitch") Signed-off-by: Harman Kalra --- drivers/net/cnxk/cnxk_eswitch_rxtx.c | 11 +++-------- 1 file changed, 3 insertions(+), 8 deletions(-) diff --git a/drivers/net/cnxk/cnxk_eswitch_rxtx.c b/drivers/net/cnxk/cnxk_eswitch_rxtx.c index 6df4ecd762..832c4e5d5c 100644 --- a/drivers/net/cnxk/cnxk_eswitch_rxtx.c +++ b/drivers/net/cnxk/cnxk_eswitch_rxtx.c @@ -120,6 +120,7 @@ cnxk_eswitch_dev_tx_burst(struct cnxk_eswitch_dev *eswitch_dev, uint16_t qid, { struct roc_nix_sq *sq = &eswitch_dev->txq[qid].sqs; struct roc_nix_rq *rq = &eswitch_dev->rxq[qid].rqs; + uint64_t cmd[6 + CNXK_NIX_TX_MSEG_SG_DWORDS - 2]; uint16_t lmt_id, pkt = 0, nb_tx = 0; struct nix_send_ext_s *send_hdr_ext; struct nix_send_hdr_s *send_hdr; @@ -128,11 +129,9 @@ cnxk_eswitch_dev_tx_burst(struct cnxk_eswitch_dev *eswitch_dev, uint16_t qid, union nix_send_sg_s *sg; uintptr_t lmt_base, pa; int64_t fc_pkts, dw_m1; - uint64_t cmd_cn9k[16]; struct rte_mbuf *m; rte_iova_t io_addr; uint16_t segdw; - uint64_t *cmd; uint64_t len; uint8_t off; @@ -149,12 +148,7 @@ cnxk_eswitch_dev_tx_burst(struct cnxk_eswitch_dev *eswitch_dev, uint16_t qid, /* 2(HDR) + 2(EXT_HDR) + 1(SG) + 1(IOVA) = 6/2 - 1 = 2 */ dw_m1 = cn10k_nix_tx_ext_subs(flags) + 1; - if (roc_model_is_cn9k()) { - memset(cmd_cn9k, 0, sizeof(cmd_cn9k)); - cmd = &cmd_cn9k[0]; - } else { - cmd = (uint64_t *)lmt_base; - } + memset(cmd, 0, sizeof(cmd)); send_hdr = (struct nix_send_hdr_s *)&cmd[0]; send_hdr->w0.sq = sq->qid; @@ -204,6 +198,7 @@ cnxk_eswitch_dev_tx_burst(struct cnxk_eswitch_dev *eswitch_dev, uint16_t qid, if (roc_model_is_cn9k()) { nix_cn9k_xmit_one(cmd, sq->lmt_addr, sq->io_addr, segdw); } else { + cn10k_nix_xmit_mv_lmt_base(lmt_base, cmd, flags); /* PA<6:4> = LMTST size-1 in units of 128 bits. Size of the first LMTST in * burst. */ -- 2.46.0.469.g4590f2e941