From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 853EC45BB4; Wed, 23 Oct 2024 19:06:56 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id D0423432D4; Wed, 23 Oct 2024 19:02:15 +0200 (CEST) Received: from egress-ip42b.ess.de.barracuda.com (egress-ip42b.ess.de.barracuda.com [18.185.115.246]) by mails.dpdk.org (Postfix) with ESMTP id 4844142F89 for ; Wed, 23 Oct 2024 19:01:29 +0200 (CEST) Received: from EUR05-AM6-obe.outbound.protection.outlook.com (mail-am6eur05lp2111.outbound.protection.outlook.com [104.47.18.111]) by mx-outbound21-18.eu-central-1b.ess.aws.cudaops.com (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NO); Wed, 23 Oct 2024 17:01:28 +0000 ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=kQFThBXgFryy34Q0/qeAhQ0kFdloH2rCTvgxMv94gw9gk1RqikamVDROFA/3piyV0E3VJ671vc0gwzUWJAmLYmXfoZ4Xjsm/RVMFXje7BdK6XlhDfVDyHHBjP6lXjH9lPNpt7yDcwOSV7FRx08yDILn2npkBDZp0mXJkXwTrzYttzXara606Iju0NJMcRJE5EZs9cYLWzoZbzCPE77mRCcFK2YMR6QjdSE7m14OumDXcuopl4kublY70N/KQWWuQxydBHfOwvbzVIQPJhVDifk5012lAxDevH3XkaSEjzIjD0gPInuuLHqhE8ZrL9eqbBtj1A0OorDdf6PRIUnLZRA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=hZ/tH9hjW6WabsdVHEBmHz8cGd6wyfL7QFB3EiQ9N+0=; b=Y7dFJljqQnBy1m39Vk1LNRsUisANjKwGZAtTIOevcg/DzTW8at5llCqMOU0ZaAbImnMxm4/1RQ0VAVA/AhoMgco07/TMoU+yXJcXKBNpDmltsBCmTrI668zuEkBD4BIaGUXEx6x5c7rCxV++1zIq2uJ8zh7FPhd29veQtHl6jQ2Tjf8DFkaAF/99B6pOPhPPQkDpxCAo2ivUkeE/IVuKoSn4LvJq9uRg/Fl9C7V7K8fr+3PUd954RrZbzK9R2o2BlkOUkYb0ASi2NisjQs+TsJhRMx8Klf3FQ8IEscDb4YfOGAThsrls6dsnjwF/uT8kMi9RymGDL5gA9iIjov35PA== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=fail (sender ip is 178.72.21.4) smtp.rcpttodomain=dpdk.org smtp.mailfrom=napatech.com; dmarc=fail (p=reject sp=reject pct=100) action=oreject header.from=napatech.com; dkim=none (message not signed); arc=none (0) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=napatech.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=hZ/tH9hjW6WabsdVHEBmHz8cGd6wyfL7QFB3EiQ9N+0=; b=PI+oK27Xv8UB8H8UvYX895x5vZDYe/7SJPs+9OlkvQc6iCh6XmAqLep2Ev2kt8nkQqgypIDeCfwmbRWOcfqG0nkpoBvD2duCjrstebgvWkoM9HNghNITwkdU9E/kVeLWYMCDWOWNYAYKjEacM+vIrL5VOn7jx5LSWz7yPXZOQHM= Received: from DU7PR01CA0024.eurprd01.prod.exchangelabs.com (2603:10a6:10:50f::26) by AS8P190MB1029.EURP190.PROD.OUTLOOK.COM (2603:10a6:20b:2e3::22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8093.17; Wed, 23 Oct 2024 17:01:24 +0000 Received: from DB5PEPF00014B9E.eurprd02.prod.outlook.com (2603:10a6:10:50f:cafe::ef) by DU7PR01CA0024.outlook.office365.com (2603:10a6:10:50f::26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8093.17 via Frontend Transport; Wed, 23 Oct 2024 17:01:24 +0000 X-MS-Exchange-Authentication-Results: spf=fail (sender IP is 178.72.21.4) smtp.mailfrom=napatech.com; dkim=none (message not signed) header.d=none;dmarc=fail action=oreject header.from=napatech.com; Received-SPF: Fail (protection.outlook.com: domain of napatech.com does not designate 178.72.21.4 as permitted sender) receiver=protection.outlook.com; client-ip=178.72.21.4; helo=localhost.localdomain; Received: from localhost.localdomain (178.72.21.4) by DB5PEPF00014B9E.mail.protection.outlook.com (10.167.8.171) with Microsoft SMTP Server id 15.20.8093.14 via Frontend Transport; Wed, 23 Oct 2024 17:01:23 +0000 From: Serhii Iliushyk To: dev@dpdk.org Cc: mko-plv@napatech.com, sil-plv@napatech.com, ckm@napatech.com, andrew.rybchenko@oktetlabs.ru, ferruh.yigit@amd.com, Oleksandr Kolomeiets Subject: [PATCH v3 46/73] net/ntnic: add MAC Tx module Date: Wed, 23 Oct 2024 18:59:54 +0200 Message-ID: <20241023170032.314155-47-sil-plv@napatech.com> X-Mailer: git-send-email 2.45.0 In-Reply-To: <20241023170032.314155-1-sil-plv@napatech.com> References: <20241021210527.2075431-1-sil-plv@napatech.com> <20241023170032.314155-1-sil-plv@napatech.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DB5PEPF00014B9E:EE_|AS8P190MB1029:EE_ Content-Type: text/plain X-MS-Office365-Filtering-Correlation-Id: 8f4ee7dd-6abc-4ebf-7377-08dcf384538a X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; ARA:13230040|82310400026|1800799024|36860700013|376014; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?WkDEVoUQ80VFbc7r2RLzeSy/FP/kKPxVTz0H4Ljd5fclmCZgKzzot9p3XZj9?= =?us-ascii?Q?P67Y5RZYlkMeLQzHjeGlEfOaCAfG2mUbR7ef8e3Vjs9UgIM08HiTBiL3c+/S?= =?us-ascii?Q?LU9zvZxmdSWGumQmsP/FGu7xaAMgaa6W6s1C6yENjSCqDOR5qaMC73M3caP5?= =?us-ascii?Q?aXxYv0BMG3tspPZ+FderJKV/bRkO1/OZ7BxjyUW7/eHZbwb53LCiZZIEJq2M?= =?us-ascii?Q?zsgohjU2u1Qv5cH+Sf69Jan1iVl/n2qU14+1jX3PbJFFoMFIbu8XHmV1HPlH?= =?us-ascii?Q?7ABtxhHSRaIue98e121DbD47wFn4eIvBAJHEMBNTSBgwikl87j6eZLkCDJZM?= =?us-ascii?Q?aLParEqh5w4pwLL+Z0HYh+43nFPXD2OOuyJ9uGN3jz42GaytNNvZaHoCequr?= =?us-ascii?Q?I1HAw3QTuhT2f3f7QdPm2jSS83PMwRQlOll5h+uRc/sqHxsO1brHhK8TnQp7?= =?us-ascii?Q?0NDpvhsc+yrc/vIsR8okV2qFxVoe9Ym/GANHeHSC4KUlTtnosAKBh//wM0pd?= =?us-ascii?Q?iaiKgxmxZTREnwmW9QWPczN7E5R/sy0+kr6cJmzPDi6w802RjHMIxDUOmRAP?= =?us-ascii?Q?RVN5pX7atcVC+4AHzTr6+GCv7QXEOj3HbOLP7FUpjOCySETGycH/Qnw5JvPp?= =?us-ascii?Q?svREI9OO0BmdS1zogiG8tFtOOE4583ZzNwRk1FNsYuVuqaOf7NGgxT1xlQ38?= =?us-ascii?Q?2AMzif37t17/KOtYBTibFTE6IsAFDNEYYTtkBsqcBC94HQPlRbHnO9Iyy52d?= =?us-ascii?Q?S1nrSTNidXSiyMYG6SzRfBfwaw/fB8FDrWxkHjouGtQSciMle3M8qxmKQd66?= =?us-ascii?Q?S2KS4LkHMbYD3rUZTH+1erbEXSkF7mdCX7qpmc3745iQ69bEgxZ657zhrySU?= =?us-ascii?Q?Fsfqrd9HNV/6jvHT7ws/dmOxzw/en86UDxSrBURaBlXPBPgOvttgCyD1OUuX?= =?us-ascii?Q?LtZh81wNFI8DdZikazlF6H5mNEdVyp8qy2UUl4Wewkem0xa52mkWidXIHSPD?= =?us-ascii?Q?IqLe0DLB8qcRw9pEKd1fZGhwLXDcCP9kwR/0/ikILCfAAo4+oM5Jx8sJ8EAq?= =?us-ascii?Q?igbNeHs38bLzX2W514zLHY4/+Icr6m746eJLadz3bZ06QfwZirNL07mnJFE7?= =?us-ascii?Q?mPx6kOGtgvPpcvtFDiPhZ6mX2EoFPGl7TMAWk2yRicjTQBu3vkBjdB1AO+qX?= =?us-ascii?Q?8r1W+R5WAgFIO2+TxJSu8miGo+A6KKXMpzfORBuF/8PwEfagq2CFWddvUIpb?= =?us-ascii?Q?UXd1hwhkQeVJzp3ZfAGg3Lgd56gnUb3QCN4IJQhNaFzPhMtqH5PrBZHzRlFN?= =?us-ascii?Q?nyGs/xoT05xmqzahUC2MAFY9BIdckp6CyrCAq2qtFwG+CU0YrHU7Vl0PgejW?= =?us-ascii?Q?BWqCCGJIjIZqiC1uA+/X6Ei5lS60j7KbGzuw6FGOq4DNUnBcAA=3D=3D?= X-Forefront-Antispam-Report: CIP:178.72.21.4; CTRY:DK; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:localhost.localdomain; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230040)(82310400026)(1800799024)(36860700013)(376014); DIR:OUT; SFP:1102; X-MS-Exchange-AntiSpam-ExternalHop-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-ExternalHop-MessageData-0: eH4iAltehmT53YR3s9tyMoeN1Wu13giJJ0yJLBoTTp9NEmFde/0UrXAUT0rftOXiLa1kF1S9X/JnkqnFt0OnRHcsdJvSj8JnNmaqD2UEz8bGucksqtDzzrnMJekctbWVTNI9ttXpiNwvAuGuwt+Gz20upJ0IhDKB/J79a3wpzEBURQ7WeT+b/D7vFPRWB5pwFonXIxt8YUrO2FmMSiff+5U/TevO0UR5FQhCU/JSMQ/FRXM1y+EabQrRR57PScxqC57wu0lvYYgFuBilaqwONKYoVHVsvdiB1vx0QxFo5+igEeoplnkYvmgBE+NUb1+mJqLGhIgOr8poDBro59fNHe9X34l0IQKXTYtqjTMWpFuQ5LDyk9VyswppRL2/7LrZcou3mFVS2uwo9o5t7p+FJk5iQ+qs/bYcvtAQ05ePy6hyiXU/jj1sQzSE+8uVQ++8mctw4C7IQpC5JlrjF4VyH2fVAUP/uuOyEr5F7DI+f7gLbqO9EzrDfCtWNfT1z5Opy8b6HTEP/pvrKOCrQmqMfGXt1fCno3MI9t0d8GerY/FswFTeAArhW294w3s2F5w2sxE8tf8zN7o48otjal0Zp1bPEG3dYJXy8ftImlYSWpTkI+2uWubzQJ2SN8H2BY7eH02P+2CRlb3uQ0LgPKhiRtoPLLwV5zQSFO10KF/KhTc= X-OriginatorOrg: napatech.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 23 Oct 2024 17:01:23.9926 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 8f4ee7dd-6abc-4ebf-7377-08dcf384538a X-MS-Exchange-CrossTenant-Id: c4540d0b-728a-4233-9da5-9ea30c7ec3ed X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=c4540d0b-728a-4233-9da5-9ea30c7ec3ed; Ip=[178.72.21.4]; Helo=[localhost.localdomain] X-MS-Exchange-CrossTenant-AuthSource: DB5PEPF00014B9E.eurprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: AS8P190MB1029 X-BESS-ID: 1729702886-305394-16202-13672-2 X-BESS-VER: 2019.1_20241018.1852 X-BESS-Apparent-Source-IP: 104.47.18.111 X-BESS-Parts: H4sIAAAAAAACA4uuVkqtKFGyUioBkjpK+cVKVqZmBoZAVgZQ0NAgzSzR1DLVIM XcwCTRItUgNSnZzMjEMjEp0dzSzCxVqTYWADbDt0pBAAAA X-BESS-Outbound-Spam-Score: 0.00 X-BESS-Outbound-Spam-Report: Code version 3.2, rules version 3.2.2.259925 [from cloudscan21-4.eu-central-1b.ess.aws.cudaops.com] Rule breakdown below pts rule name description ---- ---------------------- -------------------------------- 0.00 BSF_BESS_OUTBOUND META: BESS Outbound X-BESS-Outbound-Spam-Status: SCORE=0.00 using account:ESS113687 scores of KILL_LEVEL=7.0 tests=BSF_BESS_OUTBOUND X-BESS-BRTS-Status: 1 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Oleksandr Kolomeiets The Media Access Control Transmit module contains counters that keep track on transmitted packets. Signed-off-by: Oleksandr Kolomeiets --- .../supported/nthw_fpga_9563_055_049_0000.c | 38 ++++++++++++++++++- .../ntnic/nthw/supported/nthw_fpga_mod_defs.h | 3 +- .../ntnic/nthw/supported/nthw_fpga_reg_defs.h | 1 + .../supported/nthw_fpga_reg_defs_mac_tx.h | 21 ++++++++++ 4 files changed, 61 insertions(+), 2 deletions(-) create mode 100644 drivers/net/ntnic/nthw/supported/nthw_fpga_reg_defs_mac_tx.h diff --git a/drivers/net/ntnic/nthw/supported/nthw_fpga_9563_055_049_0000.c b/drivers/net/ntnic/nthw/supported/nthw_fpga_9563_055_049_0000.c index eecd6342c0..7a2f5aec32 100644 --- a/drivers/net/ntnic/nthw/supported/nthw_fpga_9563_055_049_0000.c +++ b/drivers/net/ntnic/nthw/supported/nthw_fpga_9563_055_049_0000.c @@ -1831,6 +1831,40 @@ static nthw_fpga_register_init_s mac_rx_registers[] = { { MAC_RX_UNDERSIZE, 8, 32, NTHW_FPGA_REG_TYPE_RO, 0, 1, mac_rx_undersize_fields }, }; +static nthw_fpga_field_init_s mac_tx_packet_small_fields[] = { + { MAC_TX_PACKET_SMALL_COUNT, 32, 0, 0x0000 }, +}; + +static nthw_fpga_field_init_s mac_tx_total_bytes_fields[] = { + { MAC_TX_TOTAL_BYTES_COUNT, 32, 0, 0x0000 }, +}; + +static nthw_fpga_field_init_s mac_tx_total_good_bytes_fields[] = { + { MAC_TX_TOTAL_GOOD_BYTES_COUNT, 32, 0, 0x0000 }, +}; + +static nthw_fpga_field_init_s mac_tx_total_good_packets_fields[] = { + { MAC_TX_TOTAL_GOOD_PACKETS_COUNT, 32, 0, 0x0000 }, +}; + +static nthw_fpga_field_init_s mac_tx_total_packets_fields[] = { + { MAC_TX_TOTAL_PACKETS_COUNT, 32, 0, 0x0000 }, +}; + +static nthw_fpga_register_init_s mac_tx_registers[] = { + { MAC_TX_PACKET_SMALL, 2, 32, NTHW_FPGA_REG_TYPE_RO, 0, 1, mac_tx_packet_small_fields }, + { MAC_TX_TOTAL_BYTES, 3, 32, NTHW_FPGA_REG_TYPE_RO, 0, 1, mac_tx_total_bytes_fields }, + { + MAC_TX_TOTAL_GOOD_BYTES, 4, 32, NTHW_FPGA_REG_TYPE_RO, 0, 1, + mac_tx_total_good_bytes_fields + }, + { + MAC_TX_TOTAL_GOOD_PACKETS, 1, 32, NTHW_FPGA_REG_TYPE_RO, 0, 1, + mac_tx_total_good_packets_fields + }, + { MAC_TX_TOTAL_PACKETS, 0, 32, NTHW_FPGA_REG_TYPE_RO, 0, 1, mac_tx_total_packets_fields }, +}; + static nthw_fpga_field_init_s pci_rd_tg_tg_ctrl_fields[] = { { PCI_RD_TG_TG_CTRL_TG_RD_RDY, 1, 0, 0 }, }; @@ -2182,6 +2216,8 @@ static nthw_fpga_module_init_s fpga_modules[] = { }, { MOD_MAC_RX, 0, MOD_MAC_RX, 0, 0, NTHW_FPGA_BUS_TYPE_RAB2, 10752, 9, mac_rx_registers }, { MOD_MAC_RX, 1, MOD_MAC_RX, 0, 0, NTHW_FPGA_BUS_TYPE_RAB2, 12288, 9, mac_rx_registers }, + { MOD_MAC_TX, 0, MOD_MAC_TX, 0, 0, NTHW_FPGA_BUS_TYPE_RAB2, 11264, 5, mac_tx_registers }, + { MOD_MAC_TX, 1, MOD_MAC_TX, 0, 0, NTHW_FPGA_BUS_TYPE_RAB2, 12800, 5, mac_tx_registers }, { MOD_PCI_RD_TG, 0, MOD_PCI_RD_TG, 0, 1, NTHW_FPGA_BUS_TYPE_RAB0, 2320, 6, pci_rd_tg_registers @@ -2353,5 +2389,5 @@ static nthw_fpga_prod_param_s product_parameters[] = { }; nthw_fpga_prod_init_s nthw_fpga_9563_055_049_0000 = { - 200, 9563, 55, 49, 0, 0, 1726740521, 152, product_parameters, 28, fpga_modules, + 200, 9563, 55, 49, 0, 0, 1726740521, 152, product_parameters, 30, fpga_modules, }; diff --git a/drivers/net/ntnic/nthw/supported/nthw_fpga_mod_defs.h b/drivers/net/ntnic/nthw/supported/nthw_fpga_mod_defs.h index 5983ba7095..f4a913f3d2 100644 --- a/drivers/net/ntnic/nthw/supported/nthw_fpga_mod_defs.h +++ b/drivers/net/ntnic/nthw/supported/nthw_fpga_mod_defs.h @@ -30,6 +30,7 @@ #define MOD_KM (0xcfbd9dbeUL) #define MOD_MAC_PCS (0x7abe24c7UL) #define MOD_MAC_RX (0x6347b490UL) +#define MOD_MAC_TX (0x351d1316UL) #define MOD_PCIE3 (0xfbc48c18UL) #define MOD_PCI_RD_TG (0x9ad9eed2UL) #define MOD_PCI_WR_TG (0x274b69e1UL) @@ -44,7 +45,7 @@ #define MOD_TX_CPY (0x60acf217UL) #define MOD_TX_INS (0x59afa100UL) #define MOD_TX_RPL (0x1095dfbbUL) -#define MOD_IDX_COUNT (31) +#define MOD_IDX_COUNT (32) /* aliases - only aliases go below this point */ #endif /* _NTHW_FPGA_MOD_DEFS_H_ */ diff --git a/drivers/net/ntnic/nthw/supported/nthw_fpga_reg_defs.h b/drivers/net/ntnic/nthw/supported/nthw_fpga_reg_defs.h index 5ebbec6c7e..7741aa563f 100644 --- a/drivers/net/ntnic/nthw/supported/nthw_fpga_reg_defs.h +++ b/drivers/net/ntnic/nthw/supported/nthw_fpga_reg_defs.h @@ -31,6 +31,7 @@ #include "nthw_fpga_reg_defs_km.h" #include "nthw_fpga_reg_defs_mac_pcs.h" #include "nthw_fpga_reg_defs_mac_rx.h" +#include "nthw_fpga_reg_defs_mac_tx.h" #include "nthw_fpga_reg_defs_pcie3.h" #include "nthw_fpga_reg_defs_pci_rd_tg.h" #include "nthw_fpga_reg_defs_pci_wr_tg.h" diff --git a/drivers/net/ntnic/nthw/supported/nthw_fpga_reg_defs_mac_tx.h b/drivers/net/ntnic/nthw/supported/nthw_fpga_reg_defs_mac_tx.h new file mode 100644 index 0000000000..6a77d449ae --- /dev/null +++ b/drivers/net/ntnic/nthw/supported/nthw_fpga_reg_defs_mac_tx.h @@ -0,0 +1,21 @@ +/* + * SPDX-License-Identifier: BSD-3-Clause + * Copyright(c) 2024 Napatech A/S + */ + +#ifndef _NTHW_FPGA_REG_DEFS_MAC_TX_ +#define _NTHW_FPGA_REG_DEFS_MAC_TX_ + +/* MAC_TX */ +#define MAC_TX_PACKET_SMALL (0xcfcb5e97UL) +#define MAC_TX_PACKET_SMALL_COUNT (0x84345b01UL) +#define MAC_TX_TOTAL_BYTES (0x7bd15854UL) +#define MAC_TX_TOTAL_BYTES_COUNT (0x61fb238cUL) +#define MAC_TX_TOTAL_GOOD_BYTES (0xcf0260fUL) +#define MAC_TX_TOTAL_GOOD_BYTES_COUNT (0x8603398UL) +#define MAC_TX_TOTAL_GOOD_PACKETS (0xd89f151UL) +#define MAC_TX_TOTAL_GOOD_PACKETS_COUNT (0x12c47c77UL) +#define MAC_TX_TOTAL_PACKETS (0xe37b5ed4UL) +#define MAC_TX_TOTAL_PACKETS_COUNT (0x21ddd2ddUL) + +#endif /* _NTHW_FPGA_REG_DEFS_MAC_TX_ */ -- 2.45.0