From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 147BB45BD6; Fri, 25 Oct 2024 14:31:54 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id D375240614; Fri, 25 Oct 2024 14:31:39 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id 2D91840659 for ; Fri, 25 Oct 2024 14:30:29 +0200 (CEST) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 49PA6EHw024072; Fri, 25 Oct 2024 05:30:28 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=pfpt0220; bh=v hmQAj3g4RyQREZvIjZbpBHBBiWabvtivvaif+ZQi1k=; b=Gb15cIaNsGFKrmgb9 RFIzI+UDzmVG4uv0SQZU4/xTMgYAyMnO/iVBSGFPRv9V7W+1ZXQtCqRnyAHS5Lp2 9E96t5lLIIFL++NKE8iJwsudebgYmSJwUFAkvuLlyrp+p3OP/bpDskM6AnDuSqFy duirVpqsLhnUp7SLcTso6D0V4kt9p0owh2mQep/v4bZXoouJM8e5j70KYpLlg3Xg NV8mke++l6ykN5X0R8QwJTuWrU2khXBgNnCLO7IbCX5rOVBXN2Hg+++ssDqAI030 DeMLVDYLKT5dehI9ltx2Zpsi+u+AahwdVdV6TIwjlzhmyLti+MHarhYOxliso4M0 B8xKg== Received: from dc5-exch05.marvell.com ([199.233.59.128]) by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 42g76e8esn-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 25 Oct 2024 05:30:28 -0700 (PDT) Received: from DC5-EXCH05.marvell.com (10.69.176.209) by DC5-EXCH05.marvell.com (10.69.176.209) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.4; Fri, 25 Oct 2024 05:30:27 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH05.marvell.com (10.69.176.209) with Microsoft SMTP Server id 15.2.1544.4 via Frontend Transport; Fri, 25 Oct 2024 05:30:27 -0700 Received: from MININT-80QBFE8.corp.innovium.com (MININT-80QBFE8.marvell.com [10.28.164.106]) by maili.marvell.com (Postfix) with ESMTP id D77C03F7090; Fri, 25 Oct 2024 05:30:24 -0700 (PDT) From: To: , , , Pavan Nikhilesh , Shijith Thotton CC: Subject: [PATCH v6 14/22] event/cnxk: add CN20K xstats, selftest and dump Date: Fri, 25 Oct 2024 17:59:36 +0530 Message-ID: <20241025122944.27745-14-pbhagavatula@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20241025122944.27745-1-pbhagavatula@marvell.com> References: <20241025081353.25759-1-pbhagavatula@marvell.com> <20241025122944.27745-1-pbhagavatula@marvell.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Proofpoint-ORIG-GUID: AEyQ22Vp7sXNmgWeG3gIygn1vqN9kT_K X-Proofpoint-GUID: AEyQ22Vp7sXNmgWeG3gIygn1vqN9kT_K X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Pavan Nikhilesh Add selftest to verify SSO, xstats to get queue specific stats and add function to dump internal state of SSO. Signed-off-by: Pavan Nikhilesh --- app/test/test_eventdev.c | 7 +++++++ drivers/event/cnxk/cn20k_eventdev.c | 12 ++++++++++++ drivers/event/cnxk/cnxk_eventdev_selftest.c | 8 ++++---- 3 files changed, 23 insertions(+), 4 deletions(-) diff --git a/app/test/test_eventdev.c b/app/test/test_eventdev.c index b03a62fe70..e97754bd47 100644 --- a/app/test/test_eventdev.c +++ b/app/test/test_eventdev.c @@ -1521,6 +1521,12 @@ test_eventdev_selftest_cn10k(void) return test_eventdev_selftest_impl("event_cn10k", ""); } +static int +test_eventdev_selftest_cn20k(void) +{ + return test_eventdev_selftest_impl("event_cn20k", ""); +} + #endif /* !RTE_EXEC_ENV_WINDOWS */ REGISTER_FAST_TEST(eventdev_common_autotest, true, true, test_eventdev_common); @@ -1532,5 +1538,6 @@ REGISTER_DRIVER_TEST(eventdev_selftest_dpaa2, test_eventdev_selftest_dpaa2); REGISTER_DRIVER_TEST(eventdev_selftest_dlb2, test_eventdev_selftest_dlb2); REGISTER_DRIVER_TEST(eventdev_selftest_cn9k, test_eventdev_selftest_cn9k); REGISTER_DRIVER_TEST(eventdev_selftest_cn10k, test_eventdev_selftest_cn10k); +REGISTER_DRIVER_TEST(eventdev_selftest_cn20k, test_eventdev_selftest_cn20k); #endif /* !RTE_EXEC_ENV_WINDOWS */ diff --git a/drivers/event/cnxk/cn20k_eventdev.c b/drivers/event/cnxk/cn20k_eventdev.c index 6195b29705..793098bd61 100644 --- a/drivers/event/cnxk/cn20k_eventdev.c +++ b/drivers/event/cnxk/cn20k_eventdev.c @@ -408,6 +408,12 @@ cn20k_sso_close(struct rte_eventdev *event_dev) return cnxk_sso_close(event_dev, cn20k_sso_hws_unlink); } +static int +cn20k_sso_selftest(void) +{ + return cnxk_sso_selftest(RTE_STR(event_cn20k)); +} + static struct eventdev_ops cn20k_sso_dev_ops = { .dev_infos_get = cn20k_sso_info_get, .dev_configure = cn20k_sso_dev_configure, @@ -427,9 +433,15 @@ static struct eventdev_ops cn20k_sso_dev_ops = { .port_unlink_profile = cn20k_sso_port_unlink_profile, .timeout_ticks = cnxk_sso_timeout_ticks, + .xstats_get = cnxk_sso_xstats_get, + .xstats_reset = cnxk_sso_xstats_reset, + .xstats_get_names = cnxk_sso_xstats_get_names, + + .dump = cnxk_sso_dump, .dev_start = cn20k_sso_start, .dev_stop = cn20k_sso_stop, .dev_close = cn20k_sso_close, + .dev_selftest = cn20k_sso_selftest, }; static int diff --git a/drivers/event/cnxk/cnxk_eventdev_selftest.c b/drivers/event/cnxk/cnxk_eventdev_selftest.c index 7a3262bcff..8f3d0982e9 100644 --- a/drivers/event/cnxk/cnxk_eventdev_selftest.c +++ b/drivers/event/cnxk/cnxk_eventdev_selftest.c @@ -1566,16 +1566,16 @@ cnxk_sso_selftest(const char *dev_name) return rc; } - if (roc_model_runtime_is_cn10k()) { - printf("Verifying CN10K workslot getwork mode none\n"); + if (roc_model_runtime_is_cn10k() || roc_model_runtime_is_cn20k()) { + printf("Verifying %s workslot getwork mode none\n", dev_name); dev->gw_mode = CNXK_GW_MODE_NONE; if (cnxk_sso_testsuite_run(dev_name)) return rc; - printf("Verifying CN10K workslot getwork mode prefetch\n"); + printf("Verifying %s workslot getwork mode prefetch\n", dev_name); dev->gw_mode = CNXK_GW_MODE_PREF; if (cnxk_sso_testsuite_run(dev_name)) return rc; - printf("Verifying CN10K workslot getwork mode smart prefetch\n"); + printf("Verifying %s workslot getwork mode smart prefetch\n", dev_name); dev->gw_mode = CNXK_GW_MODE_PREF_WFE; if (cnxk_sso_testsuite_run(dev_name)) return rc; -- 2.25.1