From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 12F7B45BF5; Sun, 27 Oct 2024 18:03:35 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id D685040289; Sun, 27 Oct 2024 18:03:34 +0100 (CET) Received: from mail-pf1-f181.google.com (mail-pf1-f181.google.com [209.85.210.181]) by mails.dpdk.org (Postfix) with ESMTP id 9F4EB4026B for ; Sun, 27 Oct 2024 18:03:33 +0100 (CET) Received: by mail-pf1-f181.google.com with SMTP id d2e1a72fcca58-7205b6f51f3so1485732b3a.1 for ; Sun, 27 Oct 2024 10:03:33 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=networkplumber-org.20230601.gappssmtp.com; s=20230601; t=1730048613; x=1730653413; darn=dpdk.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:subject:cc:to:from:date:from:to:cc:subject:date :message-id:reply-to; bh=BOl/kph0PWn9R/tP3gEbJDKGW/r3UTybWRxzJ982hzY=; b=Wz9z8a12ar8UuentBY1c0gUkJ3JM14dmVwX9uNZSwskU6XOJl+7DLSrsLve3bVPR3K zZBDC/NulinbdrPuO4nQBb/9DR3e6Sv6f9z9iZz0wnf0Cm0DpzgrnYOTw90S99vsXWC8 cFJGEmVwCzna/xvxxcwDMZ61Bl/v/l1Kyj1lqgXqCcDuULBlCHkllhPhBLE+t/b1grmd Hbl7UBXMusXPiYvSiiIp2CWIHHhSiYUOJx602aVJOt+xv5tPZeEnJm/L4Cqo3MOe3PKM rC5gcfEHLlocMoIEdc8zyYXhmvIEimPPrOd07TIIWhc918uYx7C6Khy0VCPsZlDFfV+x wRSA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1730048613; x=1730653413; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:subject:cc:to:from:date:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=BOl/kph0PWn9R/tP3gEbJDKGW/r3UTybWRxzJ982hzY=; b=IjYixpfh5lVIfsPixqRUs2+jTeC/UDt1thDatpsukGnRHefZvb2bYbqOmiQNFumEJ6 CqcKf3QqZlpQtbOqU0y3AcpPJcZD+HWdqcfaES3j4gpncEbjNCsrwHiTW1dkmh7Bs7wz 9im8bg14yYxPOiL2/yEFlecwX4x1yZzXq5+4T7RUd4coGnz6BtMil5Ev8L9WMFQntRKZ oLnxMukXspGC+LuuYLfvDcj+TiX3TTR8aNz3gunbpRtMfHaruVePprSgAy01ZjJVNlZl xlcUGw3+hbd8T6nLVUriCeR4vlDujCl8gX313giGBYP1bBRFNKIDmqnuGR5lja1yT+Wh FJjQ== X-Gm-Message-State: AOJu0YxdfoZShg+MJ/uz+RmOJUYs3uAni7YXn0XgEivRmKAvf7hqiiiv J2QPFM6mEOiDM0BFqgHeCRZOiH9CoP89YCKq4dje4wgQr0G2EP3OtErz46bz+uU= X-Google-Smtp-Source: AGHT+IGtZKwXjayvs1MxKS5gJaVRYUN7U3HXQ3UZu5ONIvyX26SfmylpkZCRLHlUCKWQURxJS98hWw== X-Received: by 2002:a05:6a00:9a4:b0:71e:19a:c48b with SMTP id d2e1a72fcca58-7206303657dmr9532694b3a.22.1730048612754; Sun, 27 Oct 2024 10:03:32 -0700 (PDT) Received: from hermes.local (204-195-96-226.wavecable.com. [204.195.96.226]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-72057a0b8e2sm4256113b3a.102.2024.10.27.10.03.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 27 Oct 2024 10:03:32 -0700 (PDT) Date: Sun, 27 Oct 2024 10:03:30 -0700 From: Stephen Hemminger To: Junlong Wang Cc: dev@dpdk.org, thomas@monjalon.net, ferruh.yigit@amd.com, wang.yong19@zte.com.cn Subject: Re: [PATCH v7 9/9] net/zxdh: add zxdh dev configure ops Message-ID: <20241027100330.24d3e978@hermes.local> In-Reply-To: <20241027094048.2ed2f342@hermes.local> References: <20241016081647.1808333-2-wang.junlong1@zte.com.cn> <20241022122042.2127065-1-wang.junlong1@zte.com.cn> <20241022122042.2127065-10-wang.junlong1@zte.com.cn> <20241027094048.2ed2f342@hermes.local> MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org On Sun, 27 Oct 2024 09:40:48 -0700 Stephen Hemminger wrote: > On Tue, 22 Oct 2024 20:20:42 +0800 > Junlong Wang wrote: > > > +int32_t zxdh_acquire_lock(struct zxdh_hw *hw) > > +{ > > + uint32_t var = zxdh_read_comm_reg((uint64_t)hw->common_cfg, ZXDH_VF_LOCK_REG); > > + > > + /* check whether lock is used */ > > + if (!(var & ZXDH_VF_LOCK_ENABLE_MASK)) > > + return -1; > > + > > + return 0; > > +} > > + > > +int32_t zxdh_release_lock(struct zxdh_hw *hw) > > +{ > > + uint32_t var = zxdh_read_comm_reg((uint64_t)hw->common_cfg, ZXDH_VF_LOCK_REG); > > + > > + if (var & ZXDH_VF_LOCK_ENABLE_MASK) { > > + var &= ~ZXDH_VF_LOCK_ENABLE_MASK; > > + zxdh_write_comm_reg((uint64_t)hw->common_cfg, ZXDH_VF_LOCK_REG, var); > > + return 0; > > + } > > + > > + return -1; > > +} > > + > > It is your driver, so you are free to name functions as appropriate. > > But it would make more sense to make the hardware lock follow the pattern > of existing spinlock's etc. I am suggesting: static bool zxdh_try_lock(hw); void zxdh_release_lock(hw); also, move the loop into a new function, something like: int zxdh_timedlock(hw, uint32_t us);