From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 5B16B45BFE; Mon, 28 Oct 2024 12:01:36 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 495C040E31; Mon, 28 Oct 2024 12:01:36 +0100 (CET) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id 8B65D40E2D for ; Mon, 28 Oct 2024 12:01:34 +0100 (CET) Received: from pps.filterd (m0431383.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 49SA1DwQ003978; Mon, 28 Oct 2024 04:01:30 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=pfpt0220; bh=3 um0EmWaR+atA8OK0wAsljVPT7kNUqPz2HILQV9a7vg=; b=EybakmaubtLWUhDG3 T2T/UF65YDvL5ywMDjwWRRy0OoI0kw0QJIgAHJqTE1lgDK4XnzI1NLAGFEdPRuse fADyg6MFd3I4CwXARWcJWkKWcC1sIxoDvKrElFzacyKpFk2FecU6P5vw4uwmSImC SOTRcBP0jKU/8juDSK48rZk5mhSPMBCWPEB28rKHPZ203JIhmra+kFv1LXL3p1gb W9vnAHGJDa76Dl1wgXRwQAPO3P4dV9PHRMzbDr1oOHWBb2ehDnB9IC4Y6alDREvQ UpOaDJ/is4wG4sZNGJsqLdfF8Ab/b2ED6A1fLyc2U8mIu124CQhTBYbbNaeaqs8c reaXA== Received: from dc5-exch05.marvell.com ([199.233.59.128]) by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 42hh66j1pw-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 28 Oct 2024 04:01:30 -0700 (PDT) Received: from DC5-EXCH05.marvell.com (10.69.176.209) by DC5-EXCH05.marvell.com (10.69.176.209) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.4; Mon, 28 Oct 2024 04:01:28 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH05.marvell.com (10.69.176.209) with Microsoft SMTP Server id 15.2.1544.4 via Frontend Transport; Mon, 28 Oct 2024 04:01:28 -0700 Received: from localhost.localdomain (unknown [10.28.36.102]) by maili.marvell.com (Postfix) with ESMTP id 923425C68E6; Mon, 28 Oct 2024 04:01:25 -0700 (PDT) From: Akhil Goyal To: CC: , , , , , , , , Akhil Goyal Subject: [PATCH v6 2/9] raw/cnxk_rvu_lf: support NPA/SSO pffunc get Date: Mon, 28 Oct 2024 16:31:08 +0530 Message-ID: <20241028110115.1070655-3-gakhil@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20241028110115.1070655-1-gakhil@marvell.com> References: <20241024131759.3337333-1-gakhil@marvell.com> <20241028110115.1070655-1-gakhil@marvell.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Proofpoint-ORIG-GUID: CdYEbGg9QSIYEqNsFDvFuBaSrK2pakMN X-Proofpoint-GUID: CdYEbGg9QSIYEqNsFDvFuBaSrK2pakMN X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.687,Hydra:6.0.235,FMLib:17.0.607.475 definitions=2020-10-13_15,2020-10-13_02,2020-04-07_01 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Added rte_pmd_rvu_lf_npa_pf_func_get and rte_pmd_rvu_lf_sso_pf_func_get APIs to get NPA and SSO pffunc for the application/external driver use. Signed-off-by: Akhil Goyal --- doc/guides/rawdevs/cnxk_rvu_lf.rst | 14 ++++++ drivers/common/cnxk/roc_npa.c | 6 +++ drivers/common/cnxk/roc_npa.h | 3 ++ drivers/common/cnxk/roc_sso.c | 6 +++ drivers/common/cnxk/roc_sso.h | 3 ++ drivers/common/cnxk/version.map | 2 + drivers/raw/cnxk_rvu_lf/cnxk_rvu_lf.c | 13 ++++++ drivers/raw/cnxk_rvu_lf/cnxk_rvu_lf_driver.h | 49 ++++++++++++++++++++ drivers/raw/cnxk_rvu_lf/meson.build | 1 + drivers/raw/cnxk_rvu_lf/version.map | 8 ++++ 10 files changed, 105 insertions(+) create mode 100644 drivers/raw/cnxk_rvu_lf/cnxk_rvu_lf_driver.h create mode 100644 drivers/raw/cnxk_rvu_lf/version.map diff --git a/doc/guides/rawdevs/cnxk_rvu_lf.rst b/doc/guides/rawdevs/cnxk_rvu_lf.rst index 8543596aad..7429bb9739 100644 --- a/doc/guides/rawdevs/cnxk_rvu_lf.rst +++ b/doc/guides/rawdevs/cnxk_rvu_lf.rst @@ -11,6 +11,13 @@ Hence, a new raw device driver is added for such RVU LF devices. These devices can map to a RVU PF or a RVU VF which can send mailboxes to each other. +Features +-------- + +The RVU LF device implements following features in the rawdev API: + +- Get PF FUNC of associated NPA and SSO devices. + Limitations ----------- @@ -28,3 +35,10 @@ kernel driver. When querying the status of the devices, they will appear under the category of "Misc (rawdev) devices", i.e. the command ``dpdk-devbind.py --status-dev misc`` can be used to see the state of those devices alone. + +Get NPA and SSO PF FUNC +----------------------- + +APIs ``rte_pmd_rvu_lf_npa_pf_func_get()`` and ``rte_pmd_rvu_lf_sso_pf_func_get()`` +can be used to get the cnxk NPA PF func and SSO PF func which application +can use for NPA/SSO specific configuration. diff --git a/drivers/common/cnxk/roc_npa.c b/drivers/common/cnxk/roc_npa.c index 934d7361a9..a33f9a8499 100644 --- a/drivers/common/cnxk/roc_npa.c +++ b/drivers/common/cnxk/roc_npa.c @@ -17,6 +17,12 @@ roc_npa_lf_init_cb_register(roc_npa_lf_init_cb_t cb) return 0; } +uint16_t +roc_npa_pf_func_get(void) +{ + return idev_npa_pffunc_get(); +} + void roc_npa_pool_op_range_set(uint64_t aura_handle, uint64_t start_iova, uint64_t end_iova) diff --git a/drivers/common/cnxk/roc_npa.h b/drivers/common/cnxk/roc_npa.h index fbf75b2fca..f7cb4460e7 100644 --- a/drivers/common/cnxk/roc_npa.h +++ b/drivers/common/cnxk/roc_npa.h @@ -820,6 +820,9 @@ int __roc_api roc_npa_aura_bp_configure(uint64_t aura_id, uint16_t bpid, uint8_t typedef int (*roc_npa_lf_init_cb_t)(struct plt_pci_device *pci_dev); int __roc_api roc_npa_lf_init_cb_register(roc_npa_lf_init_cb_t cb); +/* Utility functions */ +uint16_t __roc_api roc_npa_pf_func_get(void); + /* Debug */ int __roc_api roc_npa_ctx_dump(void); int __roc_api roc_npa_dump(void); diff --git a/drivers/common/cnxk/roc_sso.c b/drivers/common/cnxk/roc_sso.c index 2e3b134bfc..aed8819a1b 100644 --- a/drivers/common/cnxk/roc_sso.c +++ b/drivers/common/cnxk/roc_sso.c @@ -319,6 +319,12 @@ roc_sso_hwgrp_base_get(struct roc_sso *roc_sso, uint16_t hwgrp) return dev->bar2 + (RVU_BLOCK_ADDR_SSO << 20 | hwgrp << 12); } +uint16_t +roc_sso_pf_func_get(void) +{ + return idev_sso_pffunc_get(); +} + uint64_t roc_sso_ns_to_gw(uint64_t base, uint64_t ns) { diff --git a/drivers/common/cnxk/roc_sso.h b/drivers/common/cnxk/roc_sso.h index 4ac901762e..3e293a0a69 100644 --- a/drivers/common/cnxk/roc_sso.h +++ b/drivers/common/cnxk/roc_sso.h @@ -103,6 +103,9 @@ int __roc_api roc_sso_hwgrp_stash_config(struct roc_sso *roc_sso, void __roc_api roc_sso_hws_gwc_invalidate(struct roc_sso *roc_sso, uint8_t *hws, uint8_t nb_hws); +/* Utility function */ +uint16_t __roc_api roc_sso_pf_func_get(void); + /* Debug */ void __roc_api roc_sso_dump(struct roc_sso *roc_sso, uint8_t nb_hws, uint16_t hwgrp, FILE *f); diff --git a/drivers/common/cnxk/version.map b/drivers/common/cnxk/version.map index b1373bc429..419df30470 100644 --- a/drivers/common/cnxk/version.map +++ b/drivers/common/cnxk/version.map @@ -453,6 +453,7 @@ INTERNAL { roc_npa_dev_unlock; roc_npa_dump; roc_npa_lf_init_cb_register; + roc_npa_pf_func_get; roc_npa_pool_create; roc_npa_pool_destroy; roc_npa_pool_op_pc_reset; @@ -520,6 +521,7 @@ INTERNAL { roc_sso_hws_gwc_invalidate; roc_sso_hws_unlink; roc_sso_ns_to_gw; + roc_sso_pf_func_get; roc_sso_rsrc_fini; roc_sso_rsrc_init; roc_tim_fini; diff --git a/drivers/raw/cnxk_rvu_lf/cnxk_rvu_lf.c b/drivers/raw/cnxk_rvu_lf/cnxk_rvu_lf.c index 1ed12d6979..c8490ccbab 100644 --- a/drivers/raw/cnxk_rvu_lf/cnxk_rvu_lf.c +++ b/drivers/raw/cnxk_rvu_lf/cnxk_rvu_lf.c @@ -14,6 +14,19 @@ #include #include "cnxk_rvu_lf.h" +#include "cnxk_rvu_lf_driver.h" + +uint16_t +rte_pmd_rvu_lf_npa_pf_func_get(void) +{ + return roc_npa_pf_func_get(); +} + +uint16_t +rte_pmd_rvu_lf_sso_pf_func_get(void) +{ + return roc_sso_pf_func_get(); +} static const struct rte_rawdev_ops rvu_lf_rawdev_ops = { .dev_selftest = NULL, diff --git a/drivers/raw/cnxk_rvu_lf/cnxk_rvu_lf_driver.h b/drivers/raw/cnxk_rvu_lf/cnxk_rvu_lf_driver.h new file mode 100644 index 0000000000..460e0129a7 --- /dev/null +++ b/drivers/raw/cnxk_rvu_lf/cnxk_rvu_lf_driver.h @@ -0,0 +1,49 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(C) 2024 Marvell. + */ + +#ifndef _CNXK_RVU_LF_DRIVER_H_ +#define _CNXK_RVU_LF_DRIVER_H_ + +/** + * @file cnxk_rvu_lf_driver.h + * + * Marvell RVU LF raw PMD specific structures and interface + * + * This API allows out of tree driver to manage RVU LF device + * in user space along with installing interrupt handlers for + * low latency signal processing. + */ + +#include + +#include +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * Obtain NPA PF func + * + * @return + * Returns NPA pf_func on success, 0 in case of invalid pf_func. + */ +__rte_internal +uint16_t rte_pmd_rvu_lf_npa_pf_func_get(void); + +/** + * Obtain SSO PF func + * + * @return + * Returns SSO pf_func on success, 0 in case of invalid pf_func. + */ +__rte_internal +uint16_t rte_pmd_rvu_lf_sso_pf_func_get(void); + +#ifdef __cplusplus +} +#endif + +#endif /* _CNXK_RVU_LF_DRIVER_H_ */ diff --git a/drivers/raw/cnxk_rvu_lf/meson.build b/drivers/raw/cnxk_rvu_lf/meson.build index 32081e147f..7ea1c3916c 100644 --- a/drivers/raw/cnxk_rvu_lf/meson.build +++ b/drivers/raw/cnxk_rvu_lf/meson.build @@ -6,4 +6,5 @@ deps += ['bus_pci', 'common_cnxk', 'rawdev'] sources = files( 'cnxk_rvu_lf.c', ) +driver_sdk_headers += files('cnxk_rvu_lf_driver.h') require_iova_in_mbuf = false diff --git a/drivers/raw/cnxk_rvu_lf/version.map b/drivers/raw/cnxk_rvu_lf/version.map new file mode 100644 index 0000000000..3b81544aac --- /dev/null +++ b/drivers/raw/cnxk_rvu_lf/version.map @@ -0,0 +1,8 @@ +INTERNAL { + global: + + rte_pmd_rvu_lf_npa_pf_func_get; + rte_pmd_rvu_lf_sso_pf_func_get; + + local: *; +}; -- 2.25.1