From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id C124D45C7A; Tue, 12 Nov 2024 18:46:42 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 20CD540673; Tue, 12 Nov 2024 18:46:31 +0100 (CET) Received: from mail-pf1-f182.google.com (mail-pf1-f182.google.com [209.85.210.182]) by mails.dpdk.org (Postfix) with ESMTP id 114F740430 for ; Tue, 12 Nov 2024 18:46:28 +0100 (CET) Received: by mail-pf1-f182.google.com with SMTP id d2e1a72fcca58-720aa3dbda5so4309669b3a.1 for ; Tue, 12 Nov 2024 09:46:28 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=networkplumber-org.20230601.gappssmtp.com; s=20230601; t=1731433587; x=1732038387; darn=dpdk.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=WaViV1PlEUYpWhlNAOE7xbUHZzGC7PtYrIqlGtSuCWw=; b=p4dWzh0fsv0gHRAbUbz6TtOooG1EbdLaRgAjwHIZbLTQtV7nnSCHSnqVndCGEChI00 MXtCfHIZTJM4k1RCYkrh7tyNiJADFO6noLKMIWPCR4zcIgo3Fhgth+VK7sfCsdCLp52N SsdORi1pvps7IPhJnagHKJBRk0vq7g/Hrcn+HL4R5F3q4U0R5JZ7Q0v6KHpJuCXiIyzT 3nfMNzXO2v5UnD17HTwBZVA1jdfCGrlhL2GLMvGEfuJKmcS9sj7UELQBWMiAk2BuDKLV nMOPAwpO+UO6YHKQwlaHhFRIABiEeJm6NU+qIJHBf9gIKvMTusiBAOYZU6zTmtFyirKK paVg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1731433587; x=1732038387; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=WaViV1PlEUYpWhlNAOE7xbUHZzGC7PtYrIqlGtSuCWw=; b=XLgxvcBZwxoDgLrZAA66vUZX5RQZJt+f//cmOEUh1vIhu4stof0Ya/wY1RWzPh7k16 yJTk6p1wClNY40Rm6PYrZVrZTJEmL9mD5NzcjD+Q3ZPXXa78ieZyc/VC1B5uWok4Ar9r zxefHjICys22W/Odt/BJjr+vsPKIXFioUAu8ImklkgfzASl6zvskKkwPf/sBmyUwIMY4 XwZlkaCqB4pMMikZ65CTtmPCv2NPl+8IkqjNwPzD9aV6bd+aovhFOEcZqBt00JyhHugV nz7GnpMk/J8WcsSU3C09GlzJzWBRfAzdhf9UZMQ9mqWwZRCg/ZSecwFHuHJhGKkFza8U QOEg== X-Gm-Message-State: AOJu0YxzE+ewkLTHhUMp2cPbhvBuTsdaorAqmufvBS8d+7AcnO5wVPf3 SPz6/waOGsKTbq0WzRNHrhoXj/sAPC7g8DQlZ51IWKAmSFY01FPIVq8dSmZJAFnRWV1jxPkZNyd L8aA= X-Google-Smtp-Source: AGHT+IH24aH1Z+010uMGWACcspJSNRmui793Ki7fZxipP6ud2yykYUuNiylAyMWSIFz/LdrEF5vVTw== X-Received: by 2002:a05:6a20:8413:b0:1d9:d04:586d with SMTP id adf61e73a8af0-1dc5f9a2c85mr4852562637.38.1731433587325; Tue, 12 Nov 2024 09:46:27 -0800 (PST) Received: from hermes.local (204-195-96-226.wavecable.com. [204.195.96.226]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-72407863dd8sm11846758b3a.26.2024.11.12.09.46.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 12 Nov 2024 09:46:26 -0800 (PST) From: Stephen Hemminger To: dev@dpdk.org Cc: Stephen Hemminger , Julien Aube , Harish Patil Subject: [PATCH 3/4] net/bnx2x: fix possible infinite loop at startup Date: Tue, 12 Nov 2024 09:43:55 -0800 Message-ID: <20241112174613.326565-4-stephen@networkplumber.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241112174613.326565-1-stephen@networkplumber.org> References: <20241112174613.326565-1-stephen@networkplumber.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Coverity spotted that one of the loop conditions was always true. Fix by initializing the variable using same logic as Linux kernel driver. Coverity issue: 362057 Fixes: 540a211084a7 ("bnx2x: driver core") Signed-off-by: Stephen Hemminger --- drivers/net/bnx2x/bnx2x.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/net/bnx2x/bnx2x.c b/drivers/net/bnx2x/bnx2x.c index af31ac4604..d96fcb55c9 100644 --- a/drivers/net/bnx2x/bnx2x.c +++ b/drivers/net/bnx2x/bnx2x.c @@ -10331,12 +10331,13 @@ static int bnx2x_init_hw_common(struct bnx2x_softc *sc) REG_WR(sc, PXP2_REG_RD_DISABLE_INPUTS, 0); if (!CHIP_IS_E1x(sc)) { - int factor = 0; + int factor = CHIP_REV_IS_EMUL(sc) ? 1000 : + (CHIP_REV_IS_FPGA(sc) ? 400 : 0); ecore_init_block(sc, BLOCK_PGLUE_B, PHASE_COMMON); ecore_init_block(sc, BLOCK_ATC, PHASE_COMMON); -/* let the HW do it's magic... */ + /* let the HW do it's magic... */ do { DELAY(200000); val = REG_RD(sc, ATC_REG_ATC_INIT_DONE); -- 2.45.2