From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 7963345D03; Thu, 14 Nov 2024 10:32:25 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 4306642E79; Thu, 14 Nov 2024 10:32:22 +0100 (CET) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id 4ED874026F for ; Thu, 14 Nov 2024 10:32:19 +0100 (CET) Received: from pps.filterd (m0431383.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 4AE69hnO006483 for ; Thu, 14 Nov 2024 01:32:18 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=pfpt0220; bh=s ym0bucXez38LiL7Zhxw24lZb8URoWj7Od548Vw6dFQ=; b=i4GoS+e1yHA7lfeR3 AbuVqQ6QiLi4qtWmqNhFiXuTFLTaJM7clBWaP3lhC9nGJD6N2Q7xSN1JaTt79DfB X8gY3YMD5czRYfiXaehHWGdQvWLxBQ4GjzroP0E2/UYIbEvhr3cYAOm29oOQGXTw 4BYC98vWBIZDtdUVFBq9wzUis3RR50e77gNTvFvNoKRYdC7+0Vu/7+zpYJuDV4YP 6VqCyv1icRSeXDGcp1ytDq2KLyy7sFS95ADKV/qD6Ci85duRqv6jJomIPEtXNmNi ZNJsRP0R5JjquTqAwaBJsBXnRQGB3oSpo9/w6009jESGMoeu1cIfUKKO6ZA2jXQw UH9pA== Received: from dc5-exch05.marvell.com ([199.233.59.128]) by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 42wbprhabh-3 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT) for ; Thu, 14 Nov 2024 01:32:18 -0800 (PST) Received: from DC5-EXCH05.marvell.com (10.69.176.209) by DC5-EXCH05.marvell.com (10.69.176.209) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.4; Thu, 14 Nov 2024 01:32:03 -0800 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH05.marvell.com (10.69.176.209) with Microsoft SMTP Server id 15.2.1544.4 via Frontend Transport; Thu, 14 Nov 2024 01:32:03 -0800 Received: from localhost.localdomain (unknown [10.29.52.211]) by maili.marvell.com (Postfix) with ESMTP id 068CA3F7054; Thu, 14 Nov 2024 01:32:00 -0800 (PST) From: Harman Kalra To: Nithin Dabilpuram , Kiran Kumar K , Sunil Kumar Kori , Satha Rao , Harman Kalra CC: Subject: [PATCH v2 2/2] common/cnxk: add mailbox debug trace Date: Thu, 14 Nov 2024 15:01:53 +0530 Message-ID: <20241114093154.177536-2-hkalra@marvell.com> X-Mailer: git-send-email 2.46.0.469.g4590f2e941 In-Reply-To: <20241114093154.177536-1-hkalra@marvell.com> References: <20241104130800.164085-1-hkalra@marvell.com> <20241114093154.177536-1-hkalra@marvell.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Proofpoint-GUID: 19fQg3jYxAw0VmJCkbY6UIXrtPDE7Z8H X-Proofpoint-ORIG-GUID: 19fQg3jYxAw0VmJCkbY6UIXrtPDE7Z8H X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.687,Hydra:6.0.235,FMLib:17.0.607.475 definitions=2020-10-13_15,2020-10-13_02,2020-04-07_01 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Implementing mailbox debug trace points to trace function calls. Signed-off-by: Harman Kalra --- V2: * Fixed line length exceeding 100 columns drivers/common/cnxk/roc_dev.c | 87 ++++++++++++++++-------------- drivers/common/cnxk/roc_mbox.c | 34 ++++++++++++ drivers/common/cnxk/roc_mbox.h | 2 + drivers/common/cnxk/roc_platform.c | 9 ++++ drivers/common/cnxk/roc_platform.h | 87 ++++++++++++++++++++++++++++-- 5 files changed, 175 insertions(+), 44 deletions(-) diff --git a/drivers/common/cnxk/roc_dev.c b/drivers/common/cnxk/roc_dev.c index 0d1f9c4564..2dc437c491 100644 --- a/drivers/common/cnxk/roc_dev.c +++ b/drivers/common/cnxk/roc_dev.c @@ -26,7 +26,6 @@ /* RVU PF interrupt status as received from AF*/ #define RVU_PF_INTR_STATUS 0x3 - static void * mbox_mem_map(off_t off, size_t size) { @@ -83,6 +82,7 @@ pf_af_sync_msg(struct dev *dev, struct mbox_msghdr **rsp) timeout += sleep; if (timeout >= mbox->rsp_tmo) { plt_err("Message timeout: %dms", mbox->rsp_tmo); + roc_trace_mbox_error("AFPF_SYNC", "RSP_TMO", -EIO); rc = -EIO; break; } @@ -137,6 +137,7 @@ af_pf_wait_msg(struct dev *dev, uint16_t vf, int num_msg) timeout++; if (timeout >= mbox->rsp_tmo) { plt_err("Routed messages %d timeout: %dms", num_msg, mbox->rsp_tmo); + roc_trace_mbox_error("AFPF_WAIT", "RTD_MSG_TMO", -EIO); break; } int_status = plt_read64(dev->mbox_reg_base + RVU_PF_INT); @@ -149,16 +150,18 @@ af_pf_wait_msg(struct dev *dev, uint16_t vf, int num_msg) plt_write64(~0ull, dev->mbox_reg_base + RVU_PF_INT_ENA_W1S); req_hdr = (struct mbox_hdr *)((uintptr_t)mdev->mbase + mbox->rx_start); - if (req_hdr->num_msgs != num_msg) - plt_err("Routed messages: %d received: %d", num_msg, - req_hdr->num_msgs); + if (req_hdr->num_msgs != num_msg) { + plt_err("Routed messages: %d received: %d", num_msg, req_hdr->num_msgs); + roc_trace_mbox_error("AFPF_WAIT", "RTD_INV_CNT", num_msg); + } /* Get messages from mbox */ - offset = mbox->rx_start + - PLT_ALIGN(sizeof(struct mbox_hdr), MBOX_MSG_ALIGN); + offset = mbox->rx_start + PLT_ALIGN(sizeof(struct mbox_hdr), MBOX_MSG_ALIGN); for (i = 0; i < req_hdr->num_msgs; i++) { msg = (struct mbox_msghdr *)((uintptr_t)mdev->mbase + offset); size = mbox->rx_start + msg->next_msgoff - offset; + roc_trace_mbox_process("AFPF_WAIT", mbox_id2name(msg->id), req_hdr->num_msgs, + msg->pcifunc); /* Reserve PF/VF mbox message */ size = PLT_ALIGN(size, MBOX_MSG_ALIGN); @@ -288,6 +291,8 @@ vf_pf_process_msgs(struct dev *dev, uint16_t vf) /* RVU_PF_FUNC_S */ msg->pcifunc = dev_pf_func(dev->pf, vf); + roc_trace_mbox_process("VFPF_MSG", mbox_id2name(msg->id), req_hdr->num_msgs, + msg->pcifunc); if (msg->id == MBOX_MSG_READY) { struct ready_msg_rsp *rsp; @@ -333,8 +338,7 @@ vf_pf_process_msgs(struct dev *dev, uint16_t vf) } if (routed > 0) { - plt_base_dbg("pf:%d routed %d messages from vf:%d to AF", - dev->pf, routed, vf); + roc_trace_mbox_vf_pf_handle("RTG_AF", dev_pf_func(dev->pf, vf), routed); /* PF will send the messages to AF and wait for responses */ af_pf_wait_msg(dev, vf, routed); mbox_reset(dev->mbox, 0); @@ -343,8 +347,7 @@ vf_pf_process_msgs(struct dev *dev, uint16_t vf) /* Send mbox responses to VF */ if (mdev->num_msgs) { - plt_base_dbg("pf:%d reply %d messages to vf:%d", dev->pf, - mdev->num_msgs, vf); + roc_trace_mbox_vf_pf_handle("RSP_VF", dev_pf_func(dev->pf, vf), mdev->num_msgs); mbox_msg_send(mbox, vf); } @@ -378,25 +381,24 @@ vf_pf_process_up_msgs(struct dev *dev, uint16_t vf) switch (msg->id) { case MBOX_MSG_CGX_LINK_EVENT: - plt_base_dbg("PF: Msg 0x%x (%s) fn:0x%x (pf:%d,vf:%d)", - msg->id, mbox_id2name(msg->id), - msg->pcifunc, dev_get_pf(msg->pcifunc), - dev_get_vf(msg->pcifunc)); + roc_trace_mbox_process("VFPF_UPMSG_CGX", mbox_id2name(msg->id), + req_hdr->num_msgs, msg->pcifunc); break; case MBOX_MSG_CGX_PTP_RX_INFO: - plt_base_dbg("PF: Msg 0x%x (%s) fn:0x%x (pf:%d,vf:%d)", - msg->id, mbox_id2name(msg->id), - msg->pcifunc, dev_get_pf(msg->pcifunc), - dev_get_vf(msg->pcifunc)); + roc_trace_mbox_process("VFPF_UPMSG_PTP", mbox_id2name(msg->id), + req_hdr->num_msgs, msg->pcifunc); break; default: if (roc_rvu_lf_msg_id_range_check(dev->roc_rvu_lf, msg->id)) plt_base_dbg("PF: Msg 0x%x fn:0x%x (pf:%d,vf:%d)", msg->id, msg->pcifunc, dev_get_pf(msg->pcifunc), dev_get_vf(msg->pcifunc)); - else - plt_err("Not handled UP msg 0x%x (%s) func:0x%x", - msg->id, mbox_id2name(msg->id), msg->pcifunc); + else { + roc_trace_mbox_process("UNHND_UPMSG", mbox_id2name(msg->id), + req_hdr->num_msgs, msg->pcifunc); + plt_err("Not handled UP msg 0x%x (%s) func:0x%x", msg->id, + mbox_id2name(msg->id), msg->pcifunc); + } } offset = mbox->rx_start + msg->next_msgoff; } @@ -446,8 +448,7 @@ roc_vf_pf_mbox_irq(void *param) if (!intr) continue; - plt_base_dbg("vfpf: %d intr: 0x%" PRIx64 " (pf:%d, vf:%d)", vfpf, intr, dev->pf, - dev->vf); + roc_trace_mbox_interrupt("VFPF_IRQ", dev_pf_func(dev->pf, dev->vf), intr, 0); /* Save and clear intr bits */ intrb.bits[vfpf] |= intr; @@ -489,9 +490,8 @@ process_msgs(struct dev *dev, struct mbox *mbox) msg = (struct mbox_msghdr *)((uintptr_t)mdev->mbase + offset); msgs_acked++; - plt_base_dbg("Message 0x%x (%s) pf:%d/vf:%d", msg->id, - mbox_id2name(msg->id), dev_get_pf(msg->pcifunc), - dev_get_vf(msg->pcifunc)); + roc_trace_mbox_process("PRC_MSG", mbox_id2name(msg->id), req_hdr->num_msgs, + msg->pcifunc); switch (msg->id) { /* Add message id's that are handled here */ @@ -514,6 +514,8 @@ process_msgs(struct dev *dev, struct mbox *mbox) } else { plt_err("Message (%s) response has err=%d", mbox_id2name(msg->id), msg->rc); + roc_trace_mbox_error("PRC_MSG_ERR", mbox_id2name(msg->id), + msg->rc); } } break; @@ -526,14 +528,19 @@ process_msgs(struct dev *dev, struct mbox *mbox) } else { plt_err("Message (%s) response has err=%d", mbox_id2name(msg->id), msg->rc); + roc_trace_mbox_error("PRC_MSG_ERR", mbox_id2name(msg->id), + msg->rc); } } break; default: - if (msg->rc) + if (msg->rc) { plt_err("Message (%s) response has err=%d (%s)", mbox_id2name(msg->id), msg->rc, roc_error_msg_get(msg->rc)); + roc_trace_mbox_error("PRC_MSG_INV_RSP", mbox_id2name(msg->id), + msg->rc); + } break; } offset = mbox->rx_start + msg->next_msgoff; @@ -564,8 +571,8 @@ pf_vf_mbox_send_up_msg(struct dev *dev, void *rec_msg) if (!(dev->active_vfs[vf / max_bits] & (BIT_ULL(vf)))) continue; - plt_base_dbg("(%s) size: %zx to VF: %d", - mbox_id2name(msg->hdr.id), size, vf); + roc_trace_mbox_process("PFVF_SND_UPMSG", mbox_id2name(msg->hdr.id), 1, + (uint16_t)dev_pf_func(dev->pf, vf)); /* Reserve PF/VF mbox message */ vf_msg = mbox_alloc_msg(vf_mbox, vf, size); @@ -895,9 +902,10 @@ process_msgs_up(struct dev *dev, struct mbox *mbox) for (i = 0; i < req_hdr->num_msgs; i++) { msg = (struct mbox_msghdr *)((uintptr_t)mdev->mbase + offset); - plt_base_dbg("Message 0x%x (%s) pf:%d/vf:%d", msg->id, - mbox_id2name(msg->id), dev_get_pf(msg->pcifunc), - dev_get_vf(msg->pcifunc)); + plt_base_dbg("Message 0x%x (%s) pf:%d/vf:%d", msg->id, mbox_id2name(msg->id), + dev_get_pf(msg->pcifunc), dev_get_vf(msg->pcifunc)); + roc_trace_mbox_process("PRC_UPMSG", mbox_id2name(msg->id), req_hdr->num_msgs, + msg->pcifunc); if (roc_rvu_lf_msg_id_range_check(dev->roc_rvu_lf, msg->id)) { size = mbox->rx_start + msg->next_msgoff - offset; err = process_rvu_lf_msgs_up(dev, msg, size); @@ -905,9 +913,11 @@ process_msgs_up(struct dev *dev, struct mbox *mbox) plt_err("Error %d handling 0x%x RVU_LF up msg", err, msg->id); } else { err = mbox_process_msgs_up(dev, msg); - if (err) + if (err) { + roc_trace_mbox_error("PRC_UPMSG_ERR", mbox_id2name(msg->id), err); plt_err("Error %d handling 0x%x (%s)", err, msg->id, mbox_id2name(msg->id)); + } } offset = mbox->rx_start + msg->next_msgoff; } @@ -930,7 +940,7 @@ roc_pf_vf_mbox_irq_cn20k(void *param) plt_base_dbg("Proceeding to check mbox UP messages if any"); plt_write64(intr, dev->mbox_reg_base + RVU_VF_INT); - plt_base_dbg("Irq 0x%" PRIx64 "(pf:%d,vf:%d)", intr, dev->pf, dev->vf); + roc_trace_mbox_interrupt("PFVF_IRQ_20K", dev_pf_func(dev->pf, dev->vf), intr, 0); /* If interrupt occurred for down message */ if (intr & BIT_ULL(1)) @@ -954,7 +964,7 @@ roc_af_pf_mbox_irq_cn20k(void *param) plt_base_dbg("Proceeding to check mbox UP messages if any"); plt_write64(intr, dev->mbox_reg_base + RVU_PF_INT); - plt_base_dbg("Irq 0x%" PRIx64 "(pf:%d,vf:%d)", intr, dev->pf, dev->vf); + roc_trace_mbox_interrupt("AFPF_IRQ_20K", dev_pf_func(dev->pf, dev->vf), intr, 0); /* If interrupt occurred for down message */ if (intr & BIT_ULL(1)) @@ -978,12 +988,12 @@ roc_pf_vf_mbox_irq(void *param) plt_base_dbg("Proceeding to check mbox UP messages if any"); plt_write64(intr, dev->mbox_reg_base + RVU_VF_INT); - plt_base_dbg("Irq 0x%" PRIx64 "(pf:%d,vf:%d)", intr, dev->pf, dev->vf); /* Reading for UP/DOWN message, next message sending will be delayed * by 1ms until this region is zeroed mbox_wait_for_zero() */ mbox_data = plt_read64(dev->mbox_reg_base + RVU_VF_VFPF_MBOX0); + roc_trace_mbox_interrupt("PFVF_IRQ", dev_pf_func(dev->pf, dev->vf), intr, mbox_data); /* If interrupt occurred for down message */ if (mbox_data & MBOX_DOWN_MSG) { mbox_data &= ~MBOX_DOWN_MSG; @@ -1015,12 +1025,12 @@ roc_af_pf_mbox_irq(void *param) plt_base_dbg("Proceeding to check mbox UP messages if any"); plt_write64(intr, dev->mbox_reg_base + RVU_PF_INT); - plt_base_dbg("Irq 0x%" PRIx64 "(pf:%d,vf:%d)", intr, dev->pf, dev->vf); /* Reading for UP/DOWN message, next message sending will be delayed * by 1ms until this region is zeroed mbox_wait_for_zero() */ mbox_data = plt_read64(dev->mbox_reg_base + RVU_PF_PFAF_MBOX0); + roc_trace_mbox_interrupt("AFPF_IRQ", dev_pf_func(dev->pf, dev->vf), intr, mbox_data); /* If interrupt occurred for down message */ if (mbox_data & MBOX_DOWN_MSG) { mbox_data &= ~MBOX_DOWN_MSG; @@ -1327,8 +1337,7 @@ vf_flr_handle_msg(void *param, dev_intr_t *flr) for (vf = 0; vf < max_vf; vf++) { if (flr->bits[vf / max_bits] & BIT_ULL(vf % max_bits)) { - plt_base_dbg("Process FLR vf:%d request (pf:%d, vf:%d)", - vf, dev->pf, dev->vf); + roc_trace_mbox_vf_flr("PRC_VFFLR", vf, dev_pf_func(dev->pf, dev->vf)); /* Inform AF about VF reset */ vf_flr_send_msg(dev, vf); flr->bits[vf / max_bits] &= ~(BIT_ULL(vf % max_bits)); diff --git a/drivers/common/cnxk/roc_mbox.c b/drivers/common/cnxk/roc_mbox.c index a3b96e6e2b..c07202b964 100644 --- a/drivers/common/cnxk/roc_mbox.c +++ b/drivers/common/cnxk/roc_mbox.c @@ -263,6 +263,34 @@ mbox_wait_for_zero(struct mbox *mbox, int devid) return data == 0; } +static inline void +mbox_debug_region(const char *ops, struct mbox *mbox, int devid, uint64_t intr_val, int rc) +{ + struct mbox_dev *mdev = &mbox->dev[devid]; + struct mbox_msghdr *msg_rx, *msg_tx; + uint64_t offset_rx, offset_tx; + char buf[BUFSIZ]; + + if (!plt_trace_point_is_enabled(&__cnxk_trace_mbox_region)) + return; + + /* Get messages from mbox */ + offset_tx = mbox->tx_start + PLT_ALIGN(sizeof(struct mbox_hdr), MBOX_MSG_ALIGN); + + msg_tx = (struct mbox_msghdr *)((uintptr_t)mdev->mbase + offset_tx); + snprintf(buf, BUFSIZ, "%s_TX", ops); + /* Only while sending message choose a rand identifier for the msg */ + if (intr_val) + msg_tx->cookie = rand(); + roc_trace_mbox_region(buf, mbox_id2name(msg_tx->id), msg_tx->pcifunc, (int)intr_val, + msg_tx->cookie); + + offset_rx = mbox->rx_start + PLT_ALIGN(sizeof(struct mbox_hdr), MBOX_MSG_ALIGN); + msg_rx = (struct mbox_msghdr *)((uintptr_t)mdev->mbase + offset_rx); + snprintf(buf, BUFSIZ, "%s_RX", ops); + roc_trace_mbox_region(buf, mbox_id2name(msg_rx->id), msg_rx->pcifunc, rc, msg_rx->cookie); +} + static void mbox_msg_send_data(struct mbox *mbox, int devid, uint8_t data) { @@ -291,6 +319,8 @@ mbox_msg_send_data(struct mbox *mbox, int devid, uint8_t data) (volatile void *)(mbox->reg_base + (mbox->trigger | (devid << mbox->tr_shift)))); intr_val |= (uint64_t)data; + + mbox_debug_region("SND_MSG", mbox, devid, intr_val, 0); /* The interrupt should be fired after num_msgs is written * to the shared memory */ @@ -342,6 +372,8 @@ mbox_get_rsp(struct mbox *mbox, int devid, void **msg) if (msg != NULL) *msg = msghdr; + mbox_debug_region("GET_RSP", mbox, devid, 0, msghdr->rc); + return msghdr->rc; } @@ -438,6 +470,8 @@ mbox_wait(struct mbox *mbox, int devid, uint32_t rst_timo) plt_memory_order_acquire), tx_hdr->num_msgs, rx_hdr->num_msgs, mdev->msg_size, mdev->rsp_size); + mbox_debug_region("MBX_TMO", mbox, devid, 0, -EIO); + return -EIO; } } diff --git a/drivers/common/cnxk/roc_mbox.h b/drivers/common/cnxk/roc_mbox.h index e7a916d61c..3ca8442b55 100644 --- a/drivers/common/cnxk/roc_mbox.h +++ b/drivers/common/cnxk/roc_mbox.h @@ -32,6 +32,8 @@ struct mbox_msghdr { uint16_t __io ver; /* Offset of next msg within mailbox region */ uint16_t __io next_msgoff; + /* Unique ID for trace debug */ + uint16_t __io cookie; int __io rc; /* Msg processed response code */ }; diff --git a/drivers/common/cnxk/roc_platform.c b/drivers/common/cnxk/roc_platform.c index f1e0a93d97..f7678280f5 100644 --- a/drivers/common/cnxk/roc_platform.c +++ b/drivers/common/cnxk/roc_platform.c @@ -3,6 +3,7 @@ */ #include +#include #include "roc_api.h" @@ -85,6 +86,14 @@ roc_plt_init(void) return 0; } +/* ROC trace points */ +RTE_TRACE_POINT_REGISTER(cnxk_trace_mbox_region, cnxk.mbox.region) +RTE_TRACE_POINT_REGISTER(cnxk_trace_mbox_process, cnxk.mbox.process) +RTE_TRACE_POINT_REGISTER(cnxk_trace_mbox_interrupt, cnxk.mbox.interrupt) +RTE_TRACE_POINT_REGISTER(cnxk_trace_mbox_vf_flr, cnxk.mbox.vf.flr) +RTE_TRACE_POINT_REGISTER(cnxk_trace_mbox_vf_pf_handle, cnxk.mbox.vf.pf.handle) +RTE_TRACE_POINT_REGISTER(cnxk_trace_mbox_error, cnxk.mbox.error) + RTE_LOG_REGISTER_SUFFIX(cnxk_logtype_base, base, INFO); RTE_LOG_REGISTER_SUFFIX(cnxk_logtype_mbox, mbox, NOTICE); RTE_LOG_REGISTER_SUFFIX(cnxk_logtype_cpt, crypto, NOTICE); diff --git a/drivers/common/cnxk/roc_platform.h b/drivers/common/cnxk/roc_platform.h index 4076dbe94d..d62d1db8d1 100644 --- a/drivers/common/cnxk/roc_platform.h +++ b/drivers/common/cnxk/roc_platform.h @@ -5,12 +5,12 @@ #ifndef _ROC_PLATFORM_H_ #define _ROC_PLATFORM_H_ -#include +#include #include #include -#include #include #include +#include #include #include #include @@ -25,6 +25,7 @@ #include #include #include +#include #include "eal_filesystem.h" @@ -265,6 +266,9 @@ plt_thread_is_valid(plt_thread_t thr) #define plt_tel_data_add_dict_u64 rte_tel_data_add_dict_uint #define plt_telemetry_register_cmd rte_telemetry_register_cmd +/* Trace */ +#define plt_trace_point_is_enabled rte_trace_point_is_enabled + /* Log */ extern int cnxk_logtype_base; #define RTE_LOGTYPE_base cnxk_logtype_base @@ -379,9 +383,82 @@ plt_lmt_region_reserve_aligned(const char *name, size_t len, uint32_t align) /* To ensure returned memory is physically contiguous, bounding * the start and end address in 2M range. */ - return rte_memzone_reserve_bounded(name, len, SOCKET_ID_ANY, - RTE_MEMZONE_IOVA_CONTIG, - align, RTE_PGSIZE_2M); + return rte_memzone_reserve_bounded(name, len, SOCKET_ID_ANY, RTE_MEMZONE_IOVA_CONTIG, align, + RTE_PGSIZE_2M); +} + +/* ROC trace points */ +RTE_TRACE_POINT(cnxk_trace_mbox_region, + RTE_TRACE_POINT_ARGS(const char *func, const char *msg, uint16_t pcifunc, int data, + uint16_t cookie), + rte_trace_point_emit_string(func); + rte_trace_point_emit_string(msg); rte_trace_point_emit_u16(pcifunc); + rte_trace_point_emit_int(data); rte_trace_point_emit_u16(cookie);) + +RTE_TRACE_POINT(cnxk_trace_mbox_process, + RTE_TRACE_POINT_ARGS(const char *func, const char *msg, uint16_t num_msgs, + uint16_t pcifunc), + rte_trace_point_emit_string(func); + rte_trace_point_emit_string(msg); rte_trace_point_emit_u16(num_msgs); + rte_trace_point_emit_u16(pcifunc);) + +RTE_TRACE_POINT(cnxk_trace_mbox_interrupt, + RTE_TRACE_POINT_ARGS(const char *func, int pcifunc, uint64_t intr, + uint64_t mbox_data), + rte_trace_point_emit_string(func); + rte_trace_point_emit_int(pcifunc); rte_trace_point_emit_u64(intr); + rte_trace_point_emit_u64(mbox_data);) + +RTE_TRACE_POINT(cnxk_trace_mbox_vf_flr, + RTE_TRACE_POINT_ARGS(const char *func, uint16_t from_vf, uint16_t pcifunc), + rte_trace_point_emit_string(func); + rte_trace_point_emit_u16(from_vf); rte_trace_point_emit_u16(pcifunc);) + +RTE_TRACE_POINT(cnxk_trace_mbox_vf_pf_handle, + RTE_TRACE_POINT_ARGS(const char *ops, uint16_t pcifunc, int data), + rte_trace_point_emit_string(ops); + rte_trace_point_emit_u16(pcifunc); rte_trace_point_emit_int(data);) + +RTE_TRACE_POINT(cnxk_trace_mbox_error, + RTE_TRACE_POINT_ARGS(const char *func, const char *msg, int data), + rte_trace_point_emit_string(func); + rte_trace_point_emit_string(msg); rte_trace_point_emit_int(data);) + +static inline void +roc_trace_mbox_region(const char *func, const char *msg, uint16_t pcifunc, int data, + uint16_t cookie) +{ + cnxk_trace_mbox_region(func, msg, pcifunc, data, cookie); +} + +static inline void +roc_trace_mbox_process(const char *func, const char *msg, uint16_t num_msgs, uint16_t pcifunc) +{ + cnxk_trace_mbox_process(func, msg, num_msgs, pcifunc); +} + +static inline void +roc_trace_mbox_interrupt(const char *func, int pcifunc, uint64_t intr, uint64_t mbox_data) +{ + cnxk_trace_mbox_interrupt(func, pcifunc, intr, mbox_data); +} + +static inline void +roc_trace_mbox_vf_pf_handle(const char *func, uint16_t pcifunc, int data) +{ + cnxk_trace_mbox_vf_pf_handle(func, pcifunc, data); +} + +static inline void +roc_trace_mbox_error(const char *func, const char *msg, int data) +{ + cnxk_trace_mbox_error(func, msg, data); +} + +static inline void +roc_trace_mbox_vf_flr(const char *func, uint16_t from_vf, uint16_t pcifunc) +{ + cnxk_trace_mbox_vf_flr(func, from_vf, pcifunc); } #endif /* _ROC_PLATFORM_H_ */ -- 2.25.1