From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 9ACE845CD8; Mon, 18 Nov 2024 19:23:25 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 6765142E5A; Mon, 18 Nov 2024 19:22:22 +0100 (CET) Received: from mail-pg1-f177.google.com (mail-pg1-f177.google.com [209.85.215.177]) by mails.dpdk.org (Postfix) with ESMTP id F1FB542D0C for ; Mon, 18 Nov 2024 19:22:13 +0100 (CET) Received: by mail-pg1-f177.google.com with SMTP id 41be03b00d2f7-7f43259d220so1526467a12.3 for ; Mon, 18 Nov 2024 10:22:13 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=networkplumber-org.20230601.gappssmtp.com; s=20230601; t=1731954133; x=1732558933; darn=dpdk.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Mzkz7zxu6MFVxGl/lWmozFDabs4AdKjnDLMI6Pzf/ps=; b=yeb4dBx2A0W0Cg4rO6O1ef6+6Yqs7mERra5J2v3Oa1wLIDylqNPFjpZeTm+oY7lXMJ YAvTEQ3U6iTR61F2zmXCo1T7hSFohE5dSfYK91sSiOs1SIRWtaTgbvgkdaGvFs8pVyxK 0KOIhjDMPjdjTCXdCRNRFnQFmu2JKisMKx50U/9y/nxps7QJAzrd2WbVET8wYT08jbFo faxZg7Uqm7/N2FMUVJeZoDTHXgrG8ZHS6QZHRa6WqN6XkfqQgTHsuOmH6NVFIRRzJB4O 5T3q3xu70PP/Hc3ZZh1Om5sz7RBHH4yZM5NOiECNZU6FWaEUifUom0VK3yoip1VUQ8oJ uj7w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1731954133; x=1732558933; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Mzkz7zxu6MFVxGl/lWmozFDabs4AdKjnDLMI6Pzf/ps=; b=wqWXww1ah0k8LUStBQi3rfQ6Oc1Jtai6L+hzRDUKOpLrLBNtuSlzWS5qnJ5iDuk23i mQ2SI89URASwX/tyW8zJ+GP52P7meoN3lDqP5am02SgQpQyyJ+1+tBGL34byhD5DLCc5 RLcu43loHnETEx7xYqIAcg3XxWgxqjzG3pw6bHTHRVoiezJUoHZ39VX8GABcSxgBuxQz m1O+RcheV6dCMhWnq/j3K9OkjhFbsrUAi2cTvHhj5pWPxiL6It9iGIVDTOpMWpDBvzy1 nQo8LqpiDCt2sMpOiiiJDZ1mR8V/DFyEO8jPz28pEdYoUAQ24KyrsWmXGrtEK4pz6Ykp Ilig== X-Gm-Message-State: AOJu0YyebJDNt4aLsUbZ/aJ8hrvw6CvwEp/TfQBvOhm7nMMBT9FsFw34 j9Nm9UaKSO7MP6vR4aXXCDgLwGPV1Un+0S1tnY6iSaCe1D1JSJvm90zPkhN4l+62oinCKUuMIEe + X-Google-Smtp-Source: AGHT+IGMmdLZ/9VF5W8TcERoMOP81fVMnVzzIhz+e29RTHwX089XNsxghVAwx2V0heTixt8kFAmTug== X-Received: by 2002:a17:90b:1650:b0:2ea:838c:7f1c with SMTP id 98e67ed59e1d1-2ea838c7fa8mr3925023a91.29.1731954132898; Mon, 18 Nov 2024 10:22:12 -0800 (PST) Received: from hermes.local (204-195-96-226.wavecable.com. [204.195.96.226]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-2ea61869bb2sm2916724a91.12.2024.11.18.10.22.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 18 Nov 2024 10:22:12 -0800 (PST) From: Stephen Hemminger To: dev@dpdk.org Cc: Stephen Hemminger , akhil.goyal@nxp.com, stable@dpdk.org, Hemant Agrawal Subject: [PATCH v2 13/19] crypto/dpaa_sec: fix bitmask truncation Date: Mon, 18 Nov 2024 10:20:54 -0800 Message-ID: <20241118182153.87042-14-stephen@networkplumber.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241118182153.87042-1-stephen@networkplumber.org> References: <20241115060738.313190-1-stephen@networkplumber.org> <20241118182153.87042-1-stephen@networkplumber.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org The dqrr_held mask is 64 bit but updates were getting truncated because 1 is of type int (32 bit) and the result shift of int is of type int (32 bit); therefore any value >= 32 would get truncated. Link: https://pvs-studio.com/en/blog/posts/cpp/1183/ Fixes: fe3688ba7950 ("crypto/dpaa_sec: support event crypto adapter") Cc: akhil.goyal@nxp.com Cc: stable@dpdk.org Signed-off-by: Stephen Hemminger Acked-by: Hemant Agrawal --- drivers/crypto/dpaa_sec/dpaa_sec.c | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/drivers/crypto/dpaa_sec/dpaa_sec.c b/drivers/crypto/dpaa_sec/dpaa_sec.c index 3fa88ca968..e117cd77a6 100644 --- a/drivers/crypto/dpaa_sec/dpaa_sec.c +++ b/drivers/crypto/dpaa_sec/dpaa_sec.c @@ -1907,13 +1907,12 @@ dpaa_sec_enqueue_burst(void *qp, struct rte_crypto_op **ops, op = *(ops++); if (*dpaa_seqn(op->sym->m_src) != 0) { index = *dpaa_seqn(op->sym->m_src) - 1; - if (DPAA_PER_LCORE_DQRR_HELD & (1 << index)) { + if (DPAA_PER_LCORE_DQRR_HELD & (UINT64_C(1) << index)) { /* QM_EQCR_DCA_IDXMASK = 0x0f */ flags[loop] = ((index & 0x0f) << 8); flags[loop] |= QMAN_ENQUEUE_FLAG_DCA; DPAA_PER_LCORE_DQRR_SIZE--; - DPAA_PER_LCORE_DQRR_HELD &= - ~(1 << index); + DPAA_PER_LCORE_DQRR_HELD &= ~(UINT64_C(1) << index); } } @@ -3500,7 +3499,7 @@ dpaa_sec_process_atomic_event(void *event, /* Save active dqrr entries */ index = ((uintptr_t)dqrr >> 6) & (16/*QM_DQRR_SIZE*/ - 1); DPAA_PER_LCORE_DQRR_SIZE++; - DPAA_PER_LCORE_DQRR_HELD |= 1 << index; + DPAA_PER_LCORE_DQRR_HELD |= UINT64_C(1) << index; DPAA_PER_LCORE_DQRR_MBUF(index) = ctx->op->sym->m_src; ev->impl_opaque = index + 1; *dpaa_seqn(ctx->op->sym->m_src) = (uint32_t)index + 1; -- 2.45.2