[PATCH v3 0/2] bnxt patchset

[PATCH v3 0/2] bnxt patchset

[Ajit Khaparde]

v1->v2: Rebasing patchset based on latest dpdk tree.
v2->v3: Dropped an incomplete patch which ended up on mailing list.

Please apply.

Ajit Khaparde (2):
  net/bnxt: update HWRM API
  net/bnxt: add support for Rx profile selection

 drivers/net/bnxt/bnxt.h                |  1 +
 drivers/net/bnxt/bnxt_hwrm.c           | 15 +++++-
 drivers/net/bnxt/hsi_struct_def_dpdk.h | 71 +++++++++++++++++++++++++-
 3 files changed, 84 insertions(+), 3 deletions(-)

-- 
2.39.5 (Apple Git-154)

[PATCH v3 1/2] net/bnxt: update HWRM API

[Ajit Khaparde]

Update HWRM API to select ring profile.

Signed-off-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
---
 drivers/net/bnxt/hsi_struct_def_dpdk.h | 71 +++++++++++++++++++++++++-
 1 file changed, 69 insertions(+), 2 deletions(-)

diff --git a/drivers/net/bnxt/hsi_struct_def_dpdk.h b/drivers/net/bnxt/hsi_struct_def_dpdk.h
index 8f348c20fb..737bf2693b 100644
--- a/drivers/net/bnxt/hsi_struct_def_dpdk.h
+++ b/drivers/net/bnxt/hsi_struct_def_dpdk.h
@@ -15617,7 +15617,46 @@ struct hwrm_func_qcaps_output {
 	 * (SR-IOV) disabled or on a VF.
 	 */
 	uint32_t	roce_vf_max_gid;
-	uint8_t	unused_3[3];
+	uint32_t	flags_ext3;
+	/*
+	 * When this bit is '1', firmware supports the driver using
+	 * FUNC_CFG (or FUNC_VF_CFG) to decrease resource reservations
+	 * while some resources are still allocated. An error is returned
+	 * if the driver tries to set the reservation to be less than the
+	 * number of allocated resources.
+	 */
+	#define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_EXT3_RM_RSV_WHILE_ALLOC_CAP \
+		UINT32_C(0x1)
+	/*
+	 * When this bit is '1', the PF requires an L2 filter to be
+	 * allocated by the driver using HWRM_CFA_L2_FILTER_ALLOC after
+	 * bringing the interface up, before traffic is sent.
+	 */
+	#define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_EXT3_REQUIRE_L2_FILTER \
+		UINT32_C(0x2)
+	/*
+	 * When set to 1, indicates the field max_roce_vfs in the structure
+	 * is valid. If this bit is 0, the driver should not use the
+	 * 'max_roce_vfs' field.
+	 */
+	#define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_EXT3_MAX_ROCE_VFS_SUPPORTED \
+		UINT32_C(0x4)
+	/*
+	 * When set to 1, indicates the field 'rx_rate_profile_sel' in
+	 * RING_ALLOC can specify a valid RX rate profile when allocating
+	 * RX or RX aggregation rings. If this bit is 0, the driver
+	 * should not use the 'rx_rate_profile_sel' field.
+	 */
+	#define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_EXT3_RX_RATE_PROFILE_SEL_SUPPORTED \
+		UINT32_C(0x8)
+	/*
+	 * The number of VFs that can be used for RoCE on the function. If less
+	 * than max_vfs, roce vfs will be assigned to the first VF of the
+	 * function and be contiguous.
+	 * This is valid only on the PF with SR-IOV and RDMA enabled.
+	 */
+	uint16_t	max_roce_vfs;
+	uint8_t	unused_3[5];
 	/*
 	 * This field is used in Output records to indicate that the output
 	 * is completely written to RAM. This field should be read as '1'
@@ -45026,6 +45065,14 @@ struct hwrm_ring_alloc_input {
 	 */
 	#define HWRM_RING_ALLOC_INPUT_ENABLES_STEERING_TAG_VALID \
 		UINT32_C(0x800)
+	/*
+	 * This bit must be '1' for the rx_rate_profile_sel field to
+	 * be configured. This should only be used when
+	 * 'rx_rate_profile_sel_supported' bit is set in flags_ext3
+	 * field of FUNC_QCAPS response.
+	 */
+	#define HWRM_RING_ALLOC_INPUT_ENABLES_RX_RATE_PROFILE_VALID \
+		UINT32_C(0x1000)
 	/* Ring Type. */
 	uint8_t	ring_type;
 	/* L2 Completion Ring (CR) */
@@ -45362,7 +45409,27 @@ struct hwrm_ring_alloc_input {
 	#define HWRM_RING_ALLOC_INPUT_MPC_CHNLS_TYPE_PRIMATE UINT32_C(0x4)
 	#define HWRM_RING_ALLOC_INPUT_MPC_CHNLS_TYPE_LAST \
 		HWRM_RING_ALLOC_INPUT_MPC_CHNLS_TYPE_PRIMATE
-	uint8_t	unused_4[2];
+	/* RX rate profile select */
+	uint8_t	rx_rate_profile_sel;
+	/*
+	 * Indicate default RX rate profile when allocating
+	 * RX or RX aggregation rings. This should only be
+	 * used when 'rx_rate_profile_sel_supported' bit is
+	 * set in flags_ext3 field of FUNC_QCAPS response.
+	 */
+	#define HWRM_RING_ALLOC_INPUT_RX_RATE_PROFILE_SEL_DEFAULT \
+		UINT32_C(0x0)
+	/*
+	 * Indicate poll_mode RX rate profile when allocating
+	 * RX or RX aggregation rings. This should only be
+	 * used when 'rx_rate_profile_sel_supported' bit is
+	 * set in flags_ext3 field of FUNC_QCAPS response.
+	 */
+	#define HWRM_RING_ALLOC_INPUT_RX_RATE_PROFILE_SEL_POLL_MODE \
+		UINT32_C(0x1)
+	#define HWRM_RING_ALLOC_INPUT_RX_RATE_PROFILE_SEL_LAST \
+		HWRM_RING_ALLOC_INPUT_RX_RATE_PROFILE_SEL_POLL_MODE
+	uint8_t	unused_4;
 	/*
 	 * The cq_handle is specified when allocating a completion ring. For
 	 * devices that support NQs, this cq_handle will be included in the
-- 
2.39.5 (Apple Git-154)

[PATCH v3 2/2] net/bnxt: add support for Rx profile selection

[Ajit Khaparde]

Some firmware versions can support the selection of Rx profile
during Rx and AGG ring allocation.
Check if the firmware sets the
HWRM_FUNC_QCAPS_OUTPUT_FLAGS_EXT3_RX_RATE_PROFILE_SEL_SUPPORTED flag
and set the new Rx profile.

Signed-off-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Reviewed-by: Andy Gospodarek <andrew.gospodarek@broadcom.com>
---
 drivers/net/bnxt/bnxt.h      |  1 +
 drivers/net/bnxt/bnxt_hwrm.c | 15 ++++++++++++++-
 2 files changed, 15 insertions(+), 1 deletion(-)

diff --git a/drivers/net/bnxt/bnxt.h b/drivers/net/bnxt/bnxt.h
index 771349de6c..0402de3eb9 100644
--- a/drivers/net/bnxt/bnxt.h
+++ b/drivers/net/bnxt/bnxt.h
@@ -866,6 +866,7 @@ struct bnxt {
 #define BNXT_FW_CAP_TX_COAL_CMPL	BIT(10)
 #define BNXT_FW_CAP_RX_ALL_PKT_TS	BIT(11)
 #define BNXT_FW_CAP_BACKING_STORE_V2	BIT(12)
+#define BNXT_FW_CAP_RX_RATE_PROFILE	BIT(17)
 #define BNXT_FW_BACKING_STORE_V2_EN(bp)	\
 	((bp)->fw_cap & BNXT_FW_CAP_BACKING_STORE_V2)
 #define BNXT_FW_BACKING_STORE_V1_EN(bp)	\
diff --git a/drivers/net/bnxt/bnxt_hwrm.c b/drivers/net/bnxt/bnxt_hwrm.c
index 351effb28f..d015ba2b9c 100644
--- a/drivers/net/bnxt/bnxt_hwrm.c
+++ b/drivers/net/bnxt/bnxt_hwrm.c
@@ -1139,8 +1139,8 @@ static int __bnxt_hwrm_func_qcaps(struct bnxt *bp)
 	int rc = 0;
 	struct hwrm_func_qcaps_input req = {.req_type = 0 };
 	struct hwrm_func_qcaps_output *resp = bp->hwrm_cmd_resp_addr;
+	uint32_t flags, flags_ext2, flags_ext3;
 	uint16_t new_max_vfs;
-	uint32_t flags, flags_ext2;
 
 	HWRM_PREP(&req, HWRM_FUNC_QCAPS, BNXT_USE_CHIMP_MB);
 
@@ -1153,6 +1153,7 @@ static int __bnxt_hwrm_func_qcaps(struct bnxt *bp)
 	bp->max_ring_grps = rte_le_to_cpu_32(resp->max_hw_ring_grps);
 	flags = rte_le_to_cpu_32(resp->flags);
 	flags_ext2 = rte_le_to_cpu_32(resp->flags_ext2);
+	flags_ext3 = rte_le_to_cpu_32(resp->flags_ext3);
 
 	if (BNXT_PF(bp)) {
 		bp->pf->port_id = resp->port_id;
@@ -1259,6 +1260,8 @@ static int __bnxt_hwrm_func_qcaps(struct bnxt *bp)
 		bp->fw_cap |= BNXT_FW_CAP_RX_ALL_PKT_TS;
 	if (flags_ext2 & HWRM_FUNC_QCAPS_OUTPUT_FLAGS_EXT2_UDP_GSO_SUPPORTED)
 		bp->fw_cap |= BNXT_FW_CAP_UDP_GSO;
+	if (flags_ext3 & HWRM_FUNC_QCAPS_OUTPUT_FLAGS_EXT3_RX_RATE_PROFILE_SEL_SUPPORTED)
+		bp->fw_cap |= BNXT_FW_CAP_RX_RATE_PROFILE;
 
 unlock:
 	HWRM_UNLOCK();
@@ -2227,6 +2230,11 @@ int bnxt_hwrm_ring_alloc(struct bnxt *bp,
 		if (stats_ctx_id != INVALID_STATS_CTX_ID)
 			enables |=
 				HWRM_RING_ALLOC_INPUT_ENABLES_STAT_CTX_ID_VALID;
+		if (bp->fw_cap & BNXT_FW_CAP_RX_RATE_PROFILE) {
+			req.rx_rate_profile_sel =
+				HWRM_RING_ALLOC_INPUT_RX_RATE_PROFILE_SEL_POLL_MODE;
+			enables |= HWRM_RING_ALLOC_INPUT_ENABLES_RX_RATE_PROFILE_VALID;
+		}
 		break;
 	case HWRM_RING_ALLOC_INPUT_RING_TYPE_L2_CMPL:
 		req.ring_type = ring_type;
@@ -2257,6 +2265,11 @@ int bnxt_hwrm_ring_alloc(struct bnxt *bp,
 		enables |= HWRM_RING_ALLOC_INPUT_ENABLES_RX_RING_ID_VALID |
 			   HWRM_RING_ALLOC_INPUT_ENABLES_RX_BUF_SIZE_VALID |
 			   HWRM_RING_ALLOC_INPUT_ENABLES_STAT_CTX_ID_VALID;
+		if (bp->fw_cap & BNXT_FW_CAP_RX_RATE_PROFILE) {
+			req.rx_rate_profile_sel =
+				HWRM_RING_ALLOC_INPUT_RX_RATE_PROFILE_SEL_POLL_MODE;
+			enables |= HWRM_RING_ALLOC_INPUT_ENABLES_RX_RATE_PROFILE_VALID;
+		}
 		break;
 	default:
 		PMD_DRV_LOG_LINE(ERR, "hwrm alloc invalid ring type %d",
-- 
2.39.5 (Apple Git-154)

Re: [PATCH v3 0/2] bnxt patchset

[Ajit Khaparde]

[-- Attachment #1: Type: text/plain, Size: 675 bytes --]

On Mon, Nov 18, 2024 at 1:13 PM Ajit Khaparde
<ajit.khaparde@broadcom.com> wrote:
>
> v1->v2: Rebasing patchset based on latest dpdk tree.
> v2->v3: Dropped an incomplete patch which ended up on mailing list.

Patches rebased and applied to dpdk-next-net-brcm.

>
> Please apply.
>
> Ajit Khaparde (2):
>   net/bnxt: update HWRM API
>   net/bnxt: add support for Rx profile selection
>
>  drivers/net/bnxt/bnxt.h                |  1 +
>  drivers/net/bnxt/bnxt_hwrm.c           | 15 +++++-
>  drivers/net/bnxt/hsi_struct_def_dpdk.h | 71 +++++++++++++++++++++++++-
>  3 files changed, 84 insertions(+), 3 deletions(-)
>
> --
> 2.39.5 (Apple Git-154)
>

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