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[204.195.96.226]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-7254180f78asm10927682b3a.133.2024.12.03.13.13.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 03 Dec 2024 13:13:34 -0800 (PST) Date: Tue, 3 Dec 2024 13:13:22 -0800 From: Stephen Hemminger To: Wathsala Vithanage Cc: Thomas Monjalon , Ferruh Yigit , Andrew Rybchenko , dev@dpdk.org, nd@arm.com, Honnappa Nagarahalli , Dhruv Tripathi Subject: Re: [RFC v3 2/2] ethdev: introduce the cache stashing hints API Message-ID: <20241203131322.41f3afb3@hermes.local> In-Reply-To: <20241021015246.304431-3-wathsala.vithanage@arm.com> References: <20240715221141.16153-1-wathsala.vithanage@arm.com> <20241021015246.304431-1-wathsala.vithanage@arm.com> <20241021015246.304431-3-wathsala.vithanage@arm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org On Mon, 21 Oct 2024 01:52:46 +0000 Wathsala Vithanage wrote: > Extend the ethdev library to enable the stashing of different data > objects, such as the ones listed below, into CPU caches directly > from the NIC. >=20 > - Rx/Tx queue descriptors > - Rx packets > - Packet headers > - packet payloads > - Data of a packet at an offset from the start of the packet >=20 > The APIs are designed in a hardware/vendor agnostic manner such that > supporting PMDs could use any capabilities available in the underlying > hardware for fine-grained stashing of data objects into a CPU cache > (e.g., Steering Tags int PCIe TLP Processing Hints). >=20 > The API provides an interface to query the availability of stashing > capabilities, i.e., platform/NIC support, stashable object types, etc, > via the rte_eth_dev_stashing_capabilities_get interface. >=20 > The function pair rte_eth_dev_stashing_rx_config_set and > rte_eth_dev_stashing_tx_config_set sets the stashing hint (the CPU,=C2=A0 > cache level, and data object types) on the Rx and Tx queues. >=20 > PMDs that support stashing must register their implementations with the > following eth_dev_ops callbacks, which are invoked by the ethdev > functions listed above. >=20 > - stashing_capabilities_get > - stashing_rx_hints_set > - stashing_tx_hints_set >=20 > Signed-off-by: Wathsala Vithanage > Reviewed-by: Honnappa Nagarahalli > Reviewed-by: Dhruv Tripathi >=20 > --- > lib/ethdev/ethdev_driver.h | 66 +++++++++++++++ > lib/ethdev/rte_ethdev.c | 120 +++++++++++++++++++++++++++ > lib/ethdev/rte_ethdev.h | 161 +++++++++++++++++++++++++++++++++++++ > lib/ethdev/version.map | 4 + > 4 files changed, 351 insertions(+) >=20 > diff --git a/lib/ethdev/ethdev_driver.h b/lib/ethdev/ethdev_driver.h > index 1fd4562b40..7caaea54a8 100644 > --- a/lib/ethdev/ethdev_driver.h > +++ b/lib/ethdev/ethdev_driver.h > @@ -1367,6 +1367,68 @@ enum rte_eth_dev_operation { > typedef uint64_t (*eth_get_restore_flags_t)(struct rte_eth_dev *dev, > enum rte_eth_dev_operation op); > =20 > +/** > + * @internal > + * Set cache stashing hints in Rx queue. > + * > + * @param dev > + * Port (ethdev) handle. > + * @param queue_id > + * Rx queue. > + * @param config > + * Stashing hints configuration for the queue. > + * > + * @return > + * -ENOTSUP if the device or the platform does not support cache stash= ing. > + * -ENOSYS if the underlying PMD hasn't implemented cache stashing fe= ature. > + * -EINVAL on invalid arguments. > + * 0 on success. > + */ > +typedef int (*eth_stashing_rx_hints_set_t)(struct rte_eth_dev *dev, uint= 16_t queue_id, > + struct rte_eth_stashing_config *config); > + > +/** > + * @internal > + * Set cache stashing hints in Tx queue. > + * > + * @param dev > + * Port (ethdev) handle. > + * @param queue_id > + * Tx queue. > + * @param config > + * Stashing hints configuration for the queue. > + * > + * @return > + * -ENOTSUP if the device or the platform does not support cache stash= ing. > + * -ENOSYS if the underlying PMD hasn't implemented cache stashing fe= ature. > + * -EINVAL on invalid arguments. > + * 0 on success. > + */ > +typedef int (*eth_stashing_tx_hints_set_t)(struct rte_eth_dev *dev, uint= 16_t queue_id, > + struct rte_eth_stashing_config *config); > + > +/** > + * @internal > + * Get cache stashing object types supported in the ethernet device. > + * The return value indicates availability of stashing hints support > + * in the hardware and the PMD. > + * > + * @param dev > + * Port (ethdev) handle. > + * @param objects > + * PMD sets supported bits on return. > + * > + * @return > + * -ENOTSUP if the device or the platform does not support cache stash= ing. > + * -ENOSYS if the underlying PMD hasn't implemented cache stashing fe= ature. > + * -EINVAL on NULL values for types or hints parameters. > + * On return, types and hints parameters will have bits set for suppor= ted > + * object types and hints. > + * 0 on success. > + */ > +typedef int (*eth_stashing_capabilities_get_t)(struct rte_eth_dev *dev, > + uint16_t *objects); > + > /** > * @internal A structure containing the functions exported by an Etherne= t driver. > */ > @@ -1393,6 +1455,10 @@ struct eth_dev_ops { > eth_mac_addr_remove_t mac_addr_remove; /**< Remove MAC address */ > eth_mac_addr_add_t mac_addr_add; /**< Add a MAC address */ > eth_mac_addr_set_t mac_addr_set; /**< Set a MAC address */ > + eth_stashing_rx_hints_set_t stashing_rx_hints_set; /**< Set Rx cache = stashing*/ > + eth_stashing_tx_hints_set_t stashing_tx_hints_set; /**< Set Tx cache = stashing*/ > + /** Get supported stashing hints*/ > + eth_stashing_capabilities_get_t stashing_capabilities_get; > /** Set list of multicast addresses */ > eth_set_mc_addr_list_t set_mc_addr_list; > mtu_set_t mtu_set; /**< Set MTU */ Since eth_dev_ops is visible in application binary, it is part of the ABI. Therefore it can not be changed until 25.11 release.