From: Junlong Wang <wang.junlong1@zte.com.cn>
To: stephen@networkplumber.org
Cc: dev@dpdk.org, Junlong Wang <wang.junlong1@zte.com.cn>
Subject: [PATCH v4 09/15] net/zxdh: link info update, set link up/down
Date: Wed, 18 Dec 2024 17:25:56 +0800 [thread overview]
Message-ID: <20241218092603.1218855-10-wang.junlong1@zte.com.cn> (raw)
In-Reply-To: <20241218092603.1218855-1-wang.junlong1@zte.com.cn>
[-- Attachment #1.1.1: Type: text/plain, Size: 23805 bytes --]
provided link info update, set link up /down,
and link intr.
Signed-off-by: Junlong Wang <wang.junlong1@zte.com.cn>
---
doc/guides/nics/features/zxdh.ini | 2 +
doc/guides/nics/zxdh.rst | 3 +
drivers/net/zxdh/meson.build | 1 +
drivers/net/zxdh/zxdh_ethdev.c | 14 ++-
drivers/net/zxdh/zxdh_ethdev.h | 2 +
drivers/net/zxdh/zxdh_ethdev_ops.c | 166 ++++++++++++++++++++++++++++
drivers/net/zxdh/zxdh_ethdev_ops.h | 14 +++
drivers/net/zxdh/zxdh_msg.c | 57 ++++++++++
drivers/net/zxdh/zxdh_msg.h | 40 +++++++
drivers/net/zxdh/zxdh_np.c | 172 ++++++++++++++++++++++++++++-
drivers/net/zxdh/zxdh_np.h | 20 ++++
drivers/net/zxdh/zxdh_tables.c | 15 +++
drivers/net/zxdh/zxdh_tables.h | 6 +-
13 files changed, 503 insertions(+), 9 deletions(-)
create mode 100644 drivers/net/zxdh/zxdh_ethdev_ops.c
create mode 100644 drivers/net/zxdh/zxdh_ethdev_ops.h
diff --git a/doc/guides/nics/features/zxdh.ini b/doc/guides/nics/features/zxdh.ini
index bb44e93fad..7da3aaced1 100644
--- a/doc/guides/nics/features/zxdh.ini
+++ b/doc/guides/nics/features/zxdh.ini
@@ -10,3 +10,5 @@ ARMv8 = Y
SR-IOV = Y
Multiprocess aware = Y
Scattered Rx = Y
+Link status = Y
+Link status event = Y
diff --git a/doc/guides/nics/zxdh.rst b/doc/guides/nics/zxdh.rst
index f42db9c1f1..fdbc3b3923 100644
--- a/doc/guides/nics/zxdh.rst
+++ b/doc/guides/nics/zxdh.rst
@@ -21,6 +21,9 @@ Features of the ZXDH PMD are:
- Multiple queues for TX and RX
- SR-IOV VF
- Scattered and gather for TX and RX
+- Link Auto-negotiation
+- Link state information
+- Set Link down or up
Driver compilation and testing
diff --git a/drivers/net/zxdh/meson.build b/drivers/net/zxdh/meson.build
index 20b2cf484a..48f8f5e1ee 100644
--- a/drivers/net/zxdh/meson.build
+++ b/drivers/net/zxdh/meson.build
@@ -22,4 +22,5 @@ sources = files(
'zxdh_np.c',
'zxdh_tables.c',
'zxdh_rxtx.c',
+ 'zxdh_ethdev_ops.c',
)
diff --git a/drivers/net/zxdh/zxdh_ethdev.c b/drivers/net/zxdh/zxdh_ethdev.c
index 0d63129d8d..d3876ec9b3 100644
--- a/drivers/net/zxdh/zxdh_ethdev.c
+++ b/drivers/net/zxdh/zxdh_ethdev.c
@@ -16,6 +16,7 @@
#include "zxdh_np.h"
#include "zxdh_tables.h"
#include "zxdh_rxtx.h"
+#include "zxdh_ethdev_ops.h"
struct zxdh_hw_internal zxdh_hw_internal[RTE_MAX_ETHPORTS];
struct zxdh_shared_data *zxdh_shared_data;
@@ -105,12 +106,18 @@ static void
zxdh_devconf_intr_handler(void *param)
{
struct rte_eth_dev *dev = param;
+ struct zxdh_hw *hw = dev->data->dev_private;
+
+ uint8_t isr = zxdh_pci_isr(hw);
if (zxdh_intr_unmask(dev) < 0)
PMD_DRV_LOG(ERR, "interrupt enable failed");
+ if (isr & ZXDH_PCI_ISR_CONFIG) {
+ if (zxdh_dev_link_update(dev, 0) == 0)
+ rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_LSC, NULL);
+ }
}
-
/* Interrupt handler triggered by NIC for handling specific interrupt. */
static void
zxdh_fromriscv_intr_handler(void *param)
@@ -1006,6 +1013,8 @@ zxdh_dev_start(struct rte_eth_dev *dev)
vq = hw->vqs[logic_qidx];
zxdh_queue_notify(vq);
}
+ zxdh_dev_set_link_up(dev);
+
return 0;
}
@@ -1020,6 +1029,9 @@ static const struct eth_dev_ops zxdh_eth_dev_ops = {
.tx_queue_setup = zxdh_dev_tx_queue_setup,
.rx_queue_intr_enable = zxdh_dev_rx_queue_intr_enable,
.rx_queue_intr_disable = zxdh_dev_rx_queue_intr_disable,
+ .link_update = zxdh_dev_link_update,
+ .dev_set_link_up = zxdh_dev_set_link_up,
+ .dev_set_link_down = zxdh_dev_set_link_down,
};
static int32_t
diff --git a/drivers/net/zxdh/zxdh_ethdev.h b/drivers/net/zxdh/zxdh_ethdev.h
index b1f398b28e..c0b719062c 100644
--- a/drivers/net/zxdh/zxdh_ethdev.h
+++ b/drivers/net/zxdh/zxdh_ethdev.h
@@ -72,6 +72,7 @@ struct zxdh_hw {
uint64_t guest_features;
uint32_t max_queue_pairs;
uint32_t speed;
+ uint32_t speed_mode;
uint32_t notify_off_multiplier;
uint16_t *notify_base;
uint16_t pcie_id;
@@ -93,6 +94,7 @@ struct zxdh_hw {
uint8_t panel_id;
uint8_t has_tx_offload;
uint8_t has_rx_offload;
+ uint8_t admin_status;
};
struct zxdh_dtb_shared_data {
diff --git a/drivers/net/zxdh/zxdh_ethdev_ops.c b/drivers/net/zxdh/zxdh_ethdev_ops.c
new file mode 100644
index 0000000000..5a0af98cc0
--- /dev/null
+++ b/drivers/net/zxdh/zxdh_ethdev_ops.c
@@ -0,0 +1,166 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2024 ZTE Corporation
+ */
+
+#include "zxdh_ethdev.h"
+#include "zxdh_pci.h"
+#include "zxdh_msg.h"
+#include "zxdh_ethdev_ops.h"
+#include "zxdh_tables.h"
+#include "zxdh_logs.h"
+
+static int32_t zxdh_config_port_status(struct rte_eth_dev *dev, uint16_t link_status)
+{
+ struct zxdh_hw *hw = dev->data->dev_private;
+ struct zxdh_port_attr_table port_attr = {0};
+ struct zxdh_msg_info msg_info = {0};
+ int32_t ret = 0;
+
+ if (hw->is_pf) {
+ ret = zxdh_get_port_attr(hw->vfid, &port_attr);
+ if (ret) {
+ PMD_DRV_LOG(ERR, "write port_attr failed");
+ return -1;
+ }
+ port_attr.is_up = link_status;
+
+ ret = zxdh_set_port_attr(hw->vfid, &port_attr);
+ if (ret) {
+ PMD_DRV_LOG(ERR, "write port_attr failed");
+ return -1;
+ }
+ } else {
+ struct zxdh_port_attr_set_msg *port_attr_msg = &msg_info.data.port_attr_msg;
+
+ zxdh_msg_head_build(hw, ZXDH_PORT_ATTRS_SET, &msg_info);
+ port_attr_msg->mode = ZXDH_PORT_ATTR_IS_UP_FLAG;
+ port_attr_msg->value = link_status;
+ ret = zxdh_vf_send_msg_to_pf(dev, &msg_info, sizeof(msg_info), NULL, 0);
+ if (ret) {
+ PMD_DRV_LOG(ERR, "Failed to send msg: port 0x%x msg type %d",
+ hw->vport.vport, ZXDH_PORT_ATTR_IS_UP_FLAG);
+ return ret;
+ }
+ }
+ return ret;
+}
+
+static int32_t
+zxdh_link_info_get(struct rte_eth_dev *dev, struct rte_eth_link *link)
+{
+ struct zxdh_hw *hw = dev->data->dev_private;
+ struct zxdh_msg_info msg_info = {0};
+ struct zxdh_msg_reply_info reply_info = {0};
+ uint16_t status = 0;
+ int32_t ret = 0;
+
+ if (zxdh_pci_with_feature(hw, ZXDH_NET_F_STATUS))
+ zxdh_pci_read_dev_config(hw, offsetof(struct zxdh_net_config, status),
+ &status, sizeof(status));
+
+ link->link_status = status;
+
+ if (status == RTE_ETH_LINK_DOWN) {
+ link->link_speed = RTE_ETH_SPEED_NUM_UNKNOWN;
+ link->link_duplex = RTE_ETH_LINK_FULL_DUPLEX;
+ } else {
+ zxdh_agent_msg_build(hw, ZXDH_MAC_LINK_GET, &msg_info);
+
+ ret = zxdh_send_msg_to_riscv(dev, &msg_info, sizeof(struct zxdh_msg_info),
+ &reply_info, sizeof(struct zxdh_msg_reply_info),
+ ZXDH_BAR_MODULE_MAC);
+ if (ret) {
+ PMD_DRV_LOG(ERR, "Failed to send msg: port 0x%x msg type %d",
+ hw->vport.vport, ZXDH_MAC_LINK_GET);
+ return -1;
+ }
+ link->link_speed = reply_info.reply_body.link_msg.speed;
+ hw->speed_mode = reply_info.reply_body.link_msg.speed_modes;
+ if ((reply_info.reply_body.link_msg.duplex & RTE_ETH_LINK_FULL_DUPLEX) ==
+ RTE_ETH_LINK_FULL_DUPLEX)
+ link->link_duplex = RTE_ETH_LINK_FULL_DUPLEX;
+ else
+ link->link_duplex = RTE_ETH_LINK_HALF_DUPLEX;
+ }
+ hw->speed = link->link_speed;
+
+ return 0;
+}
+
+static int zxdh_set_link_status(struct rte_eth_dev *dev, uint8_t link_status)
+{
+ uint16_t curr_link_status = dev->data->dev_link.link_status;
+
+ struct rte_eth_link link;
+ struct zxdh_hw *hw = dev->data->dev_private;
+ int32_t ret = 0;
+
+ if (link_status == curr_link_status) {
+ PMD_DRV_LOG(DEBUG, "curr_link_status %u", curr_link_status);
+ return 0;
+ }
+
+ hw->admin_status = link_status;
+ ret = zxdh_link_info_get(dev, &link);
+ if (ret != 0) {
+ PMD_DRV_LOG(ERR, "Failed to get link status from hw");
+ return ret;
+ }
+ dev->data->dev_link.link_status = hw->admin_status & link.link_status;
+
+ if (dev->data->dev_link.link_status == RTE_ETH_LINK_UP) {
+ dev->data->dev_link.link_speed = link.link_speed;
+ dev->data->dev_link.link_duplex = link.link_duplex;
+ } else {
+ dev->data->dev_link.link_speed = RTE_ETH_SPEED_NUM_UNKNOWN;
+ dev->data->dev_link.link_duplex = RTE_ETH_LINK_FULL_DUPLEX;
+ }
+ return zxdh_config_port_status(dev, dev->data->dev_link.link_status);
+}
+
+int zxdh_dev_set_link_up(struct rte_eth_dev *dev)
+{
+ int ret = zxdh_set_link_status(dev, RTE_ETH_LINK_UP);
+
+ if (ret)
+ PMD_DRV_LOG(ERR, "Set link up failed, code:%d", ret);
+
+ return ret;
+}
+
+int32_t zxdh_dev_link_update(struct rte_eth_dev *dev, int32_t wait_to_complete __rte_unused)
+{
+ struct rte_eth_link link;
+ struct zxdh_hw *hw = dev->data->dev_private;
+ int32_t ret = 0;
+
+ memset(&link, 0, sizeof(link));
+ link.link_duplex = hw->duplex;
+ link.link_speed = hw->speed;
+ link.link_autoneg = RTE_ETH_LINK_AUTONEG;
+
+ ret = zxdh_link_info_get(dev, &link);
+ if (ret != 0) {
+ PMD_DRV_LOG(ERR, " Failed to get link status from hw");
+ return ret;
+ }
+ link.link_status &= hw->admin_status;
+ if (link.link_status == RTE_ETH_LINK_DOWN)
+ link.link_speed = RTE_ETH_SPEED_NUM_UNKNOWN;
+
+ ret = zxdh_config_port_status(dev, link.link_status);
+ if (ret != 0) {
+ PMD_DRV_LOG(ERR, "set port attr %d failed.", link.link_status);
+ return ret;
+ }
+ return rte_eth_linkstatus_set(dev, &link);
+}
+
+int zxdh_dev_set_link_down(struct rte_eth_dev *dev)
+{
+ int ret = zxdh_set_link_status(dev, RTE_ETH_LINK_DOWN);
+
+ if (ret)
+ PMD_DRV_LOG(ERR, "Set link down failed");
+ return ret;
+}
diff --git a/drivers/net/zxdh/zxdh_ethdev_ops.h b/drivers/net/zxdh/zxdh_ethdev_ops.h
new file mode 100644
index 0000000000..c6d6ca56fd
--- /dev/null
+++ b/drivers/net/zxdh/zxdh_ethdev_ops.h
@@ -0,0 +1,14 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2024 ZTE Corporation
+ */
+
+#ifndef ZXDH_ETHDEV_OPS_H
+#define ZXDH_ETHDEV_OPS_H
+
+#include "zxdh_ethdev.h"
+
+int zxdh_dev_set_link_up(struct rte_eth_dev *dev);
+int zxdh_dev_set_link_down(struct rte_eth_dev *dev);
+int32_t zxdh_dev_link_update(struct rte_eth_dev *dev, int32_t wait_to_complete __rte_unused);
+
+#endif /* ZXDH_ETHDEV_OPS_H */
diff --git a/drivers/net/zxdh/zxdh_msg.c b/drivers/net/zxdh/zxdh_msg.c
index aa2e10fd45..23a7ed2097 100644
--- a/drivers/net/zxdh/zxdh_msg.c
+++ b/drivers/net/zxdh/zxdh_msg.c
@@ -1134,6 +1134,51 @@ int zxdh_vf_send_msg_to_pf(struct rte_eth_dev *dev, void *msg_req,
return 0;
}
+int32_t zxdh_send_msg_to_riscv(struct rte_eth_dev *dev, void *msg_req,
+ uint16_t msg_req_len, void *reply, uint16_t reply_len,
+ enum ZXDH_BAR_MODULE_ID module_id)
+{
+ struct zxdh_hw *hw = dev->data->dev_private;
+ struct zxdh_pci_bar_msg in = {0};
+ struct zxdh_msg_recviver_mem result = {0};
+ struct zxdh_msg_reply_info reply_info = {0};
+
+ if (reply) {
+ RTE_ASSERT(reply_len < sizeof(zxdh_msg_reply_info));
+ result.recv_buffer = reply;
+ result.buffer_len = reply_len;
+ } else {
+ result.recv_buffer = &reply_info;
+ result.buffer_len = sizeof(reply_info);
+ }
+ struct zxdh_msg_reply_head *reply_head =
+ &(((struct zxdh_msg_reply_info *)result.recv_buffer)->reply_head);
+ struct zxdh_msg_reply_body *reply_body =
+ &(((struct zxdh_msg_reply_info *)result.recv_buffer)->reply_body);
+ in.payload_addr = &msg_req;
+ in.payload_len = msg_req_len;
+ in.virt_addr = (uint64_t)(hw->bar_addr[ZXDH_BAR0_INDEX] + ZXDH_CTRLCH_OFFSET);
+ in.src = hw->is_pf ? ZXDH_MSG_CHAN_END_PF : ZXDH_MSG_CHAN_END_VF;
+ in.dst = ZXDH_MSG_CHAN_END_RISC;
+ in.module_id = module_id;
+ in.src_pcieid = hw->pcie_id;
+ if (zxdh_bar_chan_sync_msg_send(&in, &result) != ZXDH_BAR_MSG_OK) {
+ PMD_MSG_LOG(ERR, "Failed to send sync messages or receive response");
+ return -1;
+ }
+ if (reply_head->flag != ZXDH_MSG_REPS_OK) {
+ PMD_MSG_LOG(ERR, "vf[%d] get pf reply failed: reply_head flag : 0x%x(0xff is OK).replylen %d",
+ hw->vport.vfid, reply_head->flag, reply_head->reps_len);
+ return -1;
+ }
+ if (reply_body->flag != ZXDH_REPS_SUCC) {
+ PMD_MSG_LOG(ERR, "vf[%d] msg processing failed", hw->vfid);
+ return -1;
+ }
+
+ return 0;
+}
+
void zxdh_msg_head_build(struct zxdh_hw *hw, enum zxdh_msg_type type,
struct zxdh_msg_info *msg_info)
{
@@ -1144,3 +1189,15 @@ void zxdh_msg_head_build(struct zxdh_hw *hw, enum zxdh_msg_type type,
msghead->vf_id = hw->vport.vfid;
msghead->pcieid = hw->pcie_id;
}
+
+void zxdh_agent_msg_build(struct zxdh_hw *hw, enum zxdh_agent_msg_type type,
+ struct zxdh_msg_info *msg_info)
+{
+ struct zxdh_agent_msg_head *agent_head = &msg_info->agent_msg_head;
+
+ agent_head->msg_type = type;
+ agent_head->panel_id = hw->panel_id;
+ agent_head->phyport = hw->phyport;
+ agent_head->vf_id = hw->vfid;
+ agent_head->pcie_id = hw->pcie_id;
+}
diff --git a/drivers/net/zxdh/zxdh_msg.h b/drivers/net/zxdh/zxdh_msg.h
index 613ca71170..a78075c914 100644
--- a/drivers/net/zxdh/zxdh_msg.h
+++ b/drivers/net/zxdh/zxdh_msg.h
@@ -164,11 +164,18 @@ enum pciebar_layout_type {
ZXDH_URI_MAX,
};
+/* riscv msg opcodes */
+enum zxdh_agent_msg_type {
+ ZXDH_MAC_LINK_GET = 14,
+};
+
enum zxdh_msg_type {
ZXDH_NULL = 0,
ZXDH_VF_PORT_INIT = 1,
ZXDH_VF_PORT_UNINIT = 2,
+ ZXDH_PORT_ATTRS_SET = 25,
+
ZXDH_MSG_TYPE_END,
};
@@ -261,6 +268,15 @@ struct zxdh_offset_get_msg {
uint16_t type;
};
+struct zxdh_link_info_msg {
+ uint8_t autoneg;
+ uint8_t link_state;
+ uint8_t blink_enable;
+ uint8_t duplex;
+ uint32_t speed_modes;
+ uint32_t speed;
+} __rte_packed;
+
struct zxdh_msg_reply_head {
uint8_t flag;
uint16_t reps_len;
@@ -276,6 +292,7 @@ struct zxdh_msg_reply_body {
enum zxdh_reps_flag flag;
union {
uint8_t reply_data[ZXDH_MSG_REPLY_BODY_MAX_LEN - sizeof(enum zxdh_reps_flag)];
+ struct zxdh_link_info_msg link_msg;
} __rte_packed;
} __rte_packed;
@@ -291,6 +308,12 @@ struct zxdh_vf_init_msg {
uint8_t rss_enable;
} __rte_packed;
+struct zxdh_port_attr_set_msg {
+ uint32_t mode;
+ uint32_t value;
+ uint8_t allmulti_follow;
+} __rte_packed;
+
struct zxdh_msg_head {
enum zxdh_msg_type msg_type;
uint16_t vport;
@@ -298,14 +321,26 @@ struct zxdh_msg_head {
uint16_t pcieid;
} __rte_packed;
+struct zxdh_agent_msg_head {
+ enum zxdh_agent_msg_type msg_type;
+ uint8_t panel_id;
+ uint8_t phyport;
+ uint8_t rsv;
+ uint16_t vf_id;
+ uint16_t pcie_id;
+} __rte_packed;
+
struct zxdh_msg_info {
union {
uint8_t head_len[ZXDH_MSG_HEAD_LEN];
struct zxdh_msg_head msg_head;
+ struct zxdh_agent_msg_head agent_msg_head;
};
union {
uint8_t datainfo[ZXDH_MSG_REQ_BODY_MAX_LEN];
struct zxdh_vf_init_msg vf_init_msg;
+ struct zxdh_port_attr_set_msg port_attr_msg;
+ struct zxdh_link_info_msg link_msg;
} __rte_packed data;
} __rte_packed;
@@ -326,5 +361,10 @@ void zxdh_msg_head_build(struct zxdh_hw *hw, enum zxdh_msg_type type,
struct zxdh_msg_info *msg_info);
int zxdh_vf_send_msg_to_pf(struct rte_eth_dev *dev, void *msg_req,
uint16_t msg_req_len, void *reply, uint16_t reply_len);
+void zxdh_agent_msg_build(struct zxdh_hw *hw, enum zxdh_agent_msg_type type,
+ struct zxdh_msg_info *msg_info);
+int32_t zxdh_send_msg_to_riscv(struct rte_eth_dev *dev, void *msg_req,
+ uint16_t msg_req_len, void *reply, uint16_t reply_len,
+ enum ZXDH_BAR_MODULE_ID module_id);
#endif /* ZXDH_MSG_H */
diff --git a/drivers/net/zxdh/zxdh_np.c b/drivers/net/zxdh/zxdh_np.c
index 99a7dc11b4..1f06539263 100644
--- a/drivers/net/zxdh/zxdh_np.c
+++ b/drivers/net/zxdh/zxdh_np.c
@@ -36,6 +36,10 @@ ZXDH_SDT_TBL_DATA_T g_sdt_info[ZXDH_DEV_CHANNEL_MAX][ZXDH_DEV_SDT_ID_MAX];
#define ZXDH_COMM_GET_BIT_MASK(_inttype_, _bitqnt_)\
((_inttype_)(((_bitqnt_) < 32)))
+#define ZXDH_COMM_UINT32_GET_BITS(_uidst_, _uisrc_, _uistartpos_, _uilen_)\
+ ((_uidst_) = (((_uisrc_) >> (_uistartpos_)) & \
+ (ZXDH_COMM_GET_BIT_MASK(uint32_t, (_uilen_)))))
+
#define ZXDH_REG_DATA_MAX (128)
#define ZXDH_COMM_CHECK_DEV_POINT(dev_id, point)\
@@ -1456,15 +1460,11 @@ zxdh_np_dtb_table_entry_write(uint32_t dev_id,
return rc;
}
-static uint32_t
+static void
zxdh_np_sdt_tbl_data_get(uint32_t dev_id, uint32_t sdt_no, ZXDH_SDT_TBL_DATA_T *p_sdt_data)
{
- uint32_t rc = 0;
-
p_sdt_data->data_high32 = g_sdt_info[dev_id][sdt_no].data_high32;
p_sdt_data->data_low32 = g_sdt_info[dev_id][sdt_no].data_low32;
-
- return rc;
}
int
@@ -1507,7 +1507,7 @@ zxdh_np_dtb_table_entry_delete(uint32_t dev_id,
pentry = delete_entries + entry_index;
sdt_no = pentry->sdt_no;
- rc = zxdh_np_sdt_tbl_data_get(dev_id, sdt_no, &sdt_tbl);
+ zxdh_np_sdt_tbl_data_get(dev_id, sdt_no, &sdt_tbl);
switch (tbl_type) {
case ZXDH_SDT_TBLT_ERAM:
{
@@ -1557,3 +1557,163 @@ zxdh_np_dtb_table_entry_delete(uint32_t dev_id,
rte_free(p_data_buff_ex);
return 0;
}
+
+static uint32_t
+zxdh_np_sdt_tbl_data_parser(uint32_t sdt_hig32, uint32_t sdt_low32, void *p_sdt_info)
+{
+ uint32_t tbl_type = 0;
+ uint32_t clutch_en = 0;
+
+ ZXDH_SDTTBL_ERAM_T *p_sdt_eram = NULL;
+ ZXDH_SDTTBL_PORTTBL_T *p_sdt_porttbl = NULL;
+
+ ZXDH_COMM_UINT32_GET_BITS(tbl_type, sdt_hig32,
+ ZXDH_SDT_H_TBL_TYPE_BT_POS, ZXDH_SDT_H_TBL_TYPE_BT_LEN);
+ ZXDH_COMM_UINT32_GET_BITS(clutch_en, sdt_low32, 0, 1);
+
+ switch (tbl_type) {
+ case ZXDH_SDT_TBLT_ERAM:
+ {
+ p_sdt_eram = (ZXDH_SDTTBL_ERAM_T *)p_sdt_info;
+ p_sdt_eram->table_type = tbl_type;
+ p_sdt_eram->eram_clutch_en = clutch_en;
+ break;
+ }
+
+ case ZXDH_SDT_TBLT_PORTTBL:
+ {
+ p_sdt_porttbl = (ZXDH_SDTTBL_PORTTBL_T *)p_sdt_info;
+ p_sdt_porttbl->table_type = tbl_type;
+ p_sdt_porttbl->porttbl_clutch_en = clutch_en;
+ break;
+ }
+ default:
+ {
+ PMD_DRV_LOG(ERR, "SDT table_type[ %d ] is invalid!", tbl_type);
+ return 1;
+ }
+ }
+
+ return 0;
+}
+
+static uint32_t
+zxdh_np_soft_sdt_tbl_get(uint32_t dev_id, uint32_t sdt_no, void *p_sdt_info)
+{
+ ZXDH_SDT_TBL_DATA_T sdt_tbl = {0};
+ uint32_t rc;
+
+ zxdh_np_sdt_tbl_data_get(dev_id, sdt_no, &sdt_tbl);
+
+ rc = zxdh_np_sdt_tbl_data_parser(sdt_tbl.data_high32, sdt_tbl.data_low32, p_sdt_info);
+ if (rc != 0)
+ PMD_DRV_LOG(ERR, "dpp sdt [%d] tbl_data_parser error.", sdt_no);
+
+ return rc;
+}
+
+static void
+zxdh_np_eram_index_cal(uint32_t eram_mode, uint32_t index,
+ uint32_t *p_row_index, uint32_t *p_col_index)
+{
+ uint32_t row_index = 0;
+ uint32_t col_index = 0;
+
+ switch (eram_mode) {
+ case ZXDH_ERAM128_TBL_128b:
+ {
+ row_index = index;
+ break;
+ }
+ case ZXDH_ERAM128_TBL_64b:
+ {
+ row_index = (index >> 1);
+ col_index = index & 0x1;
+ break;
+ }
+ case ZXDH_ERAM128_TBL_1b:
+ {
+ row_index = (index >> 7);
+ col_index = index & 0x7F;
+ break;
+ }
+ }
+ *p_row_index = row_index;
+ *p_col_index = col_index;
+}
+
+static uint32_t
+zxdh_np_dtb_eram_data_get(uint32_t dev_id, uint32_t queue_id, uint32_t sdt_no,
+ ZXDH_DTB_ERAM_ENTRY_INFO_T *p_dump_eram_entry)
+{
+ uint32_t index = p_dump_eram_entry->index;
+ uint32_t *p_data = p_dump_eram_entry->p_data;
+ ZXDH_SDTTBL_ERAM_T sdt_eram_info = {0};
+ uint32_t temp_data[4] = {0};
+ uint32_t row_index = 0;
+ uint32_t col_index = 0;
+ uint32_t rd_mode;
+ uint32_t rc;
+
+ rc = zxdh_np_soft_sdt_tbl_get(queue_id, sdt_no, &sdt_eram_info);
+ ZXDH_COMM_CHECK_DEV_RC(dev_id, rc, "dpp_soft_sdt_tbl_get");
+ rd_mode = sdt_eram_info.eram_mode;
+
+ zxdh_np_eram_index_cal(rd_mode, index, &row_index, &col_index);
+
+ switch (rd_mode) {
+ case ZXDH_ERAM128_TBL_128b:
+ {
+ memcpy(p_data, temp_data, (128 / 8));
+ break;
+ }
+ case ZXDH_ERAM128_TBL_64b:
+ {
+ memcpy(p_data, temp_data + ((1 - col_index) << 1), (64 / 8));
+ break;
+ }
+ case ZXDH_ERAM128_TBL_1b:
+ {
+ ZXDH_COMM_UINT32_GET_BITS(p_data[0], *(temp_data +
+ (3 - col_index / 32)), (col_index % 32), 1);
+ break;
+ }
+ }
+ return rc;
+}
+
+int
+zxdh_np_dtb_table_entry_get(uint32_t dev_id,
+ uint32_t queue_id,
+ ZXDH_DTB_USER_ENTRY_T *get_entry,
+ uint32_t srh_mode)
+{
+ ZXDH_SDT_TBL_DATA_T sdt_tbl = {0};
+ uint32_t tbl_type = 0;
+ uint32_t rc;
+ uint32_t sdt_no;
+
+ sdt_no = get_entry->sdt_no;
+ zxdh_np_sdt_tbl_data_get(srh_mode, sdt_no, &sdt_tbl);
+
+ ZXDH_COMM_UINT32_GET_BITS(tbl_type, sdt_tbl.data_high32,
+ ZXDH_SDT_H_TBL_TYPE_BT_POS, ZXDH_SDT_H_TBL_TYPE_BT_LEN);
+ switch (tbl_type) {
+ case ZXDH_SDT_TBLT_ERAM:
+ {
+ rc = zxdh_np_dtb_eram_data_get(dev_id,
+ queue_id,
+ sdt_no,
+ (ZXDH_DTB_ERAM_ENTRY_INFO_T *)get_entry->p_entry_data);
+ ZXDH_COMM_CHECK_RC_NO_ASSERT(rc, "dpp_dtb_eram_data_get");
+ break;
+ }
+ default:
+ {
+ PMD_DRV_LOG(ERR, "SDT table_type[ %d ] is invalid!", tbl_type);
+ return 1;
+ }
+ }
+
+ return 0;
+}
diff --git a/drivers/net/zxdh/zxdh_np.h b/drivers/net/zxdh/zxdh_np.h
index 42a652dd6b..ac3931ba65 100644
--- a/drivers/net/zxdh/zxdh_np.h
+++ b/drivers/net/zxdh/zxdh_np.h
@@ -514,11 +514,31 @@ typedef struct zxdh_sdt_tbl_data_t {
uint32_t data_low32;
} ZXDH_SDT_TBL_DATA_T;
+typedef struct zxdh_sdt_tbl_etcam_t {
+ uint32_t table_type;
+ uint32_t etcam_id;
+ uint32_t etcam_key_mode;
+ uint32_t etcam_table_id;
+ uint32_t no_as_rsp_mode;
+ uint32_t as_en;
+ uint32_t as_eram_baddr;
+ uint32_t as_rsp_mode;
+ uint32_t etcam_table_depth;
+ uint32_t etcam_clutch_en;
+} ZXDH_SDTTBL_ETCAM_T;
+
+typedef struct zxdh_sdt_tbl_porttbl_t {
+ uint32_t table_type;
+ uint32_t porttbl_clutch_en;
+} ZXDH_SDTTBL_PORTTBL_T;
+
int zxdh_np_host_init(uint32_t dev_id, ZXDH_DEV_INIT_CTRL_T *p_dev_init_ctrl);
int zxdh_np_online_uninit(uint32_t dev_id, char *port_name, uint32_t queue_id);
int zxdh_np_dtb_table_entry_write(uint32_t dev_id, uint32_t queue_id,
uint32_t entrynum, ZXDH_DTB_USER_ENTRY_T *down_entries);
int zxdh_np_dtb_table_entry_delete(uint32_t dev_id, uint32_t queue_id,
uint32_t entrynum, ZXDH_DTB_USER_ENTRY_T *delete_entries);
+int zxdh_np_dtb_table_entry_get(uint32_t dev_id, uint32_t queue_id,
+ ZXDH_DTB_USER_ENTRY_T *get_entry, uint32_t srh_mode);
#endif /* ZXDH_NP_H */
diff --git a/drivers/net/zxdh/zxdh_tables.c b/drivers/net/zxdh/zxdh_tables.c
index 9fd184e612..db0132ce3f 100644
--- a/drivers/net/zxdh/zxdh_tables.c
+++ b/drivers/net/zxdh/zxdh_tables.c
@@ -134,3 +134,18 @@ int zxdh_panel_table_init(struct rte_eth_dev *dev)
return ret;
}
+
+int
+zxdh_get_port_attr(uint16_t vfid, struct zxdh_port_attr_table *port_attr)
+{
+ int ret;
+
+ ZXDH_DTB_ERAM_ENTRY_INFO_T entry = {vfid, (uint32_t *)port_attr};
+ ZXDH_DTB_USER_ENTRY_T user_entry_get = {ZXDH_SDT_VPORT_ATT_TABLE, &entry};
+
+ ret = zxdh_np_dtb_table_entry_get(ZXDH_DEVICE_NO, g_dtb_data.queueid, &user_entry_get, 1);
+ if (ret != 0)
+ PMD_DRV_LOG(ERR, "get port_attr vfid:%d failed, ret:%d ", vfid, ret);
+
+ return ret;
+}
diff --git a/drivers/net/zxdh/zxdh_tables.h b/drivers/net/zxdh/zxdh_tables.h
index 5e9b36faee..8676a8b375 100644
--- a/drivers/net/zxdh/zxdh_tables.h
+++ b/drivers/net/zxdh/zxdh_tables.h
@@ -7,9 +7,10 @@
#include <stdint.h>
-extern struct zxdh_dtb_shared_data g_dtb_data;
-
#define ZXDH_DEVICE_NO 0
+#define ZXDH_PORT_ATTR_IS_UP_FLAG 35
+
+extern struct zxdh_dtb_shared_data g_dtb_data;
struct zxdh_port_attr_table {
#if RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN
@@ -145,5 +146,6 @@ int zxdh_port_attr_init(struct rte_eth_dev *dev);
int zxdh_panel_table_init(struct rte_eth_dev *dev);
int zxdh_set_port_attr(uint16_t vfid, struct zxdh_port_attr_table *port_attr);
int zxdh_port_attr_uninit(struct rte_eth_dev *dev);
+int zxdh_get_port_attr(uint16_t vfid, struct zxdh_port_attr_table *port_attr);
#endif /* ZXDH_TABLES_H */
--
2.27.0
[-- Attachment #1.1.2: Type: text/html , Size: 51008 bytes --]
next prev parent reply other threads:[~2024-12-18 9:35 UTC|newest]
Thread overview: 191+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-09-10 12:00 [PATCH v4] net/zxdh: Provided zxdh basic init Junlong Wang
2024-09-24 1:35 ` [v4] " Junlong Wang
2024-09-25 22:39 ` [PATCH v4] " Ferruh Yigit
2024-09-26 6:49 ` [v4] " Junlong Wang
2024-10-07 21:43 ` [PATCH v4] " Stephen Hemminger
2024-10-15 5:43 ` [PATCH v5 0/9] net/zxdh: introduce net zxdh driver Junlong Wang
2024-10-15 5:43 ` [PATCH v5 1/9] net/zxdh: add zxdh ethdev pmd driver Junlong Wang
2024-10-15 5:44 ` [PATCH v5 2/9] net/zxdh: add logging implementation Junlong Wang
2024-10-15 5:44 ` [PATCH v5 3/9] net/zxdh: add zxdh device pci init implementation Junlong Wang
2024-10-15 5:44 ` [PATCH v5 4/9] net/zxdh: add msg chan and msg hwlock init Junlong Wang
2024-10-15 5:44 ` [PATCH v5 5/9] net/zxdh: add msg chan enable implementation Junlong Wang
2024-10-15 5:44 ` [PATCH v5 6/9] net/zxdh: add zxdh get device backend infos Junlong Wang
2024-10-15 5:44 ` [PATCH v5 7/9] net/zxdh: add configure zxdh intr implementation Junlong Wang
2024-10-15 5:44 ` [PATCH v5 8/9] net/zxdh: add zxdh dev infos get ops Junlong Wang
2024-10-15 5:44 ` [PATCH v5 9/9] net/zxdh: add zxdh dev configure ops Junlong Wang
2024-10-15 15:37 ` Stephen Hemminger
2024-10-15 15:57 ` Stephen Hemminger
2024-10-16 8:16 ` [PATCH v6 0/9] net/zxdh: introduce net zxdh driver Junlong Wang
2024-10-16 8:16 ` [PATCH v6 1/9] net/zxdh: add zxdh ethdev pmd driver Junlong Wang
2024-10-16 8:18 ` [PATCH v6 2/9] net/zxdh: add logging implementation Junlong Wang
2024-10-16 8:18 ` [PATCH v6 3/9] net/zxdh: add zxdh device pci init implementation Junlong Wang
2024-10-16 8:18 ` [PATCH v6 4/9] net/zxdh: add msg chan and msg hwlock init Junlong Wang
2024-10-16 8:18 ` [PATCH v6 5/9] net/zxdh: add msg chan enable implementation Junlong Wang
2024-10-21 8:50 ` Thomas Monjalon
2024-10-21 10:56 ` Junlong Wang
2024-10-16 8:18 ` [PATCH v6 6/9] net/zxdh: add zxdh get device backend infos Junlong Wang
2024-10-21 8:52 ` Thomas Monjalon
2024-10-16 8:18 ` [PATCH v6 7/9] net/zxdh: add configure zxdh intr implementation Junlong Wang
2024-10-16 8:18 ` [PATCH v6 8/9] net/zxdh: add zxdh dev infos get ops Junlong Wang
2024-10-21 8:54 ` Thomas Monjalon
2024-10-16 8:18 ` [PATCH v6 9/9] net/zxdh: add zxdh dev configure ops Junlong Wang
2024-10-18 5:18 ` [v6,9/9] " Junlong Wang
2024-10-18 6:48 ` David Marchand
2024-10-19 11:17 ` Junlong Wang
2024-10-21 9:03 ` [PATCH v6 1/9] net/zxdh: add zxdh ethdev pmd driver Thomas Monjalon
2024-10-22 12:20 ` [PATCH v7 0/9] net/zxdh: introduce net zxdh driver Junlong Wang
2024-10-22 12:20 ` [PATCH v7 1/9] net/zxdh: add zxdh ethdev pmd driver Junlong Wang
2024-10-30 9:01 ` [PATCH v8 0/9] net/zxdh: introduce net zxdh driver Junlong Wang
2024-10-30 9:01 ` [PATCH v8 1/9] net/zxdh: add zxdh ethdev pmd driver Junlong Wang
2024-11-01 6:21 ` [PATCH v9 0/9] net/zxdh: introduce net zxdh driver Junlong Wang
2024-11-01 6:21 ` [PATCH v9 1/9] net/zxdh: add zxdh ethdev pmd driver Junlong Wang
2024-11-02 0:57 ` Ferruh Yigit
2024-11-04 11:58 ` [PATCH v10 00/10] net/zxdh: introduce net zxdh driver Junlong Wang
2024-11-04 11:58 ` [PATCH v10 01/10] net/zxdh: add zxdh ethdev pmd driver Junlong Wang
2024-11-07 10:32 ` [PATCH v10 00/10] net/zxdh: introduce net zxdh driver Junlong Wang
2024-11-12 0:42 ` Thomas Monjalon
2024-12-06 5:57 ` [PATCH v1 00/15] net/zxdh: updated " Junlong Wang
2024-12-06 5:57 ` [PATCH v1 01/15] net/zxdh: zxdh np init implementation Junlong Wang
2024-12-10 5:53 ` [PATCH v2 00/15] net/zxdh: updated net zxdh driver Junlong Wang
2024-12-10 5:53 ` [PATCH v2 01/15] net/zxdh: zxdh np init implementation Junlong Wang
2024-12-11 16:10 ` Stephen Hemminger
2024-12-12 2:06 ` Junlong Wang
2024-12-12 3:35 ` Junlong Wang
2024-12-17 11:41 ` [PATCH v3 00/15] net/zxdh: updated net zxdh driver Junlong Wang
2024-12-17 11:41 ` [PATCH v3 01/15] net/zxdh: zxdh np init implementation Junlong Wang
2024-12-17 11:41 ` [PATCH v3 02/15] net/zxdh: zxdh np uninit implementation Junlong Wang
2024-12-17 11:41 ` [PATCH v3 03/15] net/zxdh: port tables init implementations Junlong Wang
2024-12-17 11:41 ` [PATCH v3 04/15] net/zxdh: port tables unint implementations Junlong Wang
2024-12-17 11:41 ` [PATCH v3 05/15] net/zxdh: rx/tx queue setup and intr enable Junlong Wang
2024-12-17 11:41 ` [PATCH v3 06/15] net/zxdh: dev start/stop ops implementations Junlong Wang
2024-12-17 11:41 ` [PATCH v3 07/15] net/zxdh: provided dev simple tx implementations Junlong Wang
2024-12-17 11:41 ` [PATCH v3 08/15] net/zxdh: provided dev simple rx implementations Junlong Wang
2024-12-17 11:41 ` [PATCH v3 09/15] net/zxdh: link info update, set link up/down Junlong Wang
2024-12-17 11:41 ` [PATCH v3 10/15] net/zxdh: mac set/add/remove ops implementations Junlong Wang
2024-12-17 11:41 ` [PATCH v3 11/15] net/zxdh: promisc/allmulti " Junlong Wang
2024-12-17 11:41 ` [PATCH v3 12/15] net/zxdh: vlan filter/ offload " Junlong Wang
2024-12-17 11:41 ` [PATCH v3 13/15] net/zxdh: rss hash config/update, reta update/get Junlong Wang
2024-12-17 11:41 ` [PATCH v3 14/15] net/zxdh: basic stats ops implementations Junlong Wang
2024-12-17 11:41 ` [PATCH v3 15/15] net/zxdh: mtu update " Junlong Wang
2024-12-18 9:25 ` [PATCH v4 00/15] net/zxdh: updated net zxdh driver Junlong Wang
2024-12-18 9:25 ` [PATCH v4 01/15] net/zxdh: zxdh np init implementation Junlong Wang
2024-12-18 9:25 ` [PATCH v4 02/15] net/zxdh: zxdh np uninit implementation Junlong Wang
2024-12-18 9:25 ` [PATCH v4 03/15] net/zxdh: port tables init implementations Junlong Wang
2024-12-18 9:25 ` [PATCH v4 04/15] net/zxdh: port tables unint implementations Junlong Wang
2024-12-18 9:25 ` [PATCH v4 05/15] net/zxdh: rx/tx queue setup and intr enable Junlong Wang
2024-12-18 9:25 ` [PATCH v4 06/15] net/zxdh: dev start/stop ops implementations Junlong Wang
2024-12-21 0:51 ` Stephen Hemminger
2024-12-18 9:25 ` [PATCH v4 07/15] net/zxdh: provided dev simple tx implementations Junlong Wang
2024-12-18 9:25 ` [PATCH v4 08/15] net/zxdh: provided dev simple rx implementations Junlong Wang
2024-12-18 9:25 ` Junlong Wang [this message]
2024-12-18 9:25 ` [PATCH v4 10/15] net/zxdh: mac set/add/remove ops implementations Junlong Wang
2024-12-18 9:25 ` [PATCH v4 11/15] net/zxdh: promisc/allmulti " Junlong Wang
2024-12-18 9:25 ` [PATCH v4 12/15] net/zxdh: vlan filter/ offload " Junlong Wang
2024-12-18 9:26 ` [PATCH v4 13/15] net/zxdh: rss hash config/update, reta update/get Junlong Wang
2024-12-21 0:44 ` Stephen Hemminger
2024-12-18 9:26 ` [PATCH v4 14/15] net/zxdh: basic stats ops implementations Junlong Wang
2024-12-18 9:26 ` [PATCH v4 15/15] net/zxdh: mtu update " Junlong Wang
2024-12-21 0:33 ` Stephen Hemminger
2024-12-10 5:53 ` [PATCH v2 02/15] net/zxdh: zxdh np uninit implementation Junlong Wang
2024-12-13 19:38 ` Stephen Hemminger
2024-12-13 19:41 ` Stephen Hemminger
2024-12-13 19:41 ` Stephen Hemminger
2024-12-10 5:53 ` [PATCH v2 03/15] net/zxdh: port tables init implementations Junlong Wang
2024-12-13 19:42 ` Stephen Hemminger
2024-12-10 5:53 ` [PATCH v2 04/15] net/zxdh: port tables unint implementations Junlong Wang
2024-12-13 19:45 ` Stephen Hemminger
2024-12-13 19:48 ` Stephen Hemminger
2024-12-10 5:53 ` [PATCH v2 05/15] net/zxdh: rx/tx queue setup and intr enable Junlong Wang
2024-12-10 5:53 ` [PATCH v2 06/15] net/zxdh: dev start/stop ops implementations Junlong Wang
2024-12-13 21:05 ` Stephen Hemminger
2024-12-10 5:53 ` [PATCH v2 07/15] net/zxdh: provided dev simple tx implementations Junlong Wang
2024-12-10 5:53 ` [PATCH v2 08/15] net/zxdh: provided dev simple rx implementations Junlong Wang
2024-12-10 5:53 ` [PATCH v2 09/15] net/zxdh: link info update, set link up/down Junlong Wang
2024-12-13 19:57 ` Stephen Hemminger
2024-12-13 20:08 ` Stephen Hemminger
2024-12-10 5:53 ` [PATCH v2 10/15] net/zxdh: mac set/add/remove ops implementations Junlong Wang
2024-12-10 5:53 ` [PATCH v2 11/15] net/zxdh: promisc/allmulti " Junlong Wang
2024-12-10 5:53 ` [PATCH v2 12/15] net/zxdh: vlan filter/ offload " Junlong Wang
2024-12-10 5:53 ` [PATCH v2 13/15] net/zxdh: rss hash config/update, reta update/get Junlong Wang
2024-12-10 5:53 ` [PATCH v2 14/15] net/zxdh: basic stats ops implementations Junlong Wang
2024-12-10 5:53 ` [PATCH v2 15/15] net/zxdh: mtu update " Junlong Wang
2024-12-06 5:57 ` [PATCH v1 02/15] net/zxdh: zxdh np uninit implementation Junlong Wang
2024-12-06 5:57 ` [PATCH v1 03/15] net/zxdh: port tables init implementations Junlong Wang
2024-12-06 5:57 ` [PATCH v1 04/15] net/zxdh: port tables unint implementations Junlong Wang
2024-12-06 5:57 ` [PATCH v1 05/15] net/zxdh: rx/tx queue setup and intr enable Junlong Wang
2024-12-06 5:57 ` [PATCH v1 06/15] net/zxdh: dev start/stop ops implementations Junlong Wang
2024-12-06 5:57 ` [PATCH v1 07/15] net/zxdh: provided dev simple tx implementations Junlong Wang
2024-12-06 5:57 ` [PATCH v1 08/15] net/zxdh: provided dev simple rx implementations Junlong Wang
2024-12-06 5:57 ` [PATCH v1 09/15] net/zxdh: link info update, set link up/down Junlong Wang
2024-12-06 5:57 ` [PATCH v1 10/15] net/zxdh: mac set/add/remove ops implementations Junlong Wang
2024-12-06 5:57 ` [PATCH v1 11/15] net/zxdh: promiscuous/allmulticast " Junlong Wang
2024-12-06 5:57 ` [PATCH v1 12/15] net/zxdh: vlan filter, vlan offload " Junlong Wang
2024-12-06 5:57 ` [PATCH v1 13/15] net/zxdh: rss hash config/update, reta update/get Junlong Wang
2024-12-06 5:57 ` [PATCH v1 14/15] net/zxdh: basic stats ops implementations Junlong Wang
2024-12-06 5:57 ` [PATCH v1 15/15] net/zxdh: mtu update " Junlong Wang
2024-11-04 11:58 ` [PATCH v10 02/10] net/zxdh: add logging implementation Junlong Wang
2024-11-04 11:58 ` [PATCH v10 03/10] net/zxdh: add zxdh device pci init implementation Junlong Wang
2024-11-04 11:58 ` [PATCH v10 04/10] net/zxdh: add msg chan and msg hwlock init Junlong Wang
2024-11-04 11:58 ` [PATCH v10 05/10] net/zxdh: add msg chan enable implementation Junlong Wang
2024-11-04 11:58 ` [PATCH v10 06/10] net/zxdh: add zxdh get device backend infos Junlong Wang
2024-11-04 11:58 ` [PATCH v10 07/10] net/zxdh: add configure zxdh intr implementation Junlong Wang
2024-11-04 11:58 ` [PATCH v10 08/10] net/zxdh: add zxdh dev infos get ops Junlong Wang
2024-11-04 11:58 ` [PATCH v10 09/10] net/zxdh: add zxdh dev configure ops Junlong Wang
2024-11-04 11:58 ` [PATCH v10 10/10] net/zxdh: add zxdh dev close ops Junlong Wang
2024-11-06 0:40 ` [PATCH v10 00/10] net/zxdh: introduce net zxdh driver Ferruh Yigit
2024-11-07 9:28 ` Ferruh Yigit
2024-11-07 9:58 ` Ferruh Yigit
2024-11-12 2:49 ` Junlong Wang
2024-11-01 6:21 ` [PATCH v9 2/9] net/zxdh: add logging implementation Junlong Wang
2024-11-02 1:02 ` Ferruh Yigit
2024-11-04 2:44 ` [v9,2/9] " Junlong Wang
2024-11-01 6:21 ` [PATCH v9 3/9] net/zxdh: add zxdh device pci init implementation Junlong Wang
2024-11-02 1:01 ` Ferruh Yigit
2024-11-01 6:21 ` [PATCH v9 4/9] net/zxdh: add msg chan and msg hwlock init Junlong Wang
2024-11-02 1:00 ` Ferruh Yigit
2024-11-04 2:47 ` Junlong Wang
2024-11-01 6:21 ` [PATCH v9 5/9] net/zxdh: add msg chan enable implementation Junlong Wang
2024-11-01 6:21 ` [PATCH v9 6/9] net/zxdh: add zxdh get device backend infos Junlong Wang
2024-11-02 1:06 ` Ferruh Yigit
2024-11-04 3:30 ` [v9,6/9] " Junlong Wang
2024-11-01 6:21 ` [PATCH v9 7/9] net/zxdh: add configure zxdh intr implementation Junlong Wang
2024-11-02 1:07 ` Ferruh Yigit
2024-11-01 6:21 ` [PATCH v9 8/9] net/zxdh: add zxdh dev infos get ops Junlong Wang
2024-11-01 6:21 ` [PATCH v9 9/9] net/zxdh: add zxdh dev configure ops Junlong Wang
2024-11-02 0:56 ` [PATCH v9 0/9] net/zxdh: introduce net zxdh driver Ferruh Yigit
2024-11-04 2:42 ` Junlong Wang
2024-11-04 8:46 ` Ferruh Yigit
2024-11-04 9:52 ` David Marchand
2024-11-04 11:46 ` Junlong Wang
2024-11-04 22:47 ` Thomas Monjalon
2024-11-05 9:39 ` Junlong Wang
2024-11-06 0:38 ` Ferruh Yigit
2024-10-30 9:01 ` [PATCH v8 2/9] net/zxdh: add logging implementation Junlong Wang
2024-10-30 9:01 ` [PATCH v8 3/9] net/zxdh: add zxdh device pci init implementation Junlong Wang
2024-10-30 14:55 ` David Marchand
2024-10-30 9:01 ` [PATCH v8 4/9] net/zxdh: add msg chan and msg hwlock init Junlong Wang
2024-10-30 9:01 ` [PATCH v8 5/9] net/zxdh: add msg chan enable implementation Junlong Wang
2024-10-30 9:01 ` [PATCH v8 6/9] net/zxdh: add zxdh get device backend infos Junlong Wang
2024-10-30 9:01 ` [PATCH v8 7/9] net/zxdh: add configure zxdh intr implementation Junlong Wang
2024-10-30 9:01 ` [PATCH v8 8/9] net/zxdh: add zxdh dev infos get ops Junlong Wang
2024-10-30 9:01 ` [PATCH v8 9/9] net/zxdh: add zxdh dev configure ops Junlong Wang
2024-10-22 12:20 ` [PATCH v7 2/9] net/zxdh: add logging implementation Junlong Wang
2024-10-22 12:20 ` [PATCH v7 3/9] net/zxdh: add zxdh device pci init implementation Junlong Wang
2024-10-27 16:47 ` Stephen Hemminger
2024-10-27 16:47 ` Stephen Hemminger
2024-10-22 12:20 ` [PATCH v7 4/9] net/zxdh: add msg chan and msg hwlock init Junlong Wang
2024-10-22 12:20 ` [PATCH v7 5/9] net/zxdh: add msg chan enable implementation Junlong Wang
2024-10-26 17:05 ` Thomas Monjalon
2024-10-22 12:20 ` [PATCH v7 6/9] net/zxdh: add zxdh get device backend infos Junlong Wang
2024-10-22 12:20 ` [PATCH v7 7/9] net/zxdh: add configure zxdh intr implementation Junlong Wang
2024-10-27 17:07 ` Stephen Hemminger
2024-10-22 12:20 ` [PATCH v7 8/9] net/zxdh: add zxdh dev infos get ops Junlong Wang
2024-10-22 12:20 ` [PATCH v7 9/9] net/zxdh: add zxdh dev configure ops Junlong Wang
2024-10-24 11:31 ` [v7,9/9] " Junlong Wang
2024-10-25 9:48 ` Junlong Wang
2024-10-26 2:32 ` Junlong Wang
2024-10-27 16:40 ` [PATCH v7 9/9] " Stephen Hemminger
2024-10-27 17:03 ` Stephen Hemminger
2024-10-27 16:58 ` Stephen Hemminger
2024-12-19 22:38 ` [PATCH v4] net/zxdh: Provided zxdh basic init Stephen Hemminger
2024-12-20 1:47 ` Junlong Wang
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20241218092603.1218855-10-wang.junlong1@zte.com.cn \
--to=wang.junlong1@zte.com.cn \
--cc=dev@dpdk.org \
--cc=stephen@networkplumber.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).