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[204.195.96.226]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-2f2ee26d89asm30616836a91.46.2025.01.03.10.58.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 03 Jan 2025 10:58:54 -0800 (PST) Date: Fri, 3 Jan 2025 10:58:51 -0800 From: Stephen Hemminger To: "WanRenyong" Cc: , , , , , , , , , Subject: Re: [PATCH v4 02/15] net/xsc: add xsc device initialization Message-ID: <20250103105851.1dde1210@pi5> In-Reply-To: <20250103150407.1529663-3-wanry@yunsilicon.com> References: <20250103150404.1529663-1-wanry@yunsilicon.com> <20250103150407.1529663-3-wanry@yunsilicon.com> X-Mailer: Claws Mail 4.1.1 (GTK 3.24.38; aarch64-unknown-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org On Fri, 03 Jan 2025 23:04:08 +0800 "WanRenyong" wrote: > +struct xsc_hwinfo { > + uint8_t valid; /* 1: current phy info is valid, 0 : invalid */ > + uint32_t pcie_no; /* pcie number , 0 or 1 */ > + uint32_t func_id; /* pf glb func id */ > + uint32_t pcie_host; /* host pcie number */ > + uint32_t mac_phy_port; /* mac port */ > + uint32_t funcid_to_logic_port_off; /* port func id offset */ > + uint16_t lag_id; > + uint16_t raw_qp_id_base; > + uint16_t raw_rss_qp_id_base; > + uint16_t pf0_vf_funcid_base; > + uint16_t pf0_vf_funcid_top; > + uint16_t pf1_vf_funcid_base; > + uint16_t pf1_vf_funcid_top; > + uint16_t pcie0_pf_funcid_base; > + uint16_t pcie0_pf_funcid_top; > + uint16_t pcie1_pf_funcid_base; > + uint16_t pcie1_pf_funcid_top; > + uint16_t lag_port_start; > + uint16_t raw_tpe_qp_num; > + int send_seg_num; > + int recv_seg_num; > + uint8_t on_chip_tbl_vld; > + uint8_t dma_rw_tbl_vld; > + uint8_t pct_compress_vld; > + uint32_t chip_version; > + uint32_t hca_core_clock; > + uint8_t mac_bit; > + uint8_t esw_mode; > +}; Can you rearrange elements in this structure so there are less holes? Or is it shared with the hardware. Unless you need negative value as a sentinel, avoid use of int where unsigned could be used for seg_num.