From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 96D1645FD7; Fri, 3 Jan 2025 16:04:22 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 93382402D7; Fri, 3 Jan 2025 16:04:18 +0100 (CET) Received: from lf-2-59.ptr.blmpb.com (lf-2-59.ptr.blmpb.com [101.36.218.59]) by mails.dpdk.org (Postfix) with ESMTP id 6E2D440278 for ; Fri, 3 Jan 2025 16:04:15 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; s=feishu2403070942; d=yunsilicon.com; t=1735916650; h=from:subject: mime-version:from:date:message-id:subject:to:cc:reply-to:content-type: mime-version:in-reply-to:message-id; bh=/RYBVtcQsEsx/uMiez9kglagVmZ5A8ZAkcyxt+B2opk=; b=T8rXguUeudiU8449c8iRMmm5rctrQOCZrb77G0/i1sQfs2DxaSywiAYcW/DXV66e2IuhEd mCyBAv+s0GRJ83me/I+FaPUeKMWo4nNynUiiNWh0XAI5qkigoSTO9fJmOR0nEFUo3Ul9r0 xQTj1L577OTAlADMIJLdxwc3O8FvzgVQ6aoYS3jSP2vqOMHAKqxuLdHHJQZ5t2z8InYUZW DV4s0t5T7BoQwRpzlx/CZBcJuXzSlo38DyM7ngzD9BmSGGeYX0o0EGrsIvsMCmz4pmZrev Wm81ADwXaHv384gsG5UdI3NlDjxXoz3t3/QRV1brMp6u5UfKmr771UzIfySeyw== To: Cc: , , , , , , , , , Received: from ubuntu-liun.yunsilicon.com ([58.34.192.114]) by smtp.feishu.cn with ESMTPS; Fri, 03 Jan 2025 23:04:08 +0800 Mime-Version: 1.0 References: <20250103150404.1529663-1-wanry@yunsilicon.com> X-Original-From: WanRenyong From: "WanRenyong" Subject: [PATCH v4 02/15] net/xsc: add xsc device initialization Content-Type: text/plain; charset=UTF-8 In-Reply-To: <20250103150404.1529663-1-wanry@yunsilicon.com> X-Mailer: git-send-email 2.25.1 Content-Transfer-Encoding: 7bit Date: Fri, 03 Jan 2025 23:04:08 +0800 Message-Id: <20250103150407.1529663-3-wanry@yunsilicon.com> X-Lms-Return-Path: X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org XSC device is a hardware abstract level device serving as a handle to interact with hardware. Signed-off-by: WanRenyong --- drivers/net/xsc/meson.build | 1 + drivers/net/xsc/xsc_defs.h | 16 ++++ drivers/net/xsc/xsc_dev.c | 181 +++++++++++++++++++++++++++++++++++ drivers/net/xsc/xsc_dev.h | 131 +++++++++++++++++++++++++ drivers/net/xsc/xsc_ethdev.c | 16 +++- drivers/net/xsc/xsc_ethdev.h | 3 + 6 files changed, 347 insertions(+), 1 deletion(-) create mode 100644 drivers/net/xsc/xsc_dev.c create mode 100644 drivers/net/xsc/xsc_dev.h diff --git a/drivers/net/xsc/meson.build b/drivers/net/xsc/meson.build index 84a09a23de..683a1f6632 100644 --- a/drivers/net/xsc/meson.build +++ b/drivers/net/xsc/meson.build @@ -8,4 +8,5 @@ endif sources = files( 'xsc_ethdev.c', + 'xsc_dev.c', ) diff --git a/drivers/net/xsc/xsc_defs.h b/drivers/net/xsc/xsc_defs.h index 7c91d3443f..60244425cd 100644 --- a/drivers/net/xsc/xsc_defs.h +++ b/drivers/net/xsc/xsc_defs.h @@ -12,4 +12,20 @@ #define XSC_PCI_DEV_ID_MVHVF 0x1152 #define XSC_PCI_DEV_ID_MVS 0x1153 +#define XSC_VFREP_BASE_LOGICAL_PORT 1081 + +enum xsc_nic_mode { + XSC_NIC_MODE_LEGACY, + XSC_NIC_MODE_SWITCHDEV, + XSC_NIC_MODE_SOC, +}; + +enum xsc_pph_type { + XSC_PPH_NONE = 0, + XSC_RX_PPH = 0x1, + XSC_TX_PPH = 0x2, + XSC_VFREP_PPH = 0x4, + XSC_UPLINK_PPH = 0x8, +}; + #endif /* XSC_DEFS_H_ */ diff --git a/drivers/net/xsc/xsc_dev.c b/drivers/net/xsc/xsc_dev.c new file mode 100644 index 0000000000..1b8a84baa6 --- /dev/null +++ b/drivers/net/xsc/xsc_dev.c @@ -0,0 +1,181 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright 2025 Yunsilicon Technology Co., Ltd. + */ + +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include + +#include "xsc_log.h" +#include "xsc_defs.h" +#include "xsc_dev.h" + +#define XSC_DEV_DEF_FLOW_MODE 7 + +TAILQ_HEAD(xsc_dev_ops_list, xsc_dev_ops); +static struct xsc_dev_ops_list dev_ops_list = TAILQ_HEAD_INITIALIZER(dev_ops_list); + +static const struct xsc_dev_ops * +xsc_dev_ops_get(enum rte_pci_kernel_driver kdrv) +{ + const struct xsc_dev_ops *ops; + + TAILQ_FOREACH(ops, &dev_ops_list, entry) { + if (ops->kdrv == kdrv) + return ops; + } + + return NULL; +} + +void +xsc_dev_ops_register(struct xsc_dev_ops *new_ops) +{ + struct xsc_dev_ops *ops; + + TAILQ_FOREACH(ops, &dev_ops_list, entry) { + if (ops->kdrv == new_ops->kdrv) { + PMD_DRV_LOG(ERR, "xsc dev ops exists, kdrv=%d", new_ops->kdrv); + return; + } + } + + TAILQ_INSERT_TAIL(&dev_ops_list, new_ops, entry); +} + +int +xsc_dev_close(struct xsc_dev *xdev, int __rte_unused repr_id) +{ + return xdev->dev_ops->dev_close(xdev); +} + +static int +xsc_dev_alloc_vfos_info(struct xsc_dev *xdev) +{ + struct xsc_hwinfo *hwinfo; + int base_lp = 0; + + if (xsc_dev_is_vf(xdev)) + return 0; + + hwinfo = &xdev->hwinfo; + if (hwinfo->pcie_no == 1) { + xdev->vfrep_offset = hwinfo->func_id - + hwinfo->pcie1_pf_funcid_base + + hwinfo->pcie0_pf_funcid_top - + hwinfo->pcie0_pf_funcid_base + 1; + } else { + xdev->vfrep_offset = hwinfo->func_id - hwinfo->pcie0_pf_funcid_base; + } + + base_lp = XSC_VFREP_BASE_LOGICAL_PORT; + if (xdev->devargs.nic_mode == XSC_NIC_MODE_LEGACY) + base_lp += xdev->vfrep_offset; + xdev->vfos_logical_in_port = base_lp; + return 0; +} + +static void +xsc_dev_args_parse(struct xsc_dev *xdev, struct rte_devargs *devargs) +{ + struct rte_kvargs *kvlist; + struct xsc_devargs *xdevargs = &xdev->devargs; + const char *tmp; + + kvlist = rte_kvargs_parse(devargs->args, NULL); + if (kvlist == NULL) + return; + + tmp = rte_kvargs_get(kvlist, XSC_PPH_MODE_ARG); + if (tmp != NULL) + xdevargs->pph_mode = atoi(tmp); + else + xdevargs->pph_mode = XSC_PPH_NONE; + + tmp = rte_kvargs_get(kvlist, XSC_NIC_MODE_ARG); + if (tmp != NULL) + xdevargs->nic_mode = atoi(tmp); + else + xdevargs->nic_mode = XSC_NIC_MODE_LEGACY; + + tmp = rte_kvargs_get(kvlist, XSC_FLOW_MODE_ARG); + if (tmp != NULL) + xdevargs->flow_mode = atoi(tmp); + else + xdevargs->flow_mode = XSC_DEV_DEF_FLOW_MODE; + + rte_kvargs_free(kvlist); +} + +void +xsc_dev_uninit(struct xsc_dev *xdev) +{ + PMD_INIT_FUNC_TRACE(); + xsc_dev_close(xdev, XSC_DEV_REPR_ID_INVALID); + rte_free(xdev); +} + +int +xsc_dev_init(struct rte_pci_device *pci_dev, struct xsc_dev **xdev) +{ + struct xsc_dev *d; + int ret; + + PMD_INIT_FUNC_TRACE(); + + d = rte_zmalloc(NULL, sizeof(*d), RTE_CACHE_LINE_SIZE); + if (d == NULL) { + PMD_DRV_LOG(ERR, "Failed to alloc memory for xsc_dev"); + return -ENOMEM; + } + + d->dev_ops = xsc_dev_ops_get(pci_dev->kdrv); + if (d->dev_ops == NULL) { + PMD_DRV_LOG(ERR, "Could not get dev_ops, kdrv=%d", pci_dev->kdrv); + return -ENODEV; + } + + d->pci_dev = pci_dev; + + if (d->dev_ops->dev_init) + d->dev_ops->dev_init(d); + + xsc_dev_args_parse(d, pci_dev->device.devargs); + + ret = xsc_dev_alloc_vfos_info(d); + if (ret) { + PMD_DRV_LOG(ERR, "Failed to alloc vfos info"); + ret = -EINVAL; + goto hwinfo_init_fail; + } + + *xdev = d; + + return 0; + +hwinfo_init_fail: + xsc_dev_uninit(d); + return ret; +} + +bool +xsc_dev_is_vf(struct xsc_dev *xdev) +{ + uint16_t devic_id = xdev->pci_dev->id.device_id; + + if (devic_id == XSC_PCI_DEV_ID_MSVF || + devic_id == XSC_PCI_DEV_ID_MVHVF) + return true; + + return false; +} diff --git a/drivers/net/xsc/xsc_dev.h b/drivers/net/xsc/xsc_dev.h new file mode 100644 index 0000000000..7eae78d9bf --- /dev/null +++ b/drivers/net/xsc/xsc_dev.h @@ -0,0 +1,131 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright 2025 Yunsilicon Technology Co., Ltd. + */ + +#ifndef _XSC_DEV_H_ +#define _XSC_DEV_H_ + +#include +#include +#include +#include +#include +#include + +#include "xsc_defs.h" +#include "xsc_log.h" + +#define XSC_PPH_MODE_ARG "pph_mode" +#define XSC_NIC_MODE_ARG "nic_mode" +#define XSC_FLOW_MODE_ARG "flow_mode" + +#define XSC_FUNCID_TYPE_MASK 0x1c000 +#define XSC_FUNCID_MASK 0x3fff + +#define XSC_DEV_PCT_IDX_INVALID 0xFFFFFFFF +#define XSC_DEV_REPR_ID_INVALID 0x7FFFFFFF + +struct xsc_hwinfo { + uint8_t valid; /* 1: current phy info is valid, 0 : invalid */ + uint32_t pcie_no; /* pcie number , 0 or 1 */ + uint32_t func_id; /* pf glb func id */ + uint32_t pcie_host; /* host pcie number */ + uint32_t mac_phy_port; /* mac port */ + uint32_t funcid_to_logic_port_off; /* port func id offset */ + uint16_t lag_id; + uint16_t raw_qp_id_base; + uint16_t raw_rss_qp_id_base; + uint16_t pf0_vf_funcid_base; + uint16_t pf0_vf_funcid_top; + uint16_t pf1_vf_funcid_base; + uint16_t pf1_vf_funcid_top; + uint16_t pcie0_pf_funcid_base; + uint16_t pcie0_pf_funcid_top; + uint16_t pcie1_pf_funcid_base; + uint16_t pcie1_pf_funcid_top; + uint16_t lag_port_start; + uint16_t raw_tpe_qp_num; + int send_seg_num; + int recv_seg_num; + uint8_t on_chip_tbl_vld; + uint8_t dma_rw_tbl_vld; + uint8_t pct_compress_vld; + uint32_t chip_version; + uint32_t hca_core_clock; + uint8_t mac_bit; + uint8_t esw_mode; +}; + +struct xsc_devargs { + int nic_mode; + int flow_mode; + int pph_mode; +}; + +struct xsc_repr_info { + int repr_id; + enum xsc_port_type port_type; + int pf_bond; + + uint32_t ifindex; + const char *phys_dev_name; + uint32_t funcid; + + uint16_t logical_port; + uint16_t local_dstinfo; + uint16_t peer_logical_port; + uint16_t peer_dstinfo; +}; + +struct xsc_repr_port { + struct xsc_dev *xdev; + struct xsc_repr_info info; + void *drv_data; + struct xsc_dev_pct_list def_pct_list; +}; + +struct xsc_dev_config { + uint8_t pph_flag; + uint8_t hw_csum; + uint8_t tso; + uint32_t tso_max_payload_sz; +}; + +struct xsc_dev { + struct rte_pci_device *pci_dev; + const struct xsc_dev_ops *dev_ops; + struct xsc_devargs devargs; + struct xsc_hwinfo hwinfo; + struct rte_eth_link pf_dev_link; + uint32_t link_speed_capa; + int vfos_logical_in_port; + int vfrep_offset; + + struct rte_intr_handle *intr_handle; + struct xsc_repr_port *repr_ports; + int num_repr_ports; /* PF and VF representor ports num */ + int ifindex; + int port_id; /* Probe dev */ + void *dev_priv; + char name[RTE_ETH_NAME_MAX_LEN]; + void *bar_addr; + void *jumbo_buffer_pa; + void *jumbo_buffer_va; + uint64_t bar_len; + int ctrl_fd; +}; + +struct xsc_dev_ops { + TAILQ_ENTRY(xsc_dev_ops) entry; + enum rte_pci_kernel_driver kdrv; + int (*dev_init)(struct xsc_dev *xdev); + int (*dev_close)(struct xsc_dev *xdev); +}; + +void xsc_dev_ops_register(struct xsc_dev_ops *new_ops); +int xsc_dev_init(struct rte_pci_device *pci_dev, struct xsc_dev **dev); +void xsc_dev_uninit(struct xsc_dev *xdev); +int xsc_dev_close(struct xsc_dev *xdev, int repr_id); +bool xsc_dev_is_vf(struct xsc_dev *xdev); + +#endif /* _XSC_DEV_H_ */ diff --git a/drivers/net/xsc/xsc_ethdev.c b/drivers/net/xsc/xsc_ethdev.c index a7dca46127..4bdc70507f 100644 --- a/drivers/net/xsc/xsc_ethdev.c +++ b/drivers/net/xsc/xsc_ethdev.c @@ -13,22 +13,32 @@ static int xsc_ethdev_init(struct rte_eth_dev *eth_dev) { struct xsc_ethdev_priv *priv = TO_XSC_ETHDEV_PRIV(eth_dev); + int ret; PMD_INIT_FUNC_TRACE(); priv->eth_dev = eth_dev; priv->pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev); + ret = xsc_dev_init(priv->pci_dev, &priv->xdev); + if (ret) { + PMD_DRV_LOG(ERR, "Failed to initialize xsc device"); + return ret; + } + priv->xdev->port_id = eth_dev->data->port_id; + return 0; } static int xsc_ethdev_uninit(struct rte_eth_dev *eth_dev) { - RTE_SET_USED(eth_dev); + struct xsc_ethdev_priv *priv = TO_XSC_ETHDEV_PRIV(eth_dev); PMD_INIT_FUNC_TRACE(); + xsc_dev_uninit(priv->xdev); + return 0; } @@ -84,6 +94,10 @@ static struct rte_pci_driver xsc_ethdev_pci_driver = { RTE_PMD_REGISTER_PCI(net_xsc, xsc_ethdev_pci_driver); RTE_PMD_REGISTER_PCI_TABLE(net_xsc, xsc_ethdev_pci_id_map); +RTE_PMD_REGISTER_PARAM_STRING(net_xsc, + XSC_PPH_MODE_ARG "=" + XSC_NIC_MODE_ARG "=" + XSC_FLOW_MODE_ARG "="); RTE_LOG_REGISTER_SUFFIX(xsc_logtype_init, init, NOTICE); RTE_LOG_REGISTER_SUFFIX(xsc_logtype_driver, driver, NOTICE); diff --git a/drivers/net/xsc/xsc_ethdev.h b/drivers/net/xsc/xsc_ethdev.h index 508f5a86de..05040f8865 100644 --- a/drivers/net/xsc/xsc_ethdev.h +++ b/drivers/net/xsc/xsc_ethdev.h @@ -5,9 +5,12 @@ #ifndef _XSC_ETHDEV_H_ #define _XSC_ETHDEV_H_ +#include "xsc_dev.h" + struct xsc_ethdev_priv { struct rte_eth_dev *eth_dev; struct rte_pci_device *pci_dev; + struct xsc_dev *xdev; }; #define TO_XSC_ETHDEV_PRIV(dev) ((struct xsc_ethdev_priv *)(dev)->data->dev_private) -- 2.25.1