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* [PATCH v1] common/iavf: introduce hardware clock ID in PTP caps
@ 2025-01-15  7:23 Soumyadeep Hore
  0 siblings, 0 replies; only message in thread
From: Soumyadeep Hore @ 2025-01-15  7:23 UTC (permalink / raw)
  To: bruce.richardson, aman.deep.singh; +Cc: dev, Jun Zhang

From: Jun Zhang <xuejun.zhang@intel.com>

When there are at least two VFs on a single adapter and both are used in
the same VM, each of them will register its own PTP clock. However, every
E810/E822 adapter has only one PHC clock that we use. In order to register
only one PTP clock, VFs need to identify HW and make sure they come from
the same board.

This patch adds a @hardware_clock_id that helps in this identification.
VFs from the same board should receive the same @hardware_clock_id and VFs
from two different boards should receive different IDs.

Signed-off-by: Jun Zhang <xuejun.zhang@intel.com>
Signed-off-by: Soumyadeep Hore <soumyadeep.hore@intel.com>
---
 drivers/common/iavf/virtchnl.h | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/common/iavf/virtchnl.h b/drivers/common/iavf/virtchnl.h
index c0d52ddd32..f4ca2cc9f0 100644
--- a/drivers/common/iavf/virtchnl.h
+++ b/drivers/common/iavf/virtchnl.h
@@ -2224,6 +2224,7 @@ VIRTCHNL_CHECK_STRUCT_LEN(12, virtchnl_quanta_cfg);
 #define VIRTCHNL_1588_PTP_CAP_PHC_REGS		BIT(4)
 #define VIRTCHNL_1588_PTP_CAP_SYNCE			BIT(6)
 #define VIRTCHNL_1588_PTP_CAP_GNSS			BIT(7)
+#define VIRTCHNL_1588_PTP_CAP_HARDWARE_CLOCK_ID	BIT(8)
 
 struct virtchnl_phc_regs {
 	u32 clock_hi;
@@ -2248,7 +2249,8 @@ struct virtchnl_ptp_caps {
 	u8 n_per_out;
 	u8 n_pins;
 	u8 tx_tstamp_format;
-	u8 rsvd[11];
+	u8 hardware_clock_id;
+	u8 rsvd[10];
 };
 
 VIRTCHNL_CHECK_STRUCT_LEN(48, virtchnl_ptp_caps);
-- 
2.43.0


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