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Mon, 27 Jan 2025 23:54:24 -0800 From: Maayan Kashani To: CC: , , , , Bing Zhao , Viacheslav Ovsiienko , Ori Kam , Suanming Mou , Matan Azrad Subject: [PATCH 2/3] net/mlx5: fix crash in non template metadata split Date: Tue, 28 Jan 2025 09:54:04 +0200 Message-ID: <20250128075406.175330-3-mkashani@nvidia.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20250128075406.175330-1-mkashani@nvidia.com> References: <20250128075406.175330-1-mkashani@nvidia.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-NV-OnPremToCloud: AnonymousSubmission X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BL02EPF00029929:EE_|DM6PR12MB4337:EE_ X-MS-Office365-Filtering-Correlation-Id: 5d6346ad-9f30-42f6-4713-08dd3f7107b5 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; ARA:13230040|1800799024|36860700013|82310400026|376014; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?rt82vv8RixMR8viXoOiRYxU21YiK4Mbp2mVkhydqkQQAzEqOxvEzwKoUjdmP?= =?us-ascii?Q?M79SiOayqMDhsHRtTSz7bh3mXWhLE9iLb42WlmlRRXANmPV2v5LnNAkp7LIK?= =?us-ascii?Q?HgYfB1y+rqKS4CqPqaRHURG7aoAhZEzTAWiVLgWxU8DoOLFVHNBJgP4FkzcH?= =?us-ascii?Q?2IiL4M9ZmFgFLWebo7+VhsdwwtQ8iodOHpdvsYn53cj0zKzvI9OBd0DRbS+S?= =?us-ascii?Q?VNVV9xpqvAZ1C4EiHfCI3LBZvXvx/OCpvAfFio9U4V5AfQC6AhMVwrE2LHY9?= =?us-ascii?Q?aP9EIJhQZHLw8+Fpxb0mMmTEEfkMaap6wrVN0GpmVuQtzfMQljTsYDzmO7EL?= =?us-ascii?Q?7osLorIYkps51A4hh9gUM3yD8WqhrDSrjxCtmHcwE3ccU8o7e5T0hfrQph7/?= =?us-ascii?Q?Nb5eAOiVuG5SPvla/pcPaI0Y8hfoVXjvyBmWV6qyp7OhSJRFcKdVDb4Va2WM?= =?us-ascii?Q?VvGUNNsmBKo8wftRC56OJwisJCnuwqc3HGoNxX/Pr1/GDuHyM7Q6z7T4A2Qw?= =?us-ascii?Q?vkuR6fL+q1BOFs6+4psEk6vWbx/oI+H6AyUVdCKabC3f47XuTOkcDIzmCzdq?= =?us-ascii?Q?z7ZjaL+M1rfDzU/TJB/0b430i+xYdySgz0kwsWbgCrpNaeIx1dBpuOJ44rwt?= =?us-ascii?Q?oLQnoS8xtWNPvV252QJuoANX35zLavBKvn6VWWXWPYyGMLy3E9K7YX+F7FVe?= =?us-ascii?Q?lyIsj1D6O4jYQTEEMsyQhexkR6Oas2++nBBul5a+bMbhZWMr7rM+tpG/GDCc?= =?us-ascii?Q?G2y3CuB8wDMravefC1WQbaFFBL5IeE8rWvytSQR6zTsLIv039kSpcxdMbGEW?= =?us-ascii?Q?ELabJXqtRA8qgQmUkSjtf2WSexXEJ0PPUn2GMgte63I9fTyuMM2BZPGWjnO3?= =?us-ascii?Q?dGoDFKUNXvPrrUqZQQx/tZaxgDXaJuFDBFnHr6Bl5vz7ux9k1cdY2GP2GM8x?= =?us-ascii?Q?GE2R9M7xWOnTQiumcrAZIpC0mjqkJM953/5jSir9Vp01hLQN+vPIfYm+Tv1J?= =?us-ascii?Q?CIczI+7vP60D3Vz5c1tLSxqnj7FMrxIJuPon0GCeY8IJxTBqGOtI37421u6i?= =?us-ascii?Q?nX3QiNsKMxUVP4yjwud68XDJVMVc+Fl/yNH2z6n6w5fbSXgV5/K1UVbGBv6z?= =?us-ascii?Q?E93Qf1imy6WWJCgloXHLskwwHuixHw3711j3QcwBbtvnSC7pGz73sGnmjYqi?= =?us-ascii?Q?WzRUGsRgjd6SHJUfKUPi2t6/6Z/XIgzEDXA1aLLA5IXygDhKOQ7Qn/ls0EFm?= =?us-ascii?Q?adKz20cjp3+Tq7mptiFHXIzYjW46uCQ7OUJaidLaYXWShP104j1hHhsJrAFM?= =?us-ascii?Q?GymnHZBkpKhSV428Csau7GQWzFcWeIgx9d69WukIfxD5EHmiRpOZRPORiXIm?= =?us-ascii?Q?z1DjDXCAUqRVnYyILad75X1uPlSGwkuhssy4hv9ks+iEb3ofQy43lhocKojd?= =?us-ascii?Q?THOA8xAj2XSHaX43OfuRQ2iqS4PqeWqFaZHtsY78LAHbUOKtjm1YWc58B443?= =?us-ascii?Q?RM+0ZnwHaZVJ1R0=3D?= X-Forefront-Antispam-Report: CIP:216.228.117.161; CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:dc6edge2.nvidia.com; CAT:NONE; SFS:(13230040)(1800799024)(36860700013)(82310400026)(376014); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 28 Jan 2025 07:54:44.8091 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 5d6346ad-9f30-42f6-4713-08dd3f7107b5 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.117.161]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BL02EPF00029929.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR12MB4337 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org For switch dev mode, there is a rule split in case of using mark action. First rule will have the mark action, tag it with rule ID number and jump to the second rule that matches the tag and perform the rest of the actions (like RSS or queue). First, fix the crash when accessing RSS queue[0] instead of queue index, same as for queue action handling for hairpin RX queue check. Second, set tag action is not supported in HWS, so, replaced set tag action with modify field action. Used same tag index for both action and matching. Fixes: 821a6a5cc495 ("net/mlx5: add metadata split for compatibility") Cc: stable@dpdk.org Signed-off-by: Maayan Kashani Acked-by: Bing Zhao --- drivers/net/mlx5/mlx5_nta_split.c | 28 +++++++++++++++------------- 1 file changed, 15 insertions(+), 13 deletions(-) diff --git a/drivers/net/mlx5/mlx5_nta_split.c b/drivers/net/mlx5/mlx5_nta_split.c index b26f305bcab..6a85ab7fd12 100644 --- a/drivers/net/mlx5/mlx5_nta_split.c +++ b/drivers/net/mlx5/mlx5_nta_split.c @@ -13,6 +13,8 @@ #ifdef HAVE_MLX5_HWS_SUPPORT +#define BITS_PER_BYTE 8 + /* * Generate new actions lists for prefix and suffix flows. * @@ -44,11 +46,10 @@ mlx5_flow_nta_split_qrss_actions_prep(struct rte_eth_dev *dev, struct rte_flow_error *error) { struct mlx5_priv *priv = dev->data->dev_private; - struct mlx5_rte_flow_action_set_tag *set_tag; + struct rte_flow_action_modify_field *set_tag; struct rte_flow_action_jump *jump; const int qrss_idx = qrss - actions; uint32_t flow_id = 0; - int ret = 0; /* Allocate the new subflow ID and used to be matched later. */ mlx5_ipool_malloc(priv->sh->ipool[MLX5_IPOOL_RSS_EXPANTION_FLOW_ID], &flow_id); @@ -67,16 +68,16 @@ mlx5_flow_nta_split_qrss_actions_prep(struct rte_eth_dev *dev, /* Count MLX5_RTE_FLOW_ACTION_TYPE_TAG. */ actions_n++; set_tag = (void *)(prefix_act + actions_n); - /* Reuse ASO reg, should always succeed. Consider to use REG_C_6. */ - ret = flow_hw_get_reg_id_by_domain(dev, RTE_FLOW_ITEM_TYPE_METER_COLOR, - MLX5DR_TABLE_TYPE_NIC_RX, 0); - MLX5_ASSERT(ret != (int)REG_NON); - set_tag->id = (enum modify_reg)ret; /* Internal SET_TAG action to set flow ID. */ - set_tag->data = flow_id; + set_tag->operation = RTE_FLOW_MODIFY_SET; + set_tag->width = sizeof(flow_id) * BITS_PER_BYTE; + set_tag->src.field = RTE_FLOW_FIELD_VALUE; + memcpy(&set_tag->src.value, &flow_id, sizeof(flow_id)); + set_tag->dst.field = RTE_FLOW_FIELD_TAG; + set_tag->dst.tag_index = RTE_PMD_MLX5_LINEAR_HASH_TAG_INDEX; /* Construct new actions array and replace QUEUE/RSS action. */ prefix_act[qrss_idx] = (struct rte_flow_action) { - .type = (enum rte_flow_action_type)MLX5_RTE_FLOW_ACTION_TYPE_TAG, + .type = RTE_FLOW_ACTION_TYPE_MODIFY_FIELD, .conf = set_tag, }; /* JUMP action to jump to mreg copy table (CP_TBL). */ @@ -132,8 +133,9 @@ mlx5_flow_nta_split_qrss_items_prep(struct rte_eth_dev *dev, split_items[1].type = RTE_FLOW_ITEM_TYPE_END; q_tag_spec->data = qrss_id; q_tag_spec->id = (enum modify_reg) - flow_hw_get_reg_id_by_domain(dev, RTE_FLOW_ITEM_TYPE_METER_COLOR, - MLX5DR_TABLE_TYPE_NIC_RX, 0); + flow_hw_get_reg_id_by_domain(dev, RTE_FLOW_ITEM_TYPE_TAG, + MLX5DR_TABLE_TYPE_NIC_RX, + RTE_PMD_MLX5_LINEAR_HASH_TAG_INDEX); MLX5_ASSERT(q_tag_spec->id != REG_NON); } @@ -211,12 +213,12 @@ mlx5_flow_nta_split_metadata(struct rte_eth_dev *dev, return 0; } else if (action_flags & MLX5_FLOW_ACTION_RSS) { rss = (const struct rte_flow_action_rss *)actions->conf; - if (mlx5_rxq_is_hairpin(dev, rss->queue[0])) + if (mlx5_rxq_is_hairpin(dev, rss->queue_num)) return 0; } /* The prefix and suffix flows' actions. */ pefx_act_size = sizeof(struct rte_flow_action) * (actions_n + 1) + - sizeof(struct rte_flow_action_set_tag) + + sizeof(struct rte_flow_action_modify_field) + sizeof(struct rte_flow_action_jump); sfx_act_size = sizeof(struct rte_flow_action) * 2; /* The suffix attribute. */ -- 2.21.0