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From: Joshua Washington <joshwash@google.com>
To: Jeroen de Borst <jeroendb@google.com>,
	Rushil Gupta <rushilg@google.com>,
	 Joshua Washington <joshwash@google.com>
Cc: dev@dpdk.org
Subject: [PATCH] net/gve: remove gve-specific PCI revision ID macros
Date: Tue, 13 May 2025 16:53:08 -0700	[thread overview]
Message-ID: <20250513235308.2200865-1-joshwash@google.com> (raw)

Commit 5feee68de99e ("pci: define more standard register offsets") adds
a generic offset macro for the PCI revision ID, among a number of other
standard PCI config fields. Update GVE to make use of these macros
instead of defining its own.

Signed-off-by: Joshua Washington <joshwash@google.com>
---
 drivers/net/gve/base/gve.h        |  2 --
 drivers/net/gve/base/gve_adminq.c | 21 +++++++++------------
 2 files changed, 9 insertions(+), 14 deletions(-)

diff --git a/drivers/net/gve/base/gve.h b/drivers/net/gve/base/gve.h
index 0c5f5e9ce4..99514cb5f9 100644
--- a/drivers/net/gve/base/gve.h
+++ b/drivers/net/gve/base/gve.h
@@ -14,8 +14,6 @@
 #endif
 
 #define GVE_DEV_ID		0x0042
-#define GVE_PCI_REV_OFFSET	0x8
-#define GVE_PCI_REV_SIZE	1
 
 #define GVE_REG_BAR		0
 #define GVE_DB_BAR		2
diff --git a/drivers/net/gve/base/gve_adminq.c b/drivers/net/gve/base/gve_adminq.c
index 2c5cfa2aa1..25f4481c1b 100644
--- a/drivers/net/gve/base/gve_adminq.c
+++ b/drivers/net/gve/base/gve_adminq.c
@@ -196,18 +196,10 @@ gve_process_device_options(struct gve_priv *priv,
 	return 0;
 }
 
-static uint8_t
-gve_get_pci_revision_id(struct gve_priv *priv)
-{
-	uint8_t rev_id;
-
-	rte_pci_read_config(priv->pci_dev, &rev_id, GVE_PCI_REV_SIZE,
-			    GVE_PCI_REV_OFFSET);
-	return rev_id;
-}
-
 int gve_adminq_alloc(struct gve_priv *priv)
 {
+	uint8_t pci_rev_id;
+
 	priv->adminq = gve_alloc_dma_mem(&priv->adminq_dma_mem, PAGE_SIZE);
 	if (unlikely(!priv->adminq))
 		return -ENOMEM;
@@ -231,7 +223,9 @@ int gve_adminq_alloc(struct gve_priv *priv)
 	priv->adminq_get_ptype_map_cnt = 0;
 
 	/* Setup Admin queue with the device */
-	if (gve_get_pci_revision_id(priv) < 0x1) { /* Use AQ PFN. */
+	rte_pci_read_config(priv->pci_dev, &pci_rev_id, sizeof(pci_rev_id),
+			    RTE_PCI_REVISION_ID);
+	if (pci_rev_id < 0x1) { /* Use AQ PFN. */
 		iowrite32be(priv->adminq_dma_mem.pa / PAGE_SIZE,
 			    &priv->reg_bar0->adminq_pfn);
 	} else { /* Use full AQ address. */
@@ -251,10 +245,13 @@ int gve_adminq_alloc(struct gve_priv *priv)
 
 void gve_adminq_release(struct gve_priv *priv)
 {
+	uint8_t pci_rev_id;
 	int i = 0;
 
 	/* Tell the device the adminq is leaving */
-	if (gve_get_pci_revision_id(priv) < 0x1) {
+	rte_pci_read_config(priv->pci_dev, &pci_rev_id, sizeof(pci_rev_id),
+			    RTE_PCI_REVISION_ID);
+	if (pci_rev_id < 0x1) {
 		iowrite32be(0x0, &priv->reg_bar0->adminq_pfn);
 		while (ioread32be(&priv->reg_bar0->adminq_pfn)) {
 			/* If this is reached the device is unrecoverable and still
-- 
2.49.0.1045.g170613ef41-goog


             reply	other threads:[~2025-05-13 23:53 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-05-13 23:53 Joshua Washington [this message]
2025-05-14  0:46 ` Joshua Washington

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