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* [PATCH] config/arm: update neoverse n3 SoC and add neoverse V3
@ 2025-05-16 16:15 Doug Foster
  0 siblings, 0 replies; only message in thread
From: Doug Foster @ 2025-05-16 16:15 UTC (permalink / raw)
  To: Wathsala Vithanage, Bruce Richardson; +Cc: dev, nd, Doug Foster, Dhruv Tripathi

Arm Neoverse N3 build configuration is updated to include mcpu that
aligns with latest GCC. Also, add Arm Neoverse V3 build configuration.

Signed-off-by: Doug Foster <doug.foster@arm.com>
Reviewed-by: Wathsala Vithanage <wathsala.vithanage@arm.com>
Reviewed-by: Dhruv Tripathi <dhruv.tripathi@arm.com>
---
 config/arm/meson.build | 32 +++++++++++++++++++++-----------
 1 file changed, 21 insertions(+), 11 deletions(-)

diff --git a/config/arm/meson.build b/config/arm/meson.build
index f971ed3c1b..2f510c3a6c 100644
--- a/config/arm/meson.build
+++ b/config/arm/meson.build
@@ -110,17 +110,7 @@ part_number_config_arm = {
         ]
     },
     '0xd8e': {
-        # Only when -march=armv9-a+wfxt is used will the WFET
-        # feature be compiled with armv9 instructions.
-        # However, +wfxt is not supported by GCC at the moment.
-        # Although armv9-a is the fitting version of Arm ISA for
-        # Neoverse N3, it cannot be used when enabling wfxt for
-        # the above reasons.
-        # The workaround for this is to use armv8.7-a, which
-        # doesn't require +wfxt for binutils version 2.36 or greater.
-        'march': 'armv8.7-a',
-        'march_features': ['sve2'],
-        'fallback_march': 'armv8.5-a',
+        'mcpu' : 'neoverse-n3',
         'flags': [
             ['RTE_MACHINE', '"neoverse-n3"'],
             ['RTE_ARM_FEATURE_ATOMICS', true],
@@ -128,6 +118,16 @@ part_number_config_arm = {
             ['RTE_MAX_LCORE', 192],
             ['RTE_MAX_NUMA_NODES', 2]
         ]
+    },
+    '0xd84': {
+        'mcpu' : 'neoverse-v3',
+        'flags': [
+            ['RTE_MACHINE', '"neoverse-v3"'],
+            ['RTE_ARM_FEATURE_ATOMICS', true],
+            ['RTE_ARM_FEATURE_WFXT', true],
+            ['RTE_MAX_LCORE', 128],
+            ['RTE_MAX_NUMA_NODES', 2]
+        ]
     }
 }
 implementer_arm = {
@@ -641,6 +641,13 @@ soc_v2 = {
     'numa': true
 }
 
+soc_v3 = {
+    'description': 'Arm Neoverse V3',
+    'implementer': '0x41',
+    'part_number': '0xd84',
+    'numa': true
+}
+
 mcpu_defs = {
     'mcpu_centriq2400': {
         'march': 'armv8-a',
@@ -712,6 +719,7 @@ kunpeng920:      HiSilicon Kunpeng 920
 kunpeng930:      HiSilicon Kunpeng 930
 n1sdp:           Arm Neoverse N1SDP
 n2:              Arm Neoverse N2
+n3:              Arm Neoverse N3
 odyssey:         Marvell Odyssey
 stingray:        Broadcom Stingray
 thunderx2:       Marvell ThunderX2 T99
@@ -720,6 +728,7 @@ thunderxt88:     Marvell ThunderX T88
 tys2500:         Phytium TengYun S2500
 tys5000c:        Phytium TengYun S5000c
 v2:              Arm Neoverse V2
+v3:              Arm Neoverse V3
 End of SoCs list
 '''
 # The string above is included in the documentation, keep it in sync with the
@@ -760,6 +769,7 @@ socs = {
     'tys2500': soc_tys2500,
     'tys5000c': soc_tys5000c,
     'v2': soc_v2,
+    'v3': soc_v3
 }
 
 dpdk_conf.set('RTE_ARCH_ARM', 1)
-- 
2.34.1


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