From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id CD0F046803; Tue, 27 May 2025 13:05:07 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 53F01409FA; Tue, 27 May 2025 13:03:09 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id 8D0CE40685 for ; Tue, 27 May 2025 13:03:07 +0200 (CEST) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 54R6t7Fo019630 for ; Tue, 27 May 2025 04:03:06 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=pfpt0220; bh=1 O7ZpH37342PJ1hUc9Is94ybaToxC+fJVvYuNiLsXfM=; b=Hsq89El7hV5pBMhqB MUqIMgEaZNj/rA1efWtbkqJHUG/KFne5A9U5XvJTR0crQeSI/Omtyke4Ka1c+tWZ ZMFx4wBDvCiVL3bJTHvWuMvjbfdcCmG6d+Xtefyf2LD+a0i5Ck4fYmgzVDeJN/0P ARxu27nw1RQk1tPTMl3/i0RryzeJWFH94Dnx0a12Q33Gi4PfWOHhESN9zFa2LYMT hv0J55fncbSeJTNjL8IlLXxgMOjuj91QUu6bJGURB8qR/6W/PPcT8n1JEOFikCIe nTFk9muEpTtH2WHUDAcNaJnGNmAQma346xvETlT+qPyF/yka4l/S7ggyk0+XOmNU cR3yw== Received: from dc6wp-exch02.marvell.com ([4.21.29.225]) by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 46w8hq8dr7-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT) for ; Tue, 27 May 2025 04:03:06 -0700 (PDT) Received: from DC6WP-EXCH02.marvell.com (10.76.176.209) by DC6WP-EXCH02.marvell.com (10.76.176.209) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.4; Tue, 27 May 2025 04:03:05 -0700 Received: from maili.marvell.com (10.69.176.80) by DC6WP-EXCH02.marvell.com (10.76.176.209) with Microsoft SMTP Server id 15.2.1544.4 via Frontend Transport; Tue, 27 May 2025 04:03:05 -0700 Received: from hyd1554.caveonetworks.com (unknown [10.29.56.32]) by maili.marvell.com (Postfix) with ESMTP id 65D7D3F7061; Tue, 27 May 2025 04:03:03 -0700 (PDT) From: Tejasree Kondoj To: Akhil Goyal CC: Vidya Sagar Velumuri , Anoob Joseph , Subject: [PATCH 24/25] crypto/cnxk: add model check for cn20k Date: Tue, 27 May 2025 16:32:04 +0530 Message-ID: <20250527110205.2300800-25-ktejasree@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20250527110205.2300800-1-ktejasree@marvell.com> References: <20250527110205.2300800-1-ktejasree@marvell.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwNTI3MDA5MCBTYWx0ZWRfX96BYLhpEkXb4 zFlHUMbApmA0kqAwMC70oRW3o5n/TVx1UfIMv1ySJteKZWLEFyKt2JaN1+UFvnY1HngQN7aV2lk g93Ye1q94T7/0EdZ44T+PnDOYiZrR/e2MraWHpri4F6bT2EkiZgw3WN1h8PBl0RX5lKm2SPlLyU KGRCgBovlvoa8uBWKFkSwIRfjSmlZPh5fbE5zl0b/Db/j0yKqU9p/HmBzLGJUXatDlsni9xN9hi g3W5yrLVkbXMY4lHzYYX03uZ9y3HpNrG3CWf4TWX4trDq11rI6ipXBDKjz9mM1FEklBZomxMENH Zzt/rOO4YHUVWgxPrlunk8JT7Dsch8YPTUzfNwkgTvOfHsRtTy9b38y66TS29MzaQBcruEiV5UR 7viKCJUhPMkYLPHc9ZS7SuVibPSCAoLFNtZSa8aBiTBWLfFzuudZRzLMppgo7G/sG2BWXSGA X-Authority-Analysis: v=2.4 cv=D89HKuRj c=1 sm=1 tr=0 ts=68359bea cx=c_pps a=gIfcoYsirJbf48DBMSPrZA==:117 a=gIfcoYsirJbf48DBMSPrZA==:17 a=dt9VzEwgFbYA:10 a=M5GUcnROAAAA:8 a=zATx9W9L8u6M64y1SlQA:9 a=OBjm3rFKGHvpk9ecZwUJ:22 X-Proofpoint-GUID: xBcy8mz4owFW1f6bu9t0wqYwjmxy9BKd X-Proofpoint-ORIG-GUID: xBcy8mz4owFW1f6bu9t0wqYwjmxy9BKd X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.0.736,FMLib:17.12.80.40 definitions=2025-05-27_05,2025-05-27_01,2025-03-28_01 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Vidya Sagar Velumuri Add model checks for cn20k. Enable crypto and security capabilities for cn20k Signed-off-by: Vidya Sagar Velumuri --- drivers/crypto/cnxk/cnxk_cryptodev.c | 14 ++++++++------ .../crypto/cnxk/cnxk_cryptodev_capabilities.c | 10 +++++----- drivers/crypto/cnxk/cnxk_cryptodev_ops.c | 16 ++++++++++++---- 3 files changed, 25 insertions(+), 15 deletions(-) diff --git a/drivers/crypto/cnxk/cnxk_cryptodev.c b/drivers/crypto/cnxk/cnxk_cryptodev.c index 1eede2e59c..96b5121097 100644 --- a/drivers/crypto/cnxk/cnxk_cryptodev.c +++ b/drivers/crypto/cnxk/cnxk_cryptodev.c @@ -21,10 +21,10 @@ cnxk_cpt_default_ff_get(void) RTE_CRYPTODEV_FF_OOP_SGL_IN_SGL_OUT | RTE_CRYPTODEV_FF_SYM_SESSIONLESS | RTE_CRYPTODEV_FF_DIGEST_ENCRYPTED | RTE_CRYPTODEV_FF_SECURITY; - if (roc_model_is_cn10k()) + if (roc_model_is_cn10k() || roc_model_is_cn20k()) ff |= RTE_CRYPTODEV_FF_SECURITY_INNER_CSUM | RTE_CRYPTODEV_FF_SYM_RAW_DP; - if (roc_model_is_cn10ka_b0() || roc_model_is_cn10kb()) + if (roc_model_is_cn10ka_b0() || roc_model_is_cn10kb() || roc_model_is_cn20k()) ff |= RTE_CRYPTODEV_FF_SECURITY_RX_INJECT; return ff; @@ -41,10 +41,12 @@ cnxk_cpt_eng_grp_add(struct roc_cpt *roc_cpt) return -ENOTSUP; } - ret = roc_cpt_eng_grp_add(roc_cpt, CPT_ENG_TYPE_IE); - if (ret < 0) { - plt_err("Could not add CPT IE engines"); - return -ENOTSUP; + if (!roc_model_is_cn20k()) { + ret = roc_cpt_eng_grp_add(roc_cpt, CPT_ENG_TYPE_IE); + if (ret < 0) { + plt_err("Could not add CPT IE engines"); + return -ENOTSUP; + } } ret = roc_cpt_eng_grp_add(roc_cpt, CPT_ENG_TYPE_AE); diff --git a/drivers/crypto/cnxk/cnxk_cryptodev_capabilities.c b/drivers/crypto/cnxk/cnxk_cryptodev_capabilities.c index 63d2eef349..d2747878d3 100644 --- a/drivers/crypto/cnxk/cnxk_cryptodev_capabilities.c +++ b/drivers/crypto/cnxk/cnxk_cryptodev_capabilities.c @@ -1976,16 +1976,16 @@ crypto_caps_populate(struct rte_cryptodev_capabilities cnxk_caps[], CPT_CAPS_ADD(cnxk_caps, &cur_pos, hw_caps, kasumi); CPT_CAPS_ADD(cnxk_caps, &cur_pos, hw_caps, des); - if (!roc_model_is_cn10k()) + if (roc_model_is_cn9k()) cn9k_crypto_caps_add(cnxk_caps, &cur_pos); - if (roc_model_is_cn10k()) + if (roc_model_is_cn10k() || roc_model_is_cn20k()) cn10k_crypto_caps_add(cnxk_caps, hw_caps, &cur_pos); cpt_caps_add(cnxk_caps, &cur_pos, caps_null, RTE_DIM(caps_null)); cpt_caps_add(cnxk_caps, &cur_pos, caps_end, RTE_DIM(caps_end)); - if (roc_model_is_cn10k()) + if (roc_model_is_cn10k() || roc_model_is_cn20k()) cn10k_crypto_caps_update(cnxk_caps); } @@ -2060,7 +2060,7 @@ sec_ipsec_crypto_caps_populate(struct rte_cryptodev_capabilities cnxk_caps[], SEC_IPSEC_CAPS_ADD(cnxk_caps, &cur_pos, hw_caps, des); SEC_IPSEC_CAPS_ADD(cnxk_caps, &cur_pos, hw_caps, sha1_sha2); - if (roc_model_is_cn10k()) + if (roc_model_is_cn10k() || roc_model_is_cn20k()) cn10k_sec_ipsec_crypto_caps_update(cnxk_caps, &cur_pos); else cn9k_sec_ipsec_crypto_caps_update(cnxk_caps); @@ -2189,7 +2189,7 @@ cnxk_cpt_caps_populate(struct cnxk_cpt_vf *vf) cnxk_sec_ipsec_caps_update(&vf->sec_caps[i]); - if (roc_model_is_cn10k()) + if (roc_model_is_cn10k() || roc_model_is_cn20k()) cn10k_sec_ipsec_caps_update(&vf->sec_caps[i]); if (roc_model_is_cn9k()) diff --git a/drivers/crypto/cnxk/cnxk_cryptodev_ops.c b/drivers/crypto/cnxk/cnxk_cryptodev_ops.c index 982fbe991f..e5ca082e10 100644 --- a/drivers/crypto/cnxk/cnxk_cryptodev_ops.c +++ b/drivers/crypto/cnxk/cnxk_cryptodev_ops.c @@ -741,8 +741,10 @@ cnxk_cpt_inst_w7_get(struct cnxk_se_sess *sess, struct roc_cpt *roc_cpt) inst_w7.s.cptr += 8; /* Set the engine group */ - if (sess->zsk_flag || sess->aes_ctr_eea2 || sess->is_sha3 || sess->is_sm3 || - sess->passthrough || sess->is_sm4) + if (roc_model_is_cn20k()) + inst_w7.s.egrp = roc_cpt->eng_grp[CPT_ENG_TYPE_SE]; + else if (sess->zsk_flag || sess->aes_ctr_eea2 || sess->is_sha3 || sess->is_sm3 || + sess->passthrough || sess->is_sm4) inst_w7.s.egrp = roc_cpt->eng_grp[CPT_ENG_TYPE_SE]; else inst_w7.s.egrp = roc_cpt->eng_grp[CPT_ENG_TYPE_IE]; @@ -1043,7 +1045,7 @@ RTE_EXPORT_EXPERIMENTAL_SYMBOL(rte_pmd_cnxk_crypto_submit, 24.03) void rte_pmd_cnxk_crypto_submit(struct rte_pmd_cnxk_crypto_qptr *qptr, void *inst, uint16_t nb_inst) { - if (roc_model_is_cn10k()) + if (roc_model_is_cn10k() || roc_model_is_cn20k()) return cnxk_crypto_cn10k_submit(qptr, inst, nb_inst); else if (roc_model_is_cn9k()) return cnxk_crypto_cn9k_submit(qptr, inst, nb_inst); @@ -1068,7 +1070,7 @@ rte_pmd_cnxk_crypto_cptr_flush(struct rte_pmd_cnxk_crypto_qptr *qptr, return -EINVAL; } - if (unlikely(!roc_model_is_cn10k())) { + if (unlikely(roc_model_is_cn9k())) { plt_err("Invalid cnxk model"); return -EINVAL; } @@ -1106,6 +1108,12 @@ rte_pmd_cnxk_crypto_cptr_get(struct rte_pmd_cnxk_crypto_sess *rte_sess) } if (rte_sess->sess_type == RTE_CRYPTO_OP_SECURITY_SESSION) { + if (roc_model_is_cn20k()) { + struct cn20k_sec_session *sec_sess = PLT_PTR_CAST(rte_sess->sec_sess); + + return PLT_PTR_CAST(&sec_sess->sa); + } + if (roc_model_is_cn10k()) { struct cn10k_sec_session *sec_sess = PLT_PTR_CAST(rte_sess->sec_sess); return PLT_PTR_CAST(&sec_sess->sa); -- 2.25.1