From: Tejasree Kondoj <ktejasree@marvell.com>
To: Akhil Goyal <gakhil@marvell.com>
Cc: Anoob Joseph <anoobj@marvell.com>,
Vidya Sagar Velumuri <vvelumuri@marvell.com>, <dev@dpdk.org>
Subject: [PATCH 08/25] crypto/cnxk: move debug dumps to common
Date: Tue, 27 May 2025 16:31:48 +0530 [thread overview]
Message-ID: <20250527110205.2300800-9-ktejasree@marvell.com> (raw)
In-Reply-To: <20250527110205.2300800-1-ktejasree@marvell.com>
Move the crypto instruction dumps to common
Signed-off-by: Vidya Sagar Velumuri <vvelumuri@marvell.com>
Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
---
drivers/crypto/cnxk/cn10k_cryptodev_ops.c | 125 +++-------------------
drivers/crypto/cnxk/cn20k_cryptodev_ops.c | 7 +-
drivers/crypto/cnxk/cnxk_cryptodev_ops.c | 101 +++++++++++++++++
drivers/crypto/cnxk/cnxk_cryptodev_ops.h | 6 ++
4 files changed, 126 insertions(+), 113 deletions(-)
diff --git a/drivers/crypto/cnxk/cn10k_cryptodev_ops.c b/drivers/crypto/cnxk/cn10k_cryptodev_ops.c
index 947f50b4c8..9ad0629519 100644
--- a/drivers/crypto/cnxk/cn10k_cryptodev_ops.c
+++ b/drivers/crypto/cnxk/cn10k_cryptodev_ops.c
@@ -98,104 +98,6 @@ cpt_sec_ipsec_inst_fill(struct cnxk_cpt_qp *qp, struct rte_crypto_op *op,
return ret;
}
-#ifdef CPT_INST_DEBUG_ENABLE
-static inline void
-cpt_request_data_sgv2_mode_dump(uint8_t *in_buffer, bool glist, uint16_t components)
-{
- struct roc_se_buf_ptr list_ptr[ROC_MAX_SG_CNT];
- const char *list = glist ? "glist" : "slist";
- struct roc_sg2list_comp *sg_ptr = NULL;
- uint16_t list_cnt = 0;
- char suffix[64];
- int i, j;
-
- sg_ptr = (void *)in_buffer;
- for (i = 0; i < components; i++) {
- for (j = 0; j < sg_ptr->u.s.valid_segs; j++) {
- list_ptr[i * 3 + j].size = sg_ptr->u.s.len[j];
- list_ptr[i * 3 + j].vaddr = (void *)sg_ptr->ptr[j];
- list_ptr[i * 3 + j].vaddr = list_ptr[i * 3 + j].vaddr;
- list_cnt++;
- }
- sg_ptr++;
- }
-
- printf("Current %s: %u\n", list, list_cnt);
-
- for (i = 0; i < list_cnt; i++) {
- snprintf(suffix, sizeof(suffix), "%s[%d]: vaddr 0x%" PRIx64 ", vaddr %p len %u",
- list, i, (uint64_t)list_ptr[i].vaddr, list_ptr[i].vaddr, list_ptr[i].size);
- rte_hexdump(stdout, suffix, list_ptr[i].vaddr, list_ptr[i].size);
- }
-}
-
-static inline void
-cpt_request_data_sg_mode_dump(uint8_t *in_buffer, bool glist)
-{
- struct roc_se_buf_ptr list_ptr[ROC_MAX_SG_CNT];
- const char *list = glist ? "glist" : "slist";
- struct roc_sglist_comp *sg_ptr = NULL;
- uint16_t list_cnt, components;
- char suffix[64];
- int i;
-
- sg_ptr = (void *)(in_buffer + 8);
- list_cnt = rte_be_to_cpu_16((((uint16_t *)in_buffer)[2]));
- if (!glist) {
- components = list_cnt / 4;
- if (list_cnt % 4)
- components++;
- sg_ptr += components;
- list_cnt = rte_be_to_cpu_16((((uint16_t *)in_buffer)[3]));
- }
-
- printf("Current %s: %u\n", list, list_cnt);
- components = list_cnt / 4;
- for (i = 0; i < components; i++) {
- list_ptr[i * 4 + 0].size = rte_be_to_cpu_16(sg_ptr->u.s.len[0]);
- list_ptr[i * 4 + 1].size = rte_be_to_cpu_16(sg_ptr->u.s.len[1]);
- list_ptr[i * 4 + 2].size = rte_be_to_cpu_16(sg_ptr->u.s.len[2]);
- list_ptr[i * 4 + 3].size = rte_be_to_cpu_16(sg_ptr->u.s.len[3]);
- list_ptr[i * 4 + 0].vaddr = (void *)rte_be_to_cpu_64(sg_ptr->ptr[0]);
- list_ptr[i * 4 + 1].vaddr = (void *)rte_be_to_cpu_64(sg_ptr->ptr[1]);
- list_ptr[i * 4 + 2].vaddr = (void *)rte_be_to_cpu_64(sg_ptr->ptr[2]);
- list_ptr[i * 4 + 3].vaddr = (void *)rte_be_to_cpu_64(sg_ptr->ptr[3]);
- list_ptr[i * 4 + 0].vaddr = list_ptr[i * 4 + 0].vaddr;
- list_ptr[i * 4 + 1].vaddr = list_ptr[i * 4 + 1].vaddr;
- list_ptr[i * 4 + 2].vaddr = list_ptr[i * 4 + 2].vaddr;
- list_ptr[i * 4 + 3].vaddr = list_ptr[i * 4 + 3].vaddr;
- sg_ptr++;
- }
-
- components = list_cnt % 4;
- switch (components) {
- case 3:
- list_ptr[i * 4 + 2].size = rte_be_to_cpu_16(sg_ptr->u.s.len[2]);
- list_ptr[i * 4 + 2].vaddr = (void *)rte_be_to_cpu_64(sg_ptr->ptr[2]);
- list_ptr[i * 4 + 2].vaddr = list_ptr[i * 4 + 2].vaddr;
- /* FALLTHROUGH */
- case 2:
- list_ptr[i * 4 + 1].size = rte_be_to_cpu_16(sg_ptr->u.s.len[1]);
- list_ptr[i * 4 + 1].vaddr = (void *)rte_be_to_cpu_64(sg_ptr->ptr[1]);
- list_ptr[i * 4 + 1].vaddr = list_ptr[i * 4 + 1].vaddr;
- /* FALLTHROUGH */
- case 1:
- list_ptr[i * 4 + 0].size = rte_be_to_cpu_16(sg_ptr->u.s.len[0]);
- list_ptr[i * 4 + 0].vaddr = (void *)rte_be_to_cpu_64(sg_ptr->ptr[0]);
- list_ptr[i * 4 + 0].vaddr = list_ptr[i * 4 + 0].vaddr;
- break;
- default:
- break;
- }
-
- for (i = 0; i < list_cnt; i++) {
- snprintf(suffix, sizeof(suffix), "%s[%d]: vaddr 0x%" PRIx64 ", vaddr %p len %u",
- list, i, (uint64_t)list_ptr[i].vaddr, list_ptr[i].vaddr, list_ptr[i].size);
- rte_hexdump(stdout, suffix, list_ptr[i].vaddr, list_ptr[i].size);
- }
-}
-#endif
-
static __rte_always_inline int __rte_hot
cpt_sec_tls_inst_fill(struct cnxk_cpt_qp *qp, struct rte_crypto_op *op,
struct cn10k_sec_session *sess, struct cpt_inst_s *inst,
@@ -305,20 +207,22 @@ cn10k_cpt_fill_inst(struct cnxk_cpt_qp *qp, struct rte_crypto_op *ops[], struct
infl_req->scatter_sz = inst[0].w6.s.scatter_sz;
infl_req->opcode_major = inst[0].w4.s.opcode_major;
- rte_hexdump(stdout, "cptr", (void *)(uint64_t)inst[0].w7.s.cptr, 128);
- printf("major opcode:%d\n", inst[0].w4.s.opcode_major);
- printf("minor opcode:%d\n", inst[0].w4.s.opcode_minor);
- printf("param1:%d\n", inst[0].w4.s.param1);
- printf("param2:%d\n", inst[0].w4.s.param2);
- printf("dlen:%d\n", inst[0].w4.s.dlen);
+ rte_hexdump(rte_log_get_stream(), "cptr", (void *)(uint64_t)inst[0].w7.s.cptr, 128);
+ plt_err("major opcode:%d", inst[0].w4.s.opcode_major);
+ plt_err("minor opcode:%d", inst[0].w4.s.opcode_minor);
+ plt_err("param1:%d", inst[0].w4.s.param1);
+ plt_err("param2:%d", inst[0].w4.s.param2);
+ plt_err("dlen:%d", inst[0].w4.s.dlen);
if (is_sg_ver2) {
- cpt_request_data_sgv2_mode_dump((void *)inst[0].dptr, 1, inst[0].w5.s.gather_sz);
- cpt_request_data_sgv2_mode_dump((void *)inst[0].rptr, 0, inst[0].w6.s.scatter_sz);
+ cnxk_cpt_request_data_sgv2_mode_dump((void *)inst[0].dptr, 1,
+ inst[0].w5.s.gather_sz);
+ cnxk_cpt_request_data_sgv2_mode_dump((void *)inst[0].rptr, 0,
+ inst[0].w6.s.scatter_sz);
} else {
if (infl_req->opcode_major >> 7) {
- cpt_request_data_sg_mode_dump((void *)inst[0].dptr, 1);
- cpt_request_data_sg_mode_dump((void *)inst[0].dptr, 0);
+ cnxk_cpt_request_data_sg_mode_dump((void *)inst[0].dptr, 1);
+ cnxk_cpt_request_data_sg_mode_dump((void *)inst[0].dptr, 0);
}
}
#endif
@@ -1163,10 +1067,11 @@ cn10k_cpt_dequeue_post_process(struct cnxk_cpt_qp *qp, struct rte_crypto_op *cop
if (likely(compcode == CPT_COMP_GOOD)) {
#ifdef CPT_INST_DEBUG_ENABLE
if (infl_req->is_sg_ver2)
- cpt_request_data_sgv2_mode_dump(infl_req->rptr, 0, infl_req->scatter_sz);
+ cnxk_cpt_request_data_sgv2_mode_dump(infl_req->rptr, 0,
+ infl_req->scatter_sz);
else {
if (infl_req->opcode_major >> 7)
- cpt_request_data_sg_mode_dump(infl_req->dptr, 0);
+ cnxk_cpt_request_data_sg_mode_dump(infl_req->dptr, 0);
}
#endif
diff --git a/drivers/crypto/cnxk/cn20k_cryptodev_ops.c b/drivers/crypto/cnxk/cn20k_cryptodev_ops.c
index da27abb0b8..caa94715f7 100644
--- a/drivers/crypto/cnxk/cn20k_cryptodev_ops.c
+++ b/drivers/crypto/cnxk/cn20k_cryptodev_ops.c
@@ -4,6 +4,7 @@
#include <cryptodev_pmd.h>
#include <rte_cryptodev.h>
+#include <rte_hexdump.h>
#include "roc_cpt.h"
#include "roc_idev.h"
@@ -143,8 +144,8 @@ cn20k_cpt_fill_inst(struct cnxk_cpt_qp *qp, struct rte_crypto_op *ops[], struct
plt_err("param2:%d", inst[0].w4.s.param2);
plt_err("dlen:%d", inst[0].w4.s.dlen);
- cpt_request_data_sgv2_mode_dump((void *)inst[0].dptr, 1, inst[0].w5.s.gather_sz);
- cpt_request_data_sgv2_mode_dump((void *)inst[0].rptr, 0, inst[0].w6.s.scatter_sz);
+ cnxk_cpt_request_data_sgv2_mode_dump((void *)inst[0].dptr, 1, inst[0].w5.s.gather_sz);
+ cnxk_cpt_request_data_sgv2_mode_dump((void *)inst[0].rptr, 0, inst[0].w6.s.scatter_sz);
#endif
return 1;
@@ -255,7 +256,7 @@ cn20k_cpt_dequeue_post_process(struct cnxk_cpt_qp *qp, struct rte_crypto_op *cop
if (likely(compcode == CPT_COMP_GOOD)) {
#ifdef CPT_INST_DEBUG_ENABLE
- cpt_request_data_sgv2_mode_dump(infl_req->rptr, 0, infl_req->scatter_sz);
+ cnxk_cpt_request_data_sgv2_mode_dump(infl_req->rptr, 0, infl_req->scatter_sz);
#endif
if (unlikely(uc_compcode)) {
diff --git a/drivers/crypto/cnxk/cnxk_cryptodev_ops.c b/drivers/crypto/cnxk/cnxk_cryptodev_ops.c
index 61f3e135aa..b4020f96c1 100644
--- a/drivers/crypto/cnxk/cnxk_cryptodev_ops.c
+++ b/drivers/crypto/cnxk/cnxk_cryptodev_ops.c
@@ -7,6 +7,9 @@
#include <rte_cryptodev.h>
#include <cryptodev_pmd.h>
#include <rte_errno.h>
+#ifdef CPT_INST_DEBUG_ENABLE
+#include <rte_hexdump.h>
+#endif
#include <rte_security_driver.h>
#include "roc_ae_fpm_tables.h"
@@ -1223,3 +1226,101 @@ rte_pmd_cnxk_crypto_qp_stats_get(struct rte_pmd_cnxk_crypto_qptr *qptr,
return 0;
}
+
+#ifdef CPT_INST_DEBUG_ENABLE
+void
+cnxk_cpt_request_data_sgv2_mode_dump(uint8_t *in_buffer, bool glist, uint16_t components)
+{
+ struct roc_se_buf_ptr list_ptr[ROC_MAX_SG_CNT];
+ const char *list = glist ? "glist" : "slist";
+ struct roc_sg2list_comp *sg_ptr = NULL;
+ uint16_t list_cnt = 0;
+ char suffix[64];
+ int i, j;
+
+ sg_ptr = (void *)in_buffer;
+ for (i = 0; i < components; i++) {
+ for (j = 0; j < sg_ptr->u.s.valid_segs; j++) {
+ list_ptr[i * 3 + j].size = sg_ptr->u.s.len[j];
+ list_ptr[i * 3 + j].vaddr = (void *)sg_ptr->ptr[j];
+ list_ptr[i * 3 + j].vaddr = list_ptr[i * 3 + j].vaddr;
+ list_cnt++;
+ }
+ sg_ptr++;
+ }
+
+ plt_err("Current %s: %u", list, list_cnt);
+
+ for (i = 0; i < list_cnt; i++) {
+ snprintf(suffix, sizeof(suffix), "%s[%d]: vaddr 0x%" PRIx64 ", vaddr %p len %u",
+ list, i, (uint64_t)list_ptr[i].vaddr, list_ptr[i].vaddr, list_ptr[i].size);
+ rte_hexdump(rte_log_get_stream(), suffix, list_ptr[i].vaddr, list_ptr[i].size);
+ }
+}
+
+void
+cnxk_cpt_request_data_sg_mode_dump(uint8_t *in_buffer, bool glist)
+{
+ struct roc_se_buf_ptr list_ptr[ROC_MAX_SG_CNT];
+ const char *list = glist ? "glist" : "slist";
+ struct roc_sglist_comp *sg_ptr = NULL;
+ uint16_t list_cnt, components;
+ char suffix[64];
+ int i;
+
+ sg_ptr = (void *)(in_buffer + 8);
+ list_cnt = rte_be_to_cpu_16((((uint16_t *)in_buffer)[2]));
+ if (!glist) {
+ components = list_cnt / 4;
+ if (list_cnt % 4)
+ components++;
+ sg_ptr += components;
+ list_cnt = rte_be_to_cpu_16((((uint16_t *)in_buffer)[3]));
+ }
+
+ plt_err("Current %s: %u", list, list_cnt);
+ components = list_cnt / 4;
+ for (i = 0; i < components; i++) {
+ list_ptr[i * 4 + 0].size = rte_be_to_cpu_16(sg_ptr->u.s.len[0]);
+ list_ptr[i * 4 + 1].size = rte_be_to_cpu_16(sg_ptr->u.s.len[1]);
+ list_ptr[i * 4 + 2].size = rte_be_to_cpu_16(sg_ptr->u.s.len[2]);
+ list_ptr[i * 4 + 3].size = rte_be_to_cpu_16(sg_ptr->u.s.len[3]);
+ list_ptr[i * 4 + 0].vaddr = (void *)rte_be_to_cpu_64(sg_ptr->ptr[0]);
+ list_ptr[i * 4 + 1].vaddr = (void *)rte_be_to_cpu_64(sg_ptr->ptr[1]);
+ list_ptr[i * 4 + 2].vaddr = (void *)rte_be_to_cpu_64(sg_ptr->ptr[2]);
+ list_ptr[i * 4 + 3].vaddr = (void *)rte_be_to_cpu_64(sg_ptr->ptr[3]);
+ list_ptr[i * 4 + 0].vaddr = list_ptr[i * 4 + 0].vaddr;
+ list_ptr[i * 4 + 1].vaddr = list_ptr[i * 4 + 1].vaddr;
+ list_ptr[i * 4 + 2].vaddr = list_ptr[i * 4 + 2].vaddr;
+ list_ptr[i * 4 + 3].vaddr = list_ptr[i * 4 + 3].vaddr;
+ sg_ptr++;
+ }
+
+ components = list_cnt % 4;
+ switch (components) {
+ case 3:
+ list_ptr[i * 4 + 2].size = rte_be_to_cpu_16(sg_ptr->u.s.len[2]);
+ list_ptr[i * 4 + 2].vaddr = (void *)rte_be_to_cpu_64(sg_ptr->ptr[2]);
+ list_ptr[i * 4 + 2].vaddr = list_ptr[i * 4 + 2].vaddr;
+ [[fallthrough]];
+ case 2:
+ list_ptr[i * 4 + 1].size = rte_be_to_cpu_16(sg_ptr->u.s.len[1]);
+ list_ptr[i * 4 + 1].vaddr = (void *)rte_be_to_cpu_64(sg_ptr->ptr[1]);
+ list_ptr[i * 4 + 1].vaddr = list_ptr[i * 4 + 1].vaddr;
+ [[fallthrough]];
+ case 1:
+ list_ptr[i * 4 + 0].size = rte_be_to_cpu_16(sg_ptr->u.s.len[0]);
+ list_ptr[i * 4 + 0].vaddr = (void *)rte_be_to_cpu_64(sg_ptr->ptr[0]);
+ list_ptr[i * 4 + 0].vaddr = list_ptr[i * 4 + 0].vaddr;
+ break;
+ default:
+ break;
+ }
+
+ for (i = 0; i < list_cnt; i++) {
+ snprintf(suffix, sizeof(suffix), "%s[%d]: vaddr 0x%" PRIx64 ", vaddr %p len %u",
+ list, i, (uint64_t)list_ptr[i].vaddr, list_ptr[i].vaddr, list_ptr[i].size);
+ rte_hexdump(rte_log_get_stream(), suffix, list_ptr[i].vaddr, list_ptr[i].size);
+ }
+}
+#endif
diff --git a/drivers/crypto/cnxk/cnxk_cryptodev_ops.h b/drivers/crypto/cnxk/cnxk_cryptodev_ops.h
index 6ad52ec13e..417b869828 100644
--- a/drivers/crypto/cnxk/cnxk_cryptodev_ops.h
+++ b/drivers/crypto/cnxk/cnxk_cryptodev_ops.h
@@ -157,6 +157,12 @@ int cnxk_cpt_queue_pair_event_error_query(struct rte_cryptodev *dev, uint16_t qp
uint32_t cnxk_cpt_qp_depth_used(void *qptr);
+#ifdef CPT_INST_DEBUG_ENABLE
+void cnxk_cpt_request_data_sg_mode_dump(uint8_t *in_buffer, bool glist);
+
+void cnxk_cpt_request_data_sgv2_mode_dump(uint8_t *in_buffer, bool glist, uint16_t components);
+#endif
+
static __rte_always_inline void
pending_queue_advance(uint64_t *index, const uint64_t mask)
{
--
2.25.1
next prev parent reply other threads:[~2025-05-27 11:03 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-05-27 11:01 [PATCH 00/25] add CN20K support to cnxk crypto PMD Tejasree Kondoj
2025-05-27 11:01 ` [PATCH 01/25] crypto/cnxk: add probe for cn20k crypto device Tejasree Kondoj
2025-05-27 11:01 ` [PATCH 02/25] crypto/cnxk: add ops skeleton for cn20k Tejasree Kondoj
2025-05-27 11:01 ` [PATCH 03/25] crypto/cnxk: add dev info get Tejasree Kondoj
2025-05-27 11:01 ` [PATCH 04/25] crypto/cnxk: add skeletion for enq deq functions Tejasree Kondoj
2025-05-27 11:01 ` [PATCH 05/25] crypto/cnxk: add lmtst routines for cn20k Tejasree Kondoj
2025-05-27 11:01 ` [PATCH 06/25] crypto/cnxk: add enqueue function support Tejasree Kondoj
2025-05-27 11:01 ` [PATCH 07/25] crypto/cnxk: add cryptodev dequeue support for cn20k Tejasree Kondoj
2025-05-27 11:01 ` Tejasree Kondoj [this message]
2025-05-27 11:01 ` [PATCH 09/25] crypto/cnxk: add rte security skeletion " Tejasree Kondoj
2025-05-27 11:01 ` [PATCH 10/25] crypto/cnxk: add security session creation Tejasree Kondoj
2025-05-27 11:01 ` [PATCH 11/25] crypto/cnxk: add security session destroy Tejasree Kondoj
2025-05-27 11:01 ` [PATCH 12/25] crypto/cnxk: move code to common Tejasree Kondoj
2025-05-27 11:01 ` [PATCH 13/25] crypto/cnxk: add rte sec session update Tejasree Kondoj
2025-05-27 11:01 ` [PATCH 14/25] crypto/cnxk: add rte security datapath handling Tejasree Kondoj
2025-05-27 11:01 ` [PATCH 15/25] crypto/cnxk: add Rx inject in security lookaside Tejasree Kondoj
2025-05-27 11:01 ` [PATCH 16/25] crypto/cnxk: add skeleton for tls Tejasree Kondoj
2025-05-27 11:01 ` [PATCH 17/25] crypto/cnxk: add tls write session creation Tejasree Kondoj
2025-05-27 11:01 ` [PATCH 18/25] crypto/cnxk: add tls read " Tejasree Kondoj
2025-05-27 11:01 ` [PATCH 19/25] crypto/cnxk: add tls session destroy Tejasree Kondoj
2025-05-27 11:02 ` [PATCH 20/25] crypto/cnxk: add enq and dequeue support for TLS Tejasree Kondoj
2025-05-27 11:02 ` [PATCH 21/25] crypto/cnxk: tls post process Tejasree Kondoj
2025-05-27 11:02 ` [PATCH 22/25] crypto/cnxk: add tls session update Tejasree Kondoj
2025-05-27 11:02 ` [PATCH 23/25] crypto/cnxk: support raw API for cn20k Tejasree Kondoj
2025-05-27 11:02 ` [PATCH 24/25] crypto/cnxk: add model check " Tejasree Kondoj
2025-05-27 11:02 ` [PATCH 25/25] doc: update CN20K CPT documentation Tejasree Kondoj
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