* [PATCH 01/11] net/dpaa2: fix issue of extract buffer preparation
2025-05-30 7:13 [PATCH 00/11] NXP DPAA2 driver enhancements and fixes Gagandeep Singh
@ 2025-05-30 7:13 ` Gagandeep Singh
2025-05-30 7:13 ` [PATCH 02/11] net/dpaa2: fix shaper rate Gagandeep Singh
` (10 subsequent siblings)
11 siblings, 0 replies; 24+ messages in thread
From: Gagandeep Singh @ 2025-05-30 7:13 UTC (permalink / raw)
To: dev, Hemant Agrawal, Sachin Saxena, Jun Yang; +Cc: stable
From: Jun Yang <jun.yang@nxp.com>
1) The max size of extract buffer should be size of
"struct dpni_ext_set_rx_tc_dist"(488), which is greater than 256.
2) dpkg_prepare_key_cfg is responsible to clear
extract buffer before preparing.
Fixes: 25d0ae624245 ("net/dpaa2: check IOVA before sending MC command")
Cc: stable@dpdk.org
Signed-off-by: Jun Yang <jun.yang@nxp.com>
---
drivers/net/dpaa2/dpaa2_ethdev.c | 4 ++--
drivers/net/dpaa2/dpaa2_ethdev.h | 6 ++++--
2 files changed, 6 insertions(+), 4 deletions(-)
diff --git a/drivers/net/dpaa2/dpaa2_ethdev.c b/drivers/net/dpaa2/dpaa2_ethdev.c
index c53c2d0549..c154a574ce 100644
--- a/drivers/net/dpaa2/dpaa2_ethdev.c
+++ b/drivers/net/dpaa2/dpaa2_ethdev.c
@@ -2788,7 +2788,7 @@ dpaa2_dev_init(struct rte_eth_dev *eth_dev)
/* Init fields w.r.t. classification */
memset(&priv->extract.qos_key_extract, 0,
sizeof(struct dpaa2_key_extract));
- priv->extract.qos_extract_param = rte_malloc(NULL,
+ priv->extract.qos_extract_param = rte_zmalloc(NULL,
DPAA2_EXTRACT_PARAM_MAX_SIZE,
RTE_CACHE_LINE_SIZE);
if (!priv->extract.qos_extract_param) {
@@ -2799,7 +2799,7 @@ dpaa2_dev_init(struct rte_eth_dev *eth_dev)
for (i = 0; i < MAX_TCS; i++) {
memset(&priv->extract.tc_key_extract[i], 0,
sizeof(struct dpaa2_key_extract));
- priv->extract.tc_extract_param[i] = rte_malloc(NULL,
+ priv->extract.tc_extract_param[i] = rte_zmalloc(NULL,
DPAA2_EXTRACT_PARAM_MAX_SIZE,
RTE_CACHE_LINE_SIZE);
if (!priv->extract.tc_extract_param[i]) {
diff --git a/drivers/net/dpaa2/dpaa2_ethdev.h b/drivers/net/dpaa2/dpaa2_ethdev.h
index fd3119247a..f32c31c763 100644
--- a/drivers/net/dpaa2/dpaa2_ethdev.h
+++ b/drivers/net/dpaa2/dpaa2_ethdev.h
@@ -31,7 +31,9 @@
#define MAX_DPNI 8
#define DPAA2_MAX_CHANNELS 16
-#define DPAA2_EXTRACT_PARAM_MAX_SIZE 256
+#define DPAA2_EXTRACT_PARAM_MAX_SIZE \
+ RTE_ALIGN(sizeof(struct dpni_ext_set_rx_tc_dist), 256)
+
#define DPAA2_EXTRACT_ALLOC_KEY_MAX_SIZE 256
#define DPAA2_RX_DEFAULT_NBDESC 512
@@ -60,7 +62,7 @@
#define CONG_RX_OAL 128
/* Size of the input SMMU mapped memory required by MC */
-#define DIST_PARAM_IOVA_SIZE 256
+#define DIST_PARAM_IOVA_SIZE DPAA2_EXTRACT_PARAM_MAX_SIZE
/* Enable TX Congestion control support
* default is disable
--
2.25.1
^ permalink raw reply [flat|nested] 24+ messages in thread* [PATCH 02/11] net/dpaa2: fix shaper rate
2025-05-30 7:13 [PATCH 00/11] NXP DPAA2 driver enhancements and fixes Gagandeep Singh
2025-05-30 7:13 ` [PATCH 01/11] net/dpaa2: fix issue of extract buffer preparation Gagandeep Singh
@ 2025-05-30 7:13 ` Gagandeep Singh
2025-05-30 7:13 ` [PATCH 03/11] bus/fslmc: add DPBP APIs for setting depletion thresholds Gagandeep Singh
` (9 subsequent siblings)
11 siblings, 0 replies; 24+ messages in thread
From: Gagandeep Singh @ 2025-05-30 7:13 UTC (permalink / raw)
To: dev, Hemant Agrawal, Sachin Saxena; +Cc: stable
This patch fixes the shaper rate by configuring the
user given rate in bytes. Earlier driver was considering
the user given rate value in bits.
Fixes: ac624068ee25 ("net/dpaa2: support traffic management")
Cc: stable@dpdk.org
Signed-off-by: Gagandeep Singh <g.singh@nxp.com>
---
drivers/net/dpaa2/dpaa2_tm.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/net/dpaa2/dpaa2_tm.c b/drivers/net/dpaa2/dpaa2_tm.c
index f91392b092..dbf66c756e 100644
--- a/drivers/net/dpaa2/dpaa2_tm.c
+++ b/drivers/net/dpaa2/dpaa2_tm.c
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright 2020-2023 NXP
+ * Copyright 2020-2024 NXP
*/
#include <rte_ethdev.h>
@@ -733,12 +733,12 @@ dpaa2_hierarchy_commit(struct rte_eth_dev *dev, int clear_on_fail,
tx_cr_shaper.max_burst_size =
node->profile->params.committed.size;
tx_cr_shaper.rate_limit =
- node->profile->params.committed.rate /
- (1024 * 1024);
+ (node->profile->params.committed.rate /
+ (1024 * 1024)) * 8;
tx_er_shaper.max_burst_size =
node->profile->params.peak.size;
tx_er_shaper.rate_limit =
- node->profile->params.peak.rate / (1024 * 1024);
+ (node->profile->params.peak.rate / (1024 * 1024)) * 8;
/* root node */
if (node->parent == NULL) {
DPAA2_PMD_DEBUG("LNI S.rate = %u, burst =%u",
--
2.25.1
^ permalink raw reply [flat|nested] 24+ messages in thread* [PATCH 03/11] bus/fslmc: add DPBP APIs for setting depletion thresholds
2025-05-30 7:13 [PATCH 00/11] NXP DPAA2 driver enhancements and fixes Gagandeep Singh
2025-05-30 7:13 ` [PATCH 01/11] net/dpaa2: fix issue of extract buffer preparation Gagandeep Singh
2025-05-30 7:13 ` [PATCH 02/11] net/dpaa2: fix shaper rate Gagandeep Singh
@ 2025-05-30 7:13 ` Gagandeep Singh
2025-05-30 7:13 ` [PATCH 04/11] mempool/dpaa2: use unified VA to IOVA conversion Gagandeep Singh
` (8 subsequent siblings)
11 siblings, 0 replies; 24+ messages in thread
From: Gagandeep Singh @ 2025-05-30 7:13 UTC (permalink / raw)
To: dev, Hemant Agrawal, Sachin Saxena; +Cc: Vanshika Shukla
From: Vanshika Shukla <vanshika.shukla@nxp.com>
This patch adds DPBP APIs for setting and getting the depletion/surplus
thresholds for controlling pause frame generation.
By default, depletion_entry is set as 128 by MC. This API would help user
configure the buffer in depletion state as per requirement.
Signed-off-by: Vanshika Shukla <vanshika.shukla@nxp.com>
---
doc/guides/platform/dpaa2.rst | 2 +-
drivers/bus/fslmc/mc/dpbp.c | 78 ++++++++++++++++++++++-
drivers/bus/fslmc/mc/fsl_dpbp.h | 41 +++++++++++-
drivers/mempool/dpaa2/dpaa2_hw_mempool.c | 26 ++++++++
drivers/mempool/dpaa2/dpaa2_hw_mempool.h | 1 +
drivers/mempool/dpaa2/rte_dpaa2_mempool.h | 12 ++++
drivers/net/dpaa2/dpaa2_ethdev.c | 39 +++++++++++-
drivers/net/dpaa2/dpaa2_ethdev.h | 1 +
8 files changed, 194 insertions(+), 6 deletions(-)
diff --git a/doc/guides/platform/dpaa2.rst b/doc/guides/platform/dpaa2.rst
index c9ec21334f..e32ba5d300 100644
--- a/doc/guides/platform/dpaa2.rst
+++ b/doc/guides/platform/dpaa2.rst
@@ -106,7 +106,7 @@ separately:
Currently supported by DPDK:
- NXP SDK **LSDK 21.08++**.
-- MC Firmware version **10.37.0** and higher.
+- MC Firmware version **10.39.0** and higher.
- Supported architectures: **arm64 LE**.
- Follow the DPDK :ref:`Getting Started Guide for Linux <linux_gsg>`
diff --git a/drivers/bus/fslmc/mc/dpbp.c b/drivers/bus/fslmc/mc/dpbp.c
index 08f24d33e8..5529a1fe9c 100644
--- a/drivers/bus/fslmc/mc/dpbp.c
+++ b/drivers/bus/fslmc/mc/dpbp.c
@@ -1,7 +1,7 @@
/* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0)
*
* Copyright 2013-2016 Freescale Semiconductor Inc.
- * Copyright 2016-2017 NXP
+ * Copyright 2016-2017, 2025 NXP
*
*/
#include <fsl_mc_sys.h>
@@ -362,3 +362,79 @@ int dpbp_get_num_free_bufs(struct fsl_mc_io *mc_io,
return 0;
}
+
+/**
+ * dpbp_set_notifications() - Set notifications towards software
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token: Token of DPBP object
+ * @cfg: notifications configuration
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+RTE_EXPORT_INTERNAL_SYMBOL(dpbp_set_notifications)
+int dpbp_set_notifications(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ struct dpbp_notification_cfg *cfg)
+{
+ struct dpbp_cmd_set_notifications *cmd_params;
+ struct mc_command cmd = { 0 };
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPBP_CMDID_SET_NOTIFICATIONS,
+ cmd_flags, token);
+ cmd_params = (struct dpbp_cmd_set_notifications *)cmd.params;
+ cmd_params->depletion_entry = cpu_to_le32(cfg->depletion_entry);
+ cmd_params->depletion_exit = cpu_to_le32(cfg->depletion_exit);
+ cmd_params->surplus_entry = cpu_to_le32(cfg->surplus_entry);
+ cmd_params->surplus_exit = cpu_to_le32(cfg->surplus_exit);
+ cmd_params->options = cpu_to_le32(cfg->options);
+ cmd_params->message_ctx = cpu_to_le64(cfg->message_ctx);
+ cmd_params->message_iova = cpu_to_le64(cfg->message_iova);
+
+ /* send command to mc*/
+ return mc_send_command(mc_io, &cmd);
+}
+
+/**
+ * dpbp_get_notifications() - Get the notifications configuration
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token: Token of DPBP object
+ * @cfg: notifications configuration
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+RTE_EXPORT_INTERNAL_SYMBOL(dpbp_get_notifications)
+int dpbp_get_notifications(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ struct dpbp_notification_cfg *cfg)
+{
+ struct dpbp_rsp_get_notifications *rsp_params;
+ struct mc_command cmd = { 0 };
+ int err;
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPBP_CMDID_GET_NOTIFICATIONS,
+ cmd_flags,
+ token);
+
+ /* send command to mc*/
+ err = mc_send_command(mc_io, &cmd);
+ if (err)
+ return err;
+
+ /* retrieve response parameters */
+ rsp_params = (struct dpbp_rsp_get_notifications *)cmd.params;
+ cfg->depletion_entry = le32_to_cpu(rsp_params->depletion_entry);
+ cfg->depletion_exit = le32_to_cpu(rsp_params->depletion_exit);
+ cfg->surplus_entry = le32_to_cpu(rsp_params->surplus_entry);
+ cfg->surplus_exit = le32_to_cpu(rsp_params->surplus_exit);
+ cfg->options = le32_to_cpu(rsp_params->options);
+ cfg->message_ctx = le64_to_cpu(rsp_params->message_ctx);
+ cfg->message_iova = le64_to_cpu(rsp_params->message_iova);
+
+ return 0;
+}
diff --git a/drivers/bus/fslmc/mc/fsl_dpbp.h b/drivers/bus/fslmc/mc/fsl_dpbp.h
index 8a021f55f1..c79b511715 100644
--- a/drivers/bus/fslmc/mc/fsl_dpbp.h
+++ b/drivers/bus/fslmc/mc/fsl_dpbp.h
@@ -1,7 +1,7 @@
/* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0)
*
* Copyright 2013-2016 Freescale Semiconductor Inc.
- * Copyright 2016-2017 NXP
+ * Copyright 2016-2017, 2025 NXP
*
*/
#ifndef __FSL_DPBP_H
@@ -16,6 +16,34 @@
struct fsl_mc_io;
+/**
+ * struct dpbp_notification_cfg - Structure representing DPBP notifications
+ * towards software
+ * @depletion_entry: below this threshold the pool is "depleted";
+ * set it to '0' to disable it
+ * @depletion_exit: greater than or equal to this threshold the pool exit its
+ * "depleted" state
+ * @surplus_entry: above this threshold the pool is in "surplus" state;
+ * set it to '0' to disable it
+ * @surplus_exit: less than or equal to this threshold the pool exit its
+ * "surplus" state
+ * @message_iova: MUST be given if either 'depletion_entry' or 'surplus_entry'
+ * is not '0' (enable); I/O virtual address (must be in DMA-able memory),
+ * must be 16B aligned.
+ * @message_ctx: The context that will be part of the BPSCN message and will
+ * be written to 'message_iova'
+ * @options: Mask of available options; use 'DPBP_NOTIF_OPT_<X>' values
+ */
+struct dpbp_notification_cfg {
+ uint32_t depletion_entry;
+ uint32_t depletion_exit;
+ uint32_t surplus_entry;
+ uint32_t surplus_exit;
+ uint64_t message_iova;
+ uint64_t message_ctx;
+ uint32_t options;
+};
+
__rte_internal
int dpbp_open(struct fsl_mc_io *mc_io,
uint32_t cmd_flags,
@@ -25,7 +53,18 @@ int dpbp_open(struct fsl_mc_io *mc_io,
int dpbp_close(struct fsl_mc_io *mc_io,
uint32_t cmd_flags,
uint16_t token);
+__rte_internal
+int dpbp_set_notifications(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ struct dpbp_notification_cfg *cfg);
+__rte_internal
+int dpbp_get_notifications(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ struct dpbp_notification_cfg *cfg);
+#define DPBP_NOTIF_OPT_WRIOP 0x00010000
/**
* struct dpbp_cfg - Structure representing DPBP configuration
* @options: place holder
diff --git a/drivers/mempool/dpaa2/dpaa2_hw_mempool.c b/drivers/mempool/dpaa2/dpaa2_hw_mempool.c
index 09729d2828..eb22a14fb5 100644
--- a/drivers/mempool/dpaa2/dpaa2_hw_mempool.c
+++ b/drivers/mempool/dpaa2/dpaa2_hw_mempool.c
@@ -38,6 +38,32 @@ RTE_EXPORT_INTERNAL_SYMBOL(rte_dpaa2_bpid_info)
struct dpaa2_bp_info *rte_dpaa2_bpid_info;
static struct dpaa2_bp_list *h_bp_list;
+int
+rte_dpaa2_dpbp_set_notifications(struct rte_mempool *mp,
+ struct dpaa2_dpbp_cfg *dpbp_cfg)
+{
+ struct dpaa2_dpbp_dev *avail_dpbp;
+ struct dpaa2_bp_info *bpinfo;
+ struct dpaa2_bp_list *bp;
+ int ret;
+
+ bpinfo = mempool_to_bpinfo(mp);
+ bp = bpinfo->bp_list;
+
+ avail_dpbp = bp->buf_pool.dpbp_node;
+
+ ret = dpbp_set_notifications(&avail_dpbp->dpbp, CMD_PRI_LOW,
+ avail_dpbp->token,
+ (struct dpbp_notification_cfg *) dpbp_cfg);
+ if (ret) {
+ DPAA2_MEMPOOL_ERR("DPBP set notifications failure!");
+ return ret;
+ }
+ bp->dpbp_notification_enable = true;
+
+ return 0;
+}
+
static int
rte_hw_mbuf_create_pool(struct rte_mempool *mp)
{
diff --git a/drivers/mempool/dpaa2/dpaa2_hw_mempool.h b/drivers/mempool/dpaa2/dpaa2_hw_mempool.h
index 9e21823fb6..f2583be4c6 100644
--- a/drivers/mempool/dpaa2/dpaa2_hw_mempool.h
+++ b/drivers/mempool/dpaa2/dpaa2_hw_mempool.h
@@ -48,6 +48,7 @@ struct dpaa2_bp_list {
struct rte_mempool *mp; /**< DPDK RTE EAL pool reference */
int32_t dpaa2_ops_index; /**< Index into DPDK Mempool ops table */
struct buf_pool buf_pool;
+ bool dpbp_notification_enable;
};
struct dpaa2_bp_info {
diff --git a/drivers/mempool/dpaa2/rte_dpaa2_mempool.h b/drivers/mempool/dpaa2/rte_dpaa2_mempool.h
index 0286090b1b..c1cf160a21 100644
--- a/drivers/mempool/dpaa2/rte_dpaa2_mempool.h
+++ b/drivers/mempool/dpaa2/rte_dpaa2_mempool.h
@@ -19,6 +19,16 @@
extern "C" {
#endif
+struct dpaa2_dpbp_cfg {
+ uint32_t depletion_entry;
+ uint32_t depletion_exit;
+ uint32_t surplus_entry;
+ uint32_t surplus_exit;
+ uint64_t message_iova;
+ uint64_t message_ctx;
+ uint32_t options;
+};
+
/**
* Get BPID corresponding to the packet pool
*
@@ -62,6 +72,8 @@ rte_dpaa2_mbuf_from_buf_addr(struct rte_mempool *mp, void *buf_addr);
__rte_internal
int rte_dpaa2_bpid_info_init(struct rte_mempool *mp);
+int rte_dpaa2_dpbp_set_notifications(struct rte_mempool *mp, struct dpaa2_dpbp_cfg *dpbp_cfg);
+
#ifdef __cplusplus
}
#endif
diff --git a/drivers/net/dpaa2/dpaa2_ethdev.c b/drivers/net/dpaa2/dpaa2_ethdev.c
index c154a574ce..d17785a6ee 100644
--- a/drivers/net/dpaa2/dpaa2_ethdev.c
+++ b/drivers/net/dpaa2/dpaa2_ethdev.c
@@ -745,6 +745,9 @@ dpaa2_dev_rx_queue_setup(struct rte_eth_dev *dev,
dpaa2_q->nb_desc = UINT16_MAX;
dpaa2_q->offloads = rx_conf->offloads;
+ if (priv->bp_list->dpbp_notification_enable)
+ priv->enable_bp_flow_ctrl = true;
+
/*Get the flow id from given VQ id*/
flow_id = dpaa2_q->flow_id;
memset(&cfg, 0, sizeof(struct dpni_queue));
@@ -1176,7 +1179,7 @@ dpaa2_eth_setup_irqs(struct rte_eth_dev *dev, int enable)
return err;
}
-
+static int dpaa2_flow_ctrl_set(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf);
static int
dpaa2_dev_start(struct rte_eth_dev *dev)
{
@@ -1191,11 +1194,27 @@ dpaa2_dev_start(struct rte_eth_dev *dev)
struct dpaa2_queue *dpaa2_q;
int ret, i;
struct rte_intr_handle *intr_handle;
+ struct rte_eth_fc_conf *fc_conf;
+
+ PMD_INIT_FUNC_TRACE();
dpaa2_dev = container_of(rdev, struct rte_dpaa2_device, device);
intr_handle = dpaa2_dev->intr_handle;
- PMD_INIT_FUNC_TRACE();
+ if (priv->enable_bp_flow_ctrl) {
+ fc_conf = rte_zmalloc(NULL, sizeof(struct rte_eth_fc_conf),
+ RTE_CACHE_LINE_SIZE);
+ fc_conf->autoneg = 0;
+ fc_conf->mode = RTE_ETH_FC_FULL;
+
+ ret = dpaa2_flow_ctrl_set(dev, fc_conf);
+ if (ret) {
+ DPAA2_PMD_ERR("Unable to set flow ctrl");
+ return ret;
+ }
+ rte_free(fc_conf);
+ }
+
ret = dpni_enable(dpni, CMD_PRI_LOW, priv->token);
if (ret) {
DPAA2_PMD_ERR("Failure in enabling dpni %d device: err=%d",
@@ -1298,6 +1317,7 @@ dpaa2_dev_stop(struct rte_eth_dev *dev)
struct rte_device *rdev = dev->device;
struct rte_intr_handle *intr_handle;
struct rte_dpaa2_device *dpaa2_dev;
+ struct rte_eth_fc_conf *fc_conf;
uint16_t i;
dpaa2_dev = container_of(rdev, struct rte_dpaa2_device, device);
@@ -1305,6 +1325,19 @@ dpaa2_dev_stop(struct rte_eth_dev *dev)
PMD_INIT_FUNC_TRACE();
+ if (priv->enable_bp_flow_ctrl) {
+ fc_conf = rte_zmalloc(NULL, sizeof(struct rte_eth_fc_conf),
+ RTE_CACHE_LINE_SIZE);
+ fc_conf->mode = RTE_ETH_FC_NONE;
+
+ ret = dpaa2_flow_ctrl_set(dev, fc_conf);
+ if (ret) {
+ DPAA2_PMD_ERR("Unable to set flow ctrl");
+ return ret;
+ }
+ rte_free(fc_conf);
+ }
+
/* reset interrupt callback */
if (intr_handle && rte_intr_fd_get(intr_handle) &&
dev->data->dev_conf.intr_conf.lsc != 0) {
@@ -2110,7 +2143,7 @@ dpaa2_flow_ctrl_get(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
return ret;
}
-static int
+int
dpaa2_flow_ctrl_set(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
{
int ret = -EINVAL;
diff --git a/drivers/net/dpaa2/dpaa2_ethdev.h b/drivers/net/dpaa2/dpaa2_ethdev.h
index f32c31c763..103fa2ca67 100644
--- a/drivers/net/dpaa2/dpaa2_ethdev.h
+++ b/drivers/net/dpaa2/dpaa2_ethdev.h
@@ -409,6 +409,7 @@ struct dpaa2_dev_priv {
struct rte_eth_dev *eth_dev; /**< Pointer back to holding ethdev */
rte_spinlock_t lpbk_qp_lock;
+ bool enable_bp_flow_ctrl;
uint8_t channel_inuse;
/* Stores correction offset for one step timestamping */
uint16_t ptp_correction_offset;
--
2.25.1
^ permalink raw reply [flat|nested] 24+ messages in thread* [PATCH 04/11] mempool/dpaa2: use unified VA to IOVA conversion
2025-05-30 7:13 [PATCH 00/11] NXP DPAA2 driver enhancements and fixes Gagandeep Singh
` (2 preceding siblings ...)
2025-05-30 7:13 ` [PATCH 03/11] bus/fslmc: add DPBP APIs for setting depletion thresholds Gagandeep Singh
@ 2025-05-30 7:13 ` Gagandeep Singh
2025-05-30 7:13 ` [PATCH 05/11] net/dpaa2: add dpmac MC header file Gagandeep Singh
` (7 subsequent siblings)
11 siblings, 0 replies; 24+ messages in thread
From: Gagandeep Singh @ 2025-05-30 7:13 UTC (permalink / raw)
To: dev, Hemant Agrawal, Sachin Saxena; +Cc: Jun Yang
From: Jun Yang <jun.yang@nxp.com>
Use DPAA2_VADDR_TO_IOVA to convert va to iova for both VA and PA modes.
Signed-off-by: Jun Yang <jun.yang@nxp.com>
---
drivers/mempool/dpaa2/dpaa2_hw_mempool.c | 220 +++++++++++++++--------
1 file changed, 141 insertions(+), 79 deletions(-)
diff --git a/drivers/mempool/dpaa2/dpaa2_hw_mempool.c b/drivers/mempool/dpaa2/dpaa2_hw_mempool.c
index eb22a14fb5..da49c25900 100644
--- a/drivers/mempool/dpaa2/dpaa2_hw_mempool.c
+++ b/drivers/mempool/dpaa2/dpaa2_hw_mempool.c
@@ -224,26 +224,47 @@ rte_hw_mbuf_free_pool(struct rte_mempool *mp)
dpaa2_free_dpbp_dev(dpbp_node);
}
-static void
-rte_dpaa2_mbuf_release(struct rte_mempool *pool __rte_unused,
- void * const *obj_table,
- uint32_t bpid,
- uint32_t meta_data_size,
- int count)
+static inline int
+dpaa2_bman_multi_release(uint64_t *bufs, int num,
+ struct qbman_swp *swp,
+ const struct qbman_release_desc *releasedesc)
+{
+ int retry_count = 0, ret;
+
+release_again:
+ ret = qbman_swp_release(swp, releasedesc, bufs, num);
+ if (unlikely(ret == -EBUSY)) {
+ retry_count++;
+ if (retry_count <= DPAA2_MAX_TX_RETRY_COUNT)
+ goto release_again;
+
+ DPAA2_MEMPOOL_ERR("bman release retry exceeded, low fbpr?");
+ return ret;
+ }
+ if (unlikely(ret)) {
+ DPAA2_MEMPOOL_ERR("bman release failed(err=%d)", ret);
+ return ret;
+ }
+
+ return 0;
+}
+
+static int
+dpaa2_mbuf_release(void * const *obj_table, uint32_t bpid,
+ uint32_t meta_data_size, int count)
{
struct qbman_release_desc releasedesc;
struct qbman_swp *swp;
int ret;
- int i, n, retry_count;
+ int i, n;
uint64_t bufs[DPAA2_MBUF_MAX_ACQ_REL];
if (unlikely(!DPAA2_PER_LCORE_DPIO)) {
ret = dpaa2_affine_qbman_swp();
- if (ret != 0) {
- DPAA2_MEMPOOL_ERR(
- "Failed to allocate IO portal, tid: %d",
- rte_gettid());
- return;
+ if (ret) {
+ DPAA2_MEMPOOL_ERR("affine portal err: %d, tid: %d",
+ ret, rte_gettid());
+ return -EIO;
}
}
swp = DPAA2_PER_LCORE_PORTAL;
@@ -259,51 +280,62 @@ rte_dpaa2_mbuf_release(struct rte_mempool *pool __rte_unused,
goto aligned;
/* convert mbuf to buffers for the remainder */
- for (i = 0; i < n ; i++) {
-#ifdef RTE_LIBRTE_DPAA2_USE_PHYS_IOVA
- bufs[i] = (uint64_t)rte_mempool_virt2iova(obj_table[i])
- + meta_data_size;
-#else
- bufs[i] = (uint64_t)obj_table[i] + meta_data_size;
-#endif
+ if (likely(rte_eal_iova_mode() == RTE_IOVA_VA)) {
+ for (i = 0; i < n ; i++) {
+ bufs[i] = DPAA2_VAMODE_VADDR_TO_IOVA(obj_table[i]) +
+ meta_data_size;
+ }
+ } else {
+ for (i = 0; i < n ; i++) {
+ bufs[i] = DPAA2_PAMODE_VADDR_TO_IOVA(obj_table[i]) +
+ meta_data_size;
+ }
}
/* feed them to bman */
- retry_count = 0;
- while ((ret = qbman_swp_release(swp, &releasedesc, bufs, n)) ==
- -EBUSY) {
- retry_count++;
- if (retry_count > DPAA2_MAX_TX_RETRY_COUNT) {
- DPAA2_MEMPOOL_ERR("bman release retry exceeded, low fbpr?");
- return;
- }
- }
+ ret = dpaa2_bman_multi_release(bufs, n, swp, &releasedesc);
+ if (unlikely(ret))
+ return 0;
aligned:
/* if there are more buffers to free */
+ if (unlikely(rte_eal_iova_mode() != RTE_IOVA_VA))
+ goto iova_pa_release;
+
while (n < count) {
/* convert mbuf to buffers */
for (i = 0; i < DPAA2_MBUF_MAX_ACQ_REL; i++) {
-#ifdef RTE_LIBRTE_DPAA2_USE_PHYS_IOVA
- bufs[i] = (uint64_t)
- rte_mempool_virt2iova(obj_table[n + i])
- + meta_data_size;
-#else
- bufs[i] = (uint64_t)obj_table[n + i] + meta_data_size;
-#endif
+ bufs[i] = DPAA2_VAMODE_VADDR_TO_IOVA(obj_table[n + i]) +
+ meta_data_size;
}
- retry_count = 0;
- while ((ret = qbman_swp_release(swp, &releasedesc, bufs,
- DPAA2_MBUF_MAX_ACQ_REL)) == -EBUSY) {
- retry_count++;
- if (retry_count > DPAA2_MAX_TX_RETRY_COUNT) {
- DPAA2_MEMPOOL_ERR("bman release retry exceeded, low fbpr?");
- return;
- }
+ ret = dpaa2_bman_multi_release(bufs,
+ DPAA2_MBUF_MAX_ACQ_REL, swp, &releasedesc);
+ if (unlikely(ret))
+ return n;
+
+ n += DPAA2_MBUF_MAX_ACQ_REL;
+ }
+
+ return count;
+
+iova_pa_release:
+ while (n < count) {
+ /* convert mbuf to buffers */
+ for (i = 0; i < DPAA2_MBUF_MAX_ACQ_REL; i++) {
+ bufs[i] = DPAA2_PAMODE_VADDR_TO_IOVA(obj_table[n + i]) +
+ meta_data_size;
}
+
+ ret = dpaa2_bman_multi_release(bufs,
+ DPAA2_MBUF_MAX_ACQ_REL, swp, &releasedesc);
+ if (unlikely(ret))
+ return n;
+
n += DPAA2_MBUF_MAX_ACQ_REL;
}
+
+ return count;
}
RTE_EXPORT_INTERNAL_SYMBOL(rte_dpaa2_bpid_info_init)
@@ -387,56 +419,79 @@ rte_dpaa2_mbuf_alloc_bulk(struct rte_mempool *pool,
if (unlikely(!DPAA2_PER_LCORE_DPIO)) {
ret = dpaa2_affine_qbman_swp();
- if (ret != 0) {
- DPAA2_MEMPOOL_ERR(
- "Failed to allocate IO portal, tid: %d",
- rte_gettid());
+ if (ret) {
+ DPAA2_MEMPOOL_ERR("affine portal err: %d, tid: %d",
+ ret, rte_gettid());
return ret;
}
}
swp = DPAA2_PER_LCORE_PORTAL;
+ if (unlikely(rte_eal_iova_mode() != RTE_IOVA_VA))
+ goto iova_pa_acquire;
+
while (n < count) {
/* Acquire is all-or-nothing, so we drain in 7s,
* then the remainder.
*/
- if ((count - n) > DPAA2_MBUF_MAX_ACQ_REL) {
- ret = qbman_swp_acquire(swp, bpid, (void *)bufs,
- DPAA2_MBUF_MAX_ACQ_REL);
- } else {
- ret = qbman_swp_acquire(swp, bpid, (void *)bufs,
- count - n);
+ ret = qbman_swp_acquire(swp, bpid, bufs,
+ (count - n) > DPAA2_MBUF_MAX_ACQ_REL ?
+ DPAA2_MBUF_MAX_ACQ_REL : (count - n));
+ if (unlikely(ret <= 0))
+ goto acquire_failed;
+
+ /* assigning mbuf from the acquired objects */
+ for (i = 0; i < ret; i++) {
+ DPAA2_VAMODE_MODIFY_IOVA_TO_VADDR(bufs[i],
+ size_t);
+ obj_table[n] = (void *)(bufs[i] -
+ bp_info->meta_data_size);
+ n++;
}
- /* In case of less than requested number of buffers available
- * in pool, qbman_swp_acquire returns 0
+ }
+ goto acquire_success;
+
+iova_pa_acquire:
+
+ while (n < count) {
+ /* Acquire is all-or-nothing, so we drain in 7s,
+ * then the remainder.
*/
- if (ret <= 0) {
- DPAA2_MEMPOOL_DP_DEBUG(
- "Buffer acquire failed with err code: %d", ret);
- /* The API expect the exact number of requested bufs */
- /* Releasing all buffers allocated */
- rte_dpaa2_mbuf_release(pool, obj_table, bpid,
- bp_info->meta_data_size, n);
- return -ENOBUFS;
- }
+ ret = qbman_swp_acquire(swp, bpid, bufs,
+ (count - n) > DPAA2_MBUF_MAX_ACQ_REL ?
+ DPAA2_MBUF_MAX_ACQ_REL : (count - n));
+ if (unlikely(ret <= 0))
+ goto acquire_failed;
+
/* assigning mbuf from the acquired objects */
- for (i = 0; (i < ret) && bufs[i]; i++) {
- DPAA2_MODIFY_IOVA_TO_VADDR(bufs[i], size_t);
- obj_table[n] = (struct rte_mbuf *)
- (bufs[i] - bp_info->meta_data_size);
- DPAA2_MEMPOOL_DP_DEBUG(
- "Acquired %p address %p from BMAN\n",
- (void *)bufs[i], (void *)obj_table[n]);
+ for (i = 0; i < ret; i++) {
+ DPAA2_PAMODE_MODIFY_IOVA_TO_VADDR(bufs[i],
+ size_t);
+ obj_table[n] = (void *)(bufs[i] -
+ bp_info->meta_data_size);
n++;
}
}
+acquire_success:
#ifdef RTE_LIBRTE_DPAA2_DEBUG_DRIVER
alloc += n;
- DPAA2_MEMPOOL_DP_DEBUG("Total = %d , req = %d done = %d\n",
- alloc, count, n);
+ DPAA2_MEMPOOL_DP_DEBUG("Total = %d , req = %d done = %d",
+ alloc, count, n);
#endif
return 0;
+
+acquire_failed:
+ DPAA2_MEMPOOL_DP_DEBUG("Buffer acquire err: %d", ret);
+ /* The API expect the exact number of requested bufs */
+ /* Releasing all buffers allocated */
+ ret = dpaa2_mbuf_release(obj_table, bpid,
+ bp_info->meta_data_size, n);
+ if (ret != (int)n) {
+ DPAA2_MEMPOOL_ERR("%s: expect to free %d!= %d",
+ __func__, n, ret);
+ }
+ return -ENOBUFS;
}
static int
@@ -444,14 +499,21 @@ rte_hw_mbuf_free_bulk(struct rte_mempool *pool,
void * const *obj_table, unsigned int n)
{
struct dpaa2_bp_info *bp_info;
+ int ret;
bp_info = mempool_to_bpinfo(pool);
if (!(bp_info->bp_list)) {
DPAA2_MEMPOOL_ERR("DPAA2 buffer pool not configured");
return -ENOENT;
}
- rte_dpaa2_mbuf_release(pool, obj_table, bp_info->bpid,
- bp_info->meta_data_size, n);
+ ret = dpaa2_mbuf_release(obj_table, bp_info->bpid,
+ bp_info->meta_data_size, n);
+ if (unlikely(ret != (int)n)) {
+ DPAA2_MEMPOOL_ERR("%s: expect to free %d!= %d",
+ __func__, n, ret);
+
+ return -EIO;
+ }
return 0;
}
@@ -497,6 +559,7 @@ dpaa2_populate(struct rte_mempool *mp, unsigned int max_objs,
rte_mempool_populate_obj_cb_t *obj_cb, void *obj_cb_arg)
{
struct rte_memseg_list *msl;
+ int ret;
/* The memsegment list exists incase the memory is not external.
* So, DMA-Map is required only when memory is provided by user,
* i.e. External.
@@ -505,11 +568,10 @@ dpaa2_populate(struct rte_mempool *mp, unsigned int max_objs,
if (!msl) {
DPAA2_MEMPOOL_DEBUG("Memsegment is External.");
- rte_fslmc_vfio_mem_dmamap((size_t)vaddr,
- (size_t)paddr, (size_t)len);
+ ret = rte_fslmc_vfio_mem_dmamap((size_t)vaddr, paddr, len);
+ if (ret)
+ return ret;
}
- /* Insert entry into the PA->VA Table */
- dpaax_iova_table_update(paddr, vaddr, len);
return rte_mempool_op_populate_helper(mp, 0, max_objs, vaddr, paddr,
len, obj_cb, obj_cb_arg);
--
2.25.1
^ permalink raw reply [flat|nested] 24+ messages in thread* [PATCH 05/11] net/dpaa2: add dpmac MC header file
2025-05-30 7:13 [PATCH 00/11] NXP DPAA2 driver enhancements and fixes Gagandeep Singh
` (3 preceding siblings ...)
2025-05-30 7:13 ` [PATCH 04/11] mempool/dpaa2: use unified VA to IOVA conversion Gagandeep Singh
@ 2025-05-30 7:13 ` Gagandeep Singh
2025-05-30 7:13 ` [PATCH 06/11] net/dpaa2: support dpmac counters in stats Gagandeep Singh
` (6 subsequent siblings)
11 siblings, 0 replies; 24+ messages in thread
From: Gagandeep Singh @ 2025-05-30 7:13 UTC (permalink / raw)
To: dev, Hemant Agrawal, Sachin Saxena; +Cc: Apeksha Gupta
From: Apeksha Gupta <apeksha.gupta@nxp.com>
This patch upgrades the MC firmware release API compatibility
to 10.39.0. Added mc/fsl_dpmac.h file.
Signed-off-by: Apeksha Gupta <apeksha.gupta@nxp.com>
---
drivers/net/dpaa2/mc/fsl_dpmac.h | 490 +++++++++++++++++++++++++++++++
1 file changed, 490 insertions(+)
create mode 100644 drivers/net/dpaa2/mc/fsl_dpmac.h
diff --git a/drivers/net/dpaa2/mc/fsl_dpmac.h b/drivers/net/dpaa2/mc/fsl_dpmac.h
new file mode 100644
index 0000000000..f1be36ee79
--- /dev/null
+++ b/drivers/net/dpaa2/mc/fsl_dpmac.h
@@ -0,0 +1,490 @@
+/* Copyright 2013-2016 Freescale Semiconductor Inc.
+ * Copyright 2018-2022, 2024 NXP
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of the above-listed copyright holders nor the
+ * names of any contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+#ifndef __FSL_DPMAC_H
+#define __FSL_DPMAC_H
+
+/** @addtogroup dpmac Data Path MAC API
+ * Contains initialization APIs and runtime control APIs for DPMAC
+ * @{
+ */
+
+struct fsl_mc_io;
+
+int dpmac_open(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ int dpmac_id,
+ uint16_t *token);
+
+int dpmac_close(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token);
+
+/**
+ * enum dpmac_link_type - DPMAC link type
+ * @DPMAC_LINK_TYPE_NONE: No link
+ * @DPMAC_LINK_TYPE_FIXED: Link is fixed type
+ * @DPMAC_LINK_TYPE_PHY: Link by PHY ID
+ * @DPMAC_LINK_TYPE_BACKPLANE: Backplane link type
+ */
+enum dpmac_link_type {
+ DPMAC_LINK_TYPE_NONE,
+ DPMAC_LINK_TYPE_FIXED,
+ DPMAC_LINK_TYPE_PHY,
+ DPMAC_LINK_TYPE_BACKPLANE
+};
+
+/**
+ * enum dpmac_eth_if - DPMAC Ethrnet interface
+ * @DPMAC_ETH_IF_MII: MII interface
+ * @DPMAC_ETH_IF_RMII: RMII interface
+ * @DPMAC_ETH_IF_SMII: SMII interface
+ * @DPMAC_ETH_IF_GMII: GMII interface
+ * @DPMAC_ETH_IF_RGMII: RGMII interface
+ * @DPMAC_ETH_IF_SGMII: SGMII interface
+ * @DPMAC_ETH_IF_QSGMII: QSGMII interface
+ * @DPMAC_ETH_IF_XAUI: XAUI interface
+ * @DPMAC_ETH_IF_XFI: XFI interface
+ * @DPMAC_ETH_IF_CAUI: CAUI interface
+ * @DPMAC_ETH_IF_1000BASEX: 1000BASEX interface
+ * @DPMAC_ETH_IF_USXGMII: USXGMII interface
+ */
+enum dpmac_eth_if {
+ DPMAC_ETH_IF_MII,
+ DPMAC_ETH_IF_RMII,
+ DPMAC_ETH_IF_SMII,
+ DPMAC_ETH_IF_GMII,
+ DPMAC_ETH_IF_RGMII,
+ DPMAC_ETH_IF_SGMII,
+ DPMAC_ETH_IF_QSGMII,
+ DPMAC_ETH_IF_XAUI,
+ DPMAC_ETH_IF_XFI,
+ DPMAC_ETH_IF_CAUI,
+ DPMAC_ETH_IF_1000BASEX,
+ DPMAC_ETH_IF_USXGMII,
+};
+/*
+ * @DPMAC_FEC_NONE: RS-FEC (enabled by default) is disabled
+ * @DPMAC_FEC_RS: RS-FEC (Clause 91) mode configured
+ * @DPMAC_FEC_FC: FC-FEC (Clause 74) mode configured (not yet supported)
+ */
+enum dpmac_fec_mode {
+ DPMAC_FEC_NONE,
+ DPMAC_FEC_RS,
+ DPMAC_FEC_FC,
+};
+
+/* serdes sfi/custom settings feature internals
+ * @SERDES_CFG_DEFAULT: the default configuration.
+ * @SERDES_CFG_SFI: default operating mode for XFI interfaces
+ * @SERDES_CFG_CUSTOM: It allows the user to manually configure the type of equalization,
+ * amplitude, preq and post1q settings. Can be used with all interfaces except RGMII.
+ */
+enum serdes_eq_cfg_mode {
+ SERDES_CFG_DEFAULT = 0,
+ SERDES_CFG_SFI,
+ SERDES_CFG_CUSTOM,
+};
+
+/**
+ * struct dpmac_cfg - Structure representing DPMAC configuration
+ * @mac_id: Represents the Hardware MAC ID; in case of multiple WRIOP,
+ * the MAC IDs are continuous.
+ * For example: 2 WRIOPs, 16 MACs in each:
+ * MAC IDs for the 1st WRIOP: 1-16,
+ * MAC IDs for the 2nd WRIOP: 17-32.
+ */
+struct dpmac_cfg {
+ uint16_t mac_id;
+};
+
+int dpmac_create(struct fsl_mc_io *mc_io,
+ uint16_t dprc_token,
+ uint32_t cmd_flags,
+ const struct dpmac_cfg *cfg,
+ uint32_t *obj_id);
+
+int dpmac_destroy(struct fsl_mc_io *mc_io,
+ uint16_t dprc_token,
+ uint32_t cmd_flags,
+ uint32_t object_id);
+
+/**
+ * DPMAC IRQ Index and Events
+ */
+
+/**
+ * IRQ index
+ */
+#define DPMAC_IRQ_INDEX 0
+/**
+ * IRQ event - indicates a change in link state
+ */
+#define DPMAC_IRQ_EVENT_LINK_CFG_REQ 0x00000001
+/**
+ * IRQ event - Indicates that the link state changed
+ */
+#define DPMAC_IRQ_EVENT_LINK_CHANGED 0x00000002
+/**
+ * IRQ event - The object requests link up
+ */
+#define DPMAC_IRQ_EVENT_LINK_UP_REQ 0x00000004
+/**
+ * IRQ event - The object requests link down
+ */
+#define DPMAC_IRQ_EVENT_LINK_DOWN_REQ 0x00000008
+/**
+ * IRQ event - indicates a change in endpoint
+ */
+#define DPMAC_IRQ_EVENT_ENDPOINT_CHANGED 0x00000010
+
+int dpmac_set_irq_enable(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ uint8_t irq_index,
+ uint8_t en);
+
+int dpmac_get_irq_enable(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ uint8_t irq_index,
+ uint8_t *en);
+
+int dpmac_set_irq_mask(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ uint8_t irq_index,
+ uint32_t mask);
+
+int dpmac_get_irq_mask(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ uint8_t irq_index,
+ uint32_t *mask);
+
+int dpmac_get_irq_status(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ uint8_t irq_index,
+ uint32_t *status);
+
+int dpmac_clear_irq_status(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ uint8_t irq_index,
+ uint32_t status);
+
+/**
+ * @brief Inter-Frame Gap mode
+ *
+ * LAN/WAN uses different Inter-Frame Gap mode
+ */
+enum dpmac_ifg_mode {
+ DPMAC_IFG_MODE_FIXED,
+ /*!< IFG length represents number of octets in steps of 4 */
+ DPMAC_IFG_MODE_STRECHED
+ /*!< IFG length represents the stretch factor */
+};
+
+/**
+ * @brief Structure representing Inter-Frame Gap mode configuration
+ */
+struct dpmac_ifg_cfg {
+ enum dpmac_ifg_mode ipg_mode; /*!< WAN/LAN mode */
+ uint8_t ipg_length; /*!< IPG Length, default value is 0xC */
+};
+
+/**
+ * @brief Structure used to read through MDIO
+ */
+struct dpmac_mdio_read {
+ uint8_t cl45; /*!< Clause 45 */
+ uint8_t phy_addr; /*!< MDIO PHY address */
+ uint16_t reg; /*!< PHY register */
+};
+
+/**
+ * @brief Structure used to write through MDIO
+ */
+struct dpmac_mdio_write {
+ uint8_t cl45; /*!< Clause 45 */
+ uint8_t phy_addr; /*!< MDIO PHY address */
+ uint16_t reg; /*!< PHY register */
+ uint16_t data; /*!< Data to be written */
+};
+
+#define DPMAC_SET_PARAMS_IFG 0x1
+
+/**
+ * struct serdes_eq_settings - Structure SerDes equalization settings
+ * cfg: serdes sfi/custom/default settings feature internals
+ * @eq_type: Number of levels of TX equalization
+ * @sgn_preq: Precursor sign indicating direction of eye closure
+ * @eq_preq: Drive strength of TX full swing transition bit to precursor
+ * @sgn_post1q: First post-cursor sign indicating direction of eye closure
+ * @eq_post1q: Drive strength of full swing transition bit to first post-cursor
+ * @eq_amp_red: Overall transmit amplitude reduction
+ */
+struct serdes_eq_settings {
+ enum serdes_eq_cfg_mode cfg;
+ int eq_type;
+ int sgn_preq;
+ int eq_preq;
+ int sgn_post1q;
+ int eq_post1q;
+ int eq_amp_red;
+};
+
+/**
+ * struct dpmac_attr - Structure representing DPMAC attributes
+ * @id: DPMAC object ID
+ * @max_rate: Maximum supported rate - in Mbps
+ * @eth_if: Ethernet interface
+ * @link_type: link type
+ * @fec_mode: FEC mode - Configurable only for 25G interfaces
+ * serdes_cfg: SerDes equalization settings
+ */
+struct dpmac_attr {
+ uint16_t id;
+ uint32_t max_rate;
+ enum dpmac_eth_if eth_if;
+ enum dpmac_link_type link_type;
+ enum dpmac_fec_mode fec_mode;
+ struct serdes_eq_settings serdes_cfg;
+ struct dpmac_ifg_cfg ifg_cfg;
+};
+
+int dpmac_get_attributes(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ struct dpmac_attr *attr);
+
+int dpmac_set_params(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ uint32_t flags,
+ struct dpmac_ifg_cfg ifg_cfg);
+
+int dpmac_get_mac_addr(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ uint8_t mac_addr[6]);
+
+/**
+ * DPMAC link configuration/state options
+ */
+
+/**
+ * Enable auto-negotiation
+ */
+#define DPMAC_LINK_OPT_AUTONEG 0x0000000000000001ULL
+/**
+ * Enable half-duplex mode
+ */
+#define DPMAC_LINK_OPT_HALF_DUPLEX 0x0000000000000002ULL
+/**
+ * Enable pause frames
+ */
+#define DPMAC_LINK_OPT_PAUSE 0x0000000000000004ULL
+/**
+ * Enable a-symmetric pause frames
+ */
+#define DPMAC_LINK_OPT_ASYM_PAUSE 0x0000000000000008ULL
+/**
+ * Advertise 10MB full duplex
+ */
+#define DPMAC_ADVERTISED_10BASET_FULL 0x0000000000000001ULL
+/**
+ * Advertise 100MB full duplex
+ */
+#define DPMAC_ADVERTISED_100BASET_FULL 0x0000000000000002ULL
+/**
+ * Advertise 1GB full duplex
+ */
+#define DPMAC_ADVERTISED_1000BASET_FULL 0x0000000000000004ULL
+/**
+ * Advertise auto-negotiation enable
+ */
+#define DPMAC_ADVERTISED_AUTONEG 0x0000000000000008ULL
+/**
+ * Advertise 10GB full duplex
+ */
+#define DPMAC_ADVERTISED_10000BASET_FULL 0x0000000000000010ULL
+/**
+ * Advertise 2.5GB full duplex
+ */
+#define DPMAC_ADVERTISED_2500BASEX_FULL 0x0000000000000020ULL
+/**
+ * Advertise 5GB full duplex
+ */
+#define DPMAC_ADVERTISED_5000BASET_FULL 0x0000000000000040ULL
+
+/**
+ * struct dpmac_link_cfg - Structure representing DPMAC link configuration
+ * @rate: Link's rate - in Mbps
+ * @options: Enable/Disable DPMAC link cfg features (bitmap)
+ * @advertising: Speeds that are advertised for autoneg (bitmap)
+ */
+struct dpmac_link_cfg {
+ uint32_t rate;
+ uint64_t options;
+ uint64_t advertising;
+};
+
+int dpmac_get_link_cfg(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ struct dpmac_link_cfg *cfg);
+
+/**
+ * struct dpmac_link_state - DPMAC link configuration request
+ * @rate: Rate in Mbps
+ * @options: Enable/Disable DPMAC link cfg features (bitmap)
+ * @up: Link state
+ * @state_valid: Ignore/Update the state of the link
+ * @supported: Speeds capability of the phy (bitmap)
+ * @advertising: Speeds that are advertised for autoneg (bitmap)
+ */
+struct dpmac_link_state {
+ uint32_t rate;
+ uint64_t options;
+ int up;
+ int state_valid;
+ uint64_t supported;
+ uint64_t advertising;
+};
+
+int dpmac_set_link_state(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ struct dpmac_link_state *link_state);
+
+/**
+ * enum dpmac_counter - DPMAC counter types
+ * @DPMAC_CNT_ING_FRAME_64: counts 64-bytes frames, good or bad.
+ * @DPMAC_CNT_ING_FRAME_127: counts 65- to 127-bytes frames, good or bad.
+ * @DPMAC_CNT_ING_FRAME_255: counts 128- to 255-bytes frames, good or bad.
+ * @DPMAC_CNT_ING_FRAME_511: counts 256- to 511-bytes frames, good or bad.
+ * @DPMAC_CNT_ING_FRAME_1023: counts 512- to 1023-bytes frames, good or bad.
+ * @DPMAC_CNT_ING_FRAME_1518: counts 1024- to 1518-bytes frames, good or bad.
+ * @DPMAC_CNT_ING_FRAME_1519_MAX: counts 1519-bytes frames and larger
+ * (up to max frame length specified),
+ * good or bad.
+ * @DPMAC_CNT_ING_FRAG: counts frames which are shorter than 64 bytes received
+ * with a wrong CRC
+ * @DPMAC_CNT_ING_JABBER: counts frames longer than the maximum frame length
+ * specified, with a bad frame check sequence.
+ * @DPMAC_CNT_ING_FRAME_DISCARD: counts dropped frames due to internal errors.
+ * Occurs when a receive FIFO overflows.
+ * Includes also frames truncated as a result of
+ * the receive FIFO overflow.
+ * @DPMAC_CNT_ING_ALIGN_ERR: counts frames with an alignment error
+ * (optional used for wrong SFD).
+ * @DPMAC_CNT_EGR_UNDERSIZED: counts frames transmitted that was less than 64
+ * bytes long with a good CRC.
+ * @DPMAC_CNT_ING_OVERSIZED: counts frames longer than the maximum frame length
+ * specified, with a good frame check sequence.
+ * @DPMAC_CNT_ING_VALID_PAUSE_FRAME: counts valid pause frames (regular and PFC)
+ * @DPMAC_CNT_EGR_VALID_PAUSE_FRAME: counts valid pause frames transmitted
+ * (regular and PFC).
+ * @DPMAC_CNT_ING_BYTE: counts bytes received except preamble for all valid
+ * frames and valid pause frames.
+ * @DPMAC_CNT_ING_MCAST_FRAME: counts received multicast frames.
+ * @DPMAC_CNT_ING_BCAST_FRAME: counts received broadcast frames.
+ * @DPMAC_CNT_ING_ALL_FRAME: counts each good or bad frames received.
+ * @DPMAC_CNT_ING_UCAST_FRAME: counts received unicast frames.
+ * @DPMAC_CNT_ING_ERR_FRAME: counts frames received with an error
+ * (except for undersized/fragment frame).
+ * @DPMAC_CNT_EGR_BYTE: counts bytes transmitted except preamble for all valid
+ * frames and valid pause frames transmitted.
+ * @DPMAC_CNT_EGR_MCAST_FRAME: counts transmitted multicast frames.
+ * @DPMAC_CNT_EGR_BCAST_FRAME: counts transmitted broadcast frames.
+ * @DPMAC_CNT_EGR_UCAST_FRAME: counts transmitted unicast frames.
+ * @DPMAC_CNT_EGR_ERR_FRAME: counts frames transmitted with an error.
+ * @DPMAC_CNT_ING_GOOD_FRAME: counts frames received without error, including
+ * pause frames.
+ * @DPMAC_CNT_EGR_GOOD_FRAME: counts frames transmitted without error, including
+ * pause frames.
+ */
+enum dpmac_counter {
+ DPMAC_CNT_ING_FRAME_64,
+ DPMAC_CNT_ING_FRAME_127,
+ DPMAC_CNT_ING_FRAME_255,
+ DPMAC_CNT_ING_FRAME_511,
+ DPMAC_CNT_ING_FRAME_1023,
+ DPMAC_CNT_ING_FRAME_1518,
+ DPMAC_CNT_ING_FRAME_1519_MAX,
+ DPMAC_CNT_ING_FRAG,
+ DPMAC_CNT_ING_JABBER,
+ DPMAC_CNT_ING_FRAME_DISCARD,
+ DPMAC_CNT_ING_ALIGN_ERR,
+ DPMAC_CNT_EGR_UNDERSIZED,
+ DPMAC_CNT_ING_OVERSIZED,
+ DPMAC_CNT_ING_VALID_PAUSE_FRAME,
+ DPMAC_CNT_EGR_VALID_PAUSE_FRAME,
+ DPMAC_CNT_ING_BYTE,
+ DPMAC_CNT_ING_MCAST_FRAME,
+ DPMAC_CNT_ING_BCAST_FRAME,
+ DPMAC_CNT_ING_ALL_FRAME,
+ DPMAC_CNT_ING_UCAST_FRAME,
+ DPMAC_CNT_ING_ERR_FRAME,
+ DPMAC_CNT_EGR_BYTE,
+ DPMAC_CNT_EGR_MCAST_FRAME,
+ DPMAC_CNT_EGR_BCAST_FRAME,
+ DPMAC_CNT_EGR_UCAST_FRAME,
+ DPMAC_CNT_EGR_ERR_FRAME,
+ DPMAC_CNT_ING_GOOD_FRAME,
+ DPMAC_CNT_EGR_GOOD_FRAME
+};
+
+int dpmac_get_counter(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ enum dpmac_counter type,
+ uint64_t *counter);
+
+int dpmac_get_api_version(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t *major_ver,
+ uint16_t *minor_ver);
+
+int dpmac_reset(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token);
+
+int dpmac_set_protocol(struct fsl_mc_io *mc_io, uint32_t cmd_flags,
+ uint16_t token, enum dpmac_eth_if protocol);
+
+int dpmac_get_statistics(struct fsl_mc_io *mc_io, uint32_t cmd_flags, uint16_t token,
+ uint64_t iova_cnt, uint64_t iova_values, uint32_t num_cnt);
+
+#endif /* __FSL_DPMAC_H */
--
2.25.1
^ permalink raw reply [flat|nested] 24+ messages in thread* [PATCH 06/11] net/dpaa2: support dpmac counters in stats
2025-05-30 7:13 [PATCH 00/11] NXP DPAA2 driver enhancements and fixes Gagandeep Singh
` (4 preceding siblings ...)
2025-05-30 7:13 ` [PATCH 05/11] net/dpaa2: add dpmac MC header file Gagandeep Singh
@ 2025-05-30 7:13 ` Gagandeep Singh
2025-05-30 7:13 ` [PATCH 07/11] net/dpaa2: support dpmac Tx stats Gagandeep Singh
` (5 subsequent siblings)
11 siblings, 0 replies; 24+ messages in thread
From: Gagandeep Singh @ 2025-05-30 7:13 UTC (permalink / raw)
To: dev, Hemant Agrawal, Sachin Saxena; +Cc: Apeksha Gupta, Vanshika Shukla
From: Apeksha Gupta <apeksha.gupta@nxp.com>
Add support of dpmac counters in xstats.
Signed-off-by: Apeksha Gupta <apeksha.gupta@nxp.com>
Signed-off-by: Vanshika Shukla <vanshika.shukla@nxp.com>
---
drivers/net/dpaa2/dpaa2_ethdev.c | 118 ++++++++++++++++++++++++++--
drivers/net/dpaa2/dpaa2_ethdev.h | 12 +++
drivers/net/dpaa2/mc/dpni.c | 29 ++++++-
drivers/net/dpaa2/mc/fsl_dpni.h | 3 +
drivers/net/dpaa2/mc/fsl_dpni_cmd.h | 11 ++-
5 files changed, 163 insertions(+), 10 deletions(-)
diff --git a/drivers/net/dpaa2/dpaa2_ethdev.c b/drivers/net/dpaa2/dpaa2_ethdev.c
index d17785a6ee..bbf4df69d4 100644
--- a/drivers/net/dpaa2/dpaa2_ethdev.c
+++ b/drivers/net/dpaa2/dpaa2_ethdev.c
@@ -106,6 +106,34 @@ static const struct rte_dpaa2_xstats_name_off dpaa2_xstats_strings[] = {
{"egress_confirmed_frames", 2, 4},
{"cgr_reject_frames", 4, 0},
{"cgr_reject_bytes", 4, 1},
+ {"mac_rx_64 bytes", 0, 0},
+ {"mac_rx_65-127 bytes", 0, 0},
+ {"mac_rx_128-255 bytes", 0, 0},
+ {"mac_rx_256-511 bytes", 0, 0},
+ {"mac_rx_512-1023 bytes", 0, 0},
+ {"mac_rx_1024-1518 bytes", 0, 0},
+ {"mac_rx_1519-max bytes", 0, 0},
+ {"mac_rx_frags", 0, 0},
+ {"mac_rx_jabber", 0, 0},
+ {"mac_rx_frame discards", 0, 0},
+ {"mac_rx_align errors", 0, 0},
+ {"mac_tx_undersized", 0, 0},
+ {"mac_rx_oversized", 0, 0},
+ {"mac_rx_pause", 0, 0},
+ {"mac_tx_b-pause", 0, 0},
+ {"mac_rx_bytes", 0, 0},
+ {"mac_rx_m-cast", 0, 0},
+ {"mac_rx_b-cast", 0, 0},
+ {"mac_rx_all frames", 0, 0},
+ {"mac_rx_u-cast", 0, 0},
+ {"mac_rx_frame errors", 0, 0},
+ {"mac_tx_bytes", 0, 0},
+ {"mac_tx_m-cast", 0, 0},
+ {"mac_tx_b-cast", 0, 0},
+ {"mac_tx_u-cast", 0, 0},
+ {"mac_tx_frame errors", 0, 0},
+ {"mac_rx_frames ok", 0, 0},
+ {"mac_tx_frames ok", 0, 0},
};
static struct rte_dpaa2_driver rte_dpaa2_pmd;
@@ -1713,16 +1741,67 @@ dpaa2_dev_stats_get(struct rte_eth_dev *dev,
return retcode;
};
+void
+dpaa2_dev_mac_setup_stats(struct rte_eth_dev *dev)
+{
+ struct dpaa2_dev_priv *priv = dev->data->dev_private;
+ uint32_t *cnt_idx;
+ int i;
+
+ priv->cnt_idx_dma_mem = rte_malloc(NULL, DPAA2_MAC_STATS_INDEX_DMA_SIZE,
+ RTE_CACHE_LINE_SIZE);
+ if (!priv->cnt_idx_dma_mem) {
+ DPAA2_PMD_ERR("Failure to allocate memory for mac index");
+ goto out;
+ }
+
+ priv->cnt_values_dma_mem = rte_malloc(NULL, DPAA2_MAC_STATS_VALUE_DMA_SIZE,
+ RTE_CACHE_LINE_SIZE);
+ if (!priv->cnt_values_dma_mem) {
+ DPAA2_PMD_ERR("Failure to allocate memory for mac values");
+ goto err_alloc_values;
+ }
+
+ cnt_idx = priv->cnt_idx_dma_mem;
+ for (i = 0; i < DPAA2_MAC_NUM_STATS; i++)
+ *cnt_idx++ = rte_cpu_to_le_32((uint32_t)i);
+
+ priv->cnt_idx_iova = rte_mem_virt2iova(priv->cnt_idx_dma_mem);
+ if (priv->cnt_idx_iova == RTE_BAD_IOVA) {
+ DPAA2_PMD_ERR("%s: No IOMMU map for count index dma mem(%p)",
+ __func__, priv->cnt_idx_dma_mem);
+ goto err_dma_map;
+ }
+
+ priv->cnt_values_iova = rte_mem_virt2iova(priv->cnt_values_dma_mem);
+ if (priv->cnt_values_iova == RTE_BAD_IOVA) {
+ DPAA2_PMD_ERR("%s: No IOMMU map for count values dma mem(%p)",
+ __func__, priv->cnt_values_dma_mem);
+ goto err_dma_map;
+ }
+
+ return;
+
+err_dma_map:
+ rte_free(priv->cnt_values_dma_mem);
+err_alloc_values:
+ rte_free(priv->cnt_idx_dma_mem);
+out:
+ priv->cnt_idx_dma_mem = NULL;
+ priv->cnt_values_dma_mem = NULL;
+}
+
static int
dpaa2_dev_xstats_get(struct rte_eth_dev *dev,
struct rte_eth_xstat *xstats, unsigned int n)
{
- struct dpaa2_dev_priv *priv = dev->data->dev_private;
struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
- int32_t retcode;
+ unsigned int i = 0, j = 0, num = RTE_DIM(dpaa2_xstats_strings);
+ struct dpaa2_dev_priv *priv = dev->data->dev_private;
union dpni_statistics value[5] = {};
- unsigned int i = 0, num = RTE_DIM(dpaa2_xstats_strings);
uint8_t page_id, stats_id;
+ uint64_t *cnt_values;
+ int32_t retcode;
if (n < num)
return num;
@@ -1748,8 +1827,8 @@ dpaa2_dev_xstats_get(struct rte_eth_dev *dev,
if (retcode)
goto err;
- for (i = 0; i < priv->max_cgs; i++) {
- if (!priv->cgid_in_use[i]) {
+ for (j = 0; j < priv->max_cgs; j++) {
+ if (!priv->cgid_in_use[j]) {
/* Get Counters from page_4*/
retcode = dpni_get_statistics(dpni, CMD_PRI_LOW,
priv->token,
@@ -1759,13 +1838,38 @@ dpaa2_dev_xstats_get(struct rte_eth_dev *dev,
break;
}
}
-
- for (i = 0; i < num; i++) {
+ while (i < (num - DPAA2_MAC_NUM_STATS)) {
xstats[i].id = i;
page_id = dpaa2_xstats_strings[i].page_id;
stats_id = dpaa2_xstats_strings[i].stats_id;
xstats[i].value = value[page_id].raw.counter[stats_id];
+ i++;
+ }
+
+ dpaa2_dev_mac_setup_stats(dev);
+ retcode = dpni_get_mac_statistics(dpni, CMD_PRI_LOW, priv->token,
+ priv->cnt_idx_iova, priv->cnt_values_iova,
+ DPAA2_MAC_NUM_STATS);
+ if (retcode) {
+ DPAA2_PMD_WARN("MAC (mac_*) counters are not supported!!");
+ rte_free(priv->cnt_values_dma_mem);
+ rte_free(priv->cnt_idx_dma_mem);
+ while (i >= (num - DPAA2_MAC_NUM_STATS) && i < num) {
+ xstats[i].id = i;
+ xstats[i].value = 0;
+ i++;
+ }
}
+ if (!retcode) {
+ cnt_values = priv->cnt_values_dma_mem;
+ while (i >= (num - DPAA2_MAC_NUM_STATS) && i < num) {
+ /* mac counters value */
+ xstats[i].id = i;
+ xstats[i].value = rte_le_to_cpu_64(*cnt_values++);
+ i++;
+ }
+ }
+
return i;
err:
DPAA2_PMD_ERR("Error in obtaining extended stats (%d)", retcode);
diff --git a/drivers/net/dpaa2/dpaa2_ethdev.h b/drivers/net/dpaa2/dpaa2_ethdev.h
index 103fa2ca67..532c257203 100644
--- a/drivers/net/dpaa2/dpaa2_ethdev.h
+++ b/drivers/net/dpaa2/dpaa2_ethdev.h
@@ -18,6 +18,7 @@
#include <mc/fsl_dpni.h>
#include <mc/fsl_mc_sys.h>
+#include <mc/fsl_dpmac.h>
#include "base/dpaa2_hw_dpni_annot.h"
@@ -129,6 +130,11 @@
#define DPAA2_PKT_TYPE_VLAN_1 0x0160
#define DPAA2_PKT_TYPE_VLAN_2 0x0260
+/* mac counters */
+#define DPAA2_MAC_NUM_STATS (DPMAC_CNT_EGR_GOOD_FRAME + 1)
+#define DPAA2_MAC_STATS_INDEX_DMA_SIZE (DPAA2_MAC_NUM_STATS * sizeof(uint32_t))
+#define DPAA2_MAC_STATS_VALUE_DMA_SIZE (DPAA2_MAC_NUM_STATS * sizeof(uint64_t))
+
/* Global pool used by driver for SG list TX */
extern struct rte_mempool *dpaa2_tx_sg_pool;
/* Maximum SG segments */
@@ -413,6 +419,10 @@ struct dpaa2_dev_priv {
uint8_t channel_inuse;
/* Stores correction offset for one step timestamping */
uint16_t ptp_correction_offset;
+ /* for mac counters */
+ uint32_t *cnt_idx_dma_mem;
+ uint64_t *cnt_values_dma_mem;
+ uint64_t cnt_idx_iova, cnt_values_iova;
struct dpaa2_dev_flow *curr;
LIST_HEAD(, dpaa2_dev_flow) flows;
@@ -498,4 +508,6 @@ int dpaa2_dev_recycle_qp_setup(struct rte_dpaa2_device *dpaa2_dev,
struct dpaa2_queue **txq,
struct dpaa2_queue **rxq);
+void
+dpaa2_dev_mac_setup_stats(struct rte_eth_dev *dev);
#endif /* _DPAA2_ETHDEV_H */
diff --git a/drivers/net/dpaa2/mc/dpni.c b/drivers/net/dpaa2/mc/dpni.c
index 558f08dc69..f651f29b02 100644
--- a/drivers/net/dpaa2/mc/dpni.c
+++ b/drivers/net/dpaa2/mc/dpni.c
@@ -1,7 +1,7 @@
/* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0)
*
* Copyright 2013-2016 Freescale Semiconductor Inc.
- * Copyright 2016-2023 NXP
+ * Copyright 2016-2025 NXP
*
*/
#include <fsl_mc_sys.h>
@@ -3493,3 +3493,30 @@ int dpni_sp_enable(struct fsl_mc_io *mc_io, uint32_t cmd_flags, uint16_t token,
/* send command to MC */
return mc_send_command(mc_io, &cmd);
}
+/**
+ * dpni_get_mac_statistics() - Get statistics on the connected DPMAC objects
+ * @mc_io: Pointer to opaque I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token: Token of DPMAC object
+ * @iova_cnt: IOVA containing the requested MAC counters formatted as an
+ * array of __le32 representing the dpmac_counter_id.
+ * @iova_values: IOVA containing the values for all the requested counters
+ * formatted as an array of __le64.
+ * @num_cnt: Number of counters requested
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dpni_get_mac_statistics(struct fsl_mc_io *mc_io, uint32_t cmd_flags, uint16_t token,
+ uint64_t iova_cnt, uint64_t iova_values, uint32_t num_cnt)
+{
+ struct dpni_cmd_get_mac_statistics *cmd_params;
+ struct mc_command cmd = { 0 };
+
+ cmd.header = mc_encode_cmd_header(DPNI_CMDID_GET_MAC_STATISTICS, cmd_flags, token);
+ cmd_params = (struct dpni_cmd_get_mac_statistics *)cmd.params;
+ cmd_params->iova_cnt = cpu_to_le64(iova_cnt);
+ cmd_params->iova_values = cpu_to_le64(iova_values);
+ cmd_params->num_cnt = cpu_to_le32(num_cnt);
+
+ return mc_send_command(mc_io, &cmd);
+}
diff --git a/drivers/net/dpaa2/mc/fsl_dpni.h b/drivers/net/dpaa2/mc/fsl_dpni.h
index 3a5fcfa8a5..2f8125314c 100644
--- a/drivers/net/dpaa2/mc/fsl_dpni.h
+++ b/drivers/net/dpaa2/mc/fsl_dpni.h
@@ -2014,4 +2014,7 @@ int dpni_set_sp_profile(struct fsl_mc_io *mc_io, uint32_t cmd_flags, uint16_t to
int dpni_sp_enable(struct fsl_mc_io *mc_io, uint32_t cmd_flags, uint16_t token,
uint8_t type, uint8_t en);
+int dpni_get_mac_statistics(struct fsl_mc_io *mc_io, uint32_t cmd_flags, uint16_t token,
+ uint64_t iova_cnt, uint64_t iova_values, uint32_t num_cnt);
+
#endif /* __FSL_DPNI_H */
diff --git a/drivers/net/dpaa2/mc/fsl_dpni_cmd.h b/drivers/net/dpaa2/mc/fsl_dpni_cmd.h
index 1152182e34..f653f2c0e4 100644
--- a/drivers/net/dpaa2/mc/fsl_dpni_cmd.h
+++ b/drivers/net/dpaa2/mc/fsl_dpni_cmd.h
@@ -1,7 +1,7 @@
/* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0)
*
* Copyright 2013-2016 Freescale Semiconductor Inc.
- * Copyright 2016-2023 NXP
+ * Copyright 2016-2025 NXP
*
*/
#ifndef _FSL_DPNI_CMD_H
@@ -9,7 +9,7 @@
/* DPNI Version */
#define DPNI_VER_MAJOR 8
-#define DPNI_VER_MINOR 4
+#define DPNI_VER_MINOR 6
#define DPNI_CMD_BASE_VERSION 1
#define DPNI_CMD_VERSION_2 2
@@ -131,6 +131,7 @@
#define DPNI_CMDID_SP_ENABLE DPNI_CMD(0x280)
#define DPNI_CMDID_SET_QUEUE_TX_CONFIRMATION_MODE DPNI_CMD(0x281)
#define DPNI_CMDID_GET_QUEUE_TX_CONFIRMATION_MODE DPNI_CMD(0x282)
+#define DPNI_CMDID_GET_MAC_STATISTICS DPNI_CMD(0x283)
/* Macros for accessing command fields smaller than 1byte */
#define DPNI_MASK(field) \
@@ -1024,5 +1025,11 @@ struct dpni_cmd_sp_enable {
uint8_t en;
};
+struct dpni_cmd_get_mac_statistics {
+ uint64_t iova_cnt;
+ uint64_t iova_values;
+ uint32_t num_cnt;
+};
+
#pragma pack(pop)
#endif /* _FSL_DPNI_CMD_H */
--
2.25.1
^ permalink raw reply [flat|nested] 24+ messages in thread* [PATCH 07/11] net/dpaa2: support dpmac Tx stats
2025-05-30 7:13 [PATCH 00/11] NXP DPAA2 driver enhancements and fixes Gagandeep Singh
` (5 preceding siblings ...)
2025-05-30 7:13 ` [PATCH 06/11] net/dpaa2: support dpmac counters in stats Gagandeep Singh
@ 2025-05-30 7:13 ` Gagandeep Singh
2025-05-30 7:13 ` [PATCH 08/11] net/dpaa2: support dpmac Tx stats in xstats Gagandeep Singh
` (4 subsequent siblings)
11 siblings, 0 replies; 24+ messages in thread
From: Gagandeep Singh @ 2025-05-30 7:13 UTC (permalink / raw)
To: dev, Hemant Agrawal, Sachin Saxena; +Cc: Apeksha Gupta, Vanshika Shukla
From: Apeksha Gupta <apeksha.gupta@nxp.com>
Added all mac counters including Tx stats buckets for
packet sizes.
Signed-off-by: Apeksha Gupta <apeksha.gupta@nxp.com>
Signed-off-by: Vanshika Shukla <vanshika.shukla@nxp.com>
---
drivers/net/dpaa2/mc/fsl_dpmac.h | 50 ++++++++++++++++++++++++++++++--
1 file changed, 48 insertions(+), 2 deletions(-)
diff --git a/drivers/net/dpaa2/mc/fsl_dpmac.h b/drivers/net/dpaa2/mc/fsl_dpmac.h
index f1be36ee79..a71f1658da 100644
--- a/drivers/net/dpaa2/mc/fsl_dpmac.h
+++ b/drivers/net/dpaa2/mc/fsl_dpmac.h
@@ -1,5 +1,5 @@
/* Copyright 2013-2016 Freescale Semiconductor Inc.
- * Copyright 2018-2022, 2024 NXP
+ * Copyright 2018-2022, 2024-2025 NXP
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
@@ -434,6 +434,34 @@ int dpmac_set_link_state(struct fsl_mc_io *mc_io,
* pause frames.
* @DPMAC_CNT_EGR_GOOD_FRAME: counts frames transmitted without error, including
* pause frames.
+ * @DPMAC_CNT_EGR_FRAME_64: counts transmitted 64-bytes frames, good or bad.
+ * @DPMAC_CNT_EGR_FRAME_127: counts transmitted 65 to 127-bytes frames, good or bad.
+ * @DPMAC_CNT_EGR_FRAME_255: counts transmitted 128 to 255-bytes frames, good or bad.
+ * @DPMAC_CNT_EGR_FRAME_511: counts transmitted 256 to 511-bytes frames, good or bad.
+ * @DPMAC_CNT_EGR_FRAME_1023: counts transmitted 512 to 1023-bytes frames, good or bad.
+ * @DPMAC_CNT_EGR_FRAME_1518: counts transmitted 1024 to 1518-bytes frames, good or bad.
+ * @DPMAC_CNT_EGR_FRAME_1519_MAX: counts transmitted 1519-bytes frames and
+ * larger (up to max frame length specified), good or bad.
+ * @DPMAC_CNT_ING_ALL_BYTE: counts bytes received in both good and bad packets
+ * @DPMAC_CNT_ING_FCS_ERR: counts frames received with a CRC-32 error but the
+ * frame is otherwise of correct length
+ * @DPMAC_CNT_ING_VLAN_FRAME: counts the received VLAN tagged frames which are valid.
+ * @DPMAC_CNT_ING_UNDERSIZED: counts received frames which were less than 64
+ * bytes long and with a good CRC.
+ * @DPMAC_CNT_ING_CONTROL_FRAME: counts received control frames (type 0x8808)
+ * but not pause frames.
+ * @DPMAC_CNT_ING_FRAME_DISCARD_NOT_TRUNC: counts the fully dropped frames (not
+ * truncated) due to internal errors of the MAC client. Occurs when a received
+ * FIFO overflows.
+ * @DPMAC_CNT_EGR_ALL_BYTE: counts transmitted bytes in both good and bad
+ * packets.
+ * @DPMAC_CNT_EGR_FCS_ERR: counts trasmitted frames with a CRC-32 error except
+ * for underflows.
+ * @DPMAC_CNT_EGR_VLAN_FRAME: counts the transmitted VLAN tagged frames which
+ * are valid.
+ * @DPMAC_CNT_EGR_ALL_FRAME: counts all trasmitted frames, good or bad.
+ * @DPMAC_CNT_EGR_CONTROL_FRAME: counts transmitted control frames (type
+ * 0x8808) but not pause frames.
*/
enum dpmac_counter {
DPMAC_CNT_ING_FRAME_64,
@@ -463,7 +491,25 @@ enum dpmac_counter {
DPMAC_CNT_EGR_UCAST_FRAME,
DPMAC_CNT_EGR_ERR_FRAME,
DPMAC_CNT_ING_GOOD_FRAME,
- DPMAC_CNT_EGR_GOOD_FRAME
+ DPMAC_CNT_EGR_GOOD_FRAME,
+ DPMAC_CNT_EGR_FRAME_64,
+ DPMAC_CNT_EGR_FRAME_127,
+ DPMAC_CNT_EGR_FRAME_255,
+ DPMAC_CNT_EGR_FRAME_511,
+ DPMAC_CNT_EGR_FRAME_1023,
+ DPMAC_CNT_EGR_FRAME_1518,
+ DPMAC_CNT_EGR_FRAME_1519_MAX,
+ DPMAC_CNT_ING_ALL_BYTE,
+ DPMAC_CNT_ING_FCS_ERR,
+ DPMAC_CNT_ING_VLAN_FRAME,
+ DPMAC_CNT_ING_UNDERSIZED,
+ DPMAC_CNT_ING_CONTROL_FRAME,
+ DPMAC_CNT_ING_FRAME_DISCARD_NOT_TRUNC,
+ DPMAC_CNT_EGR_ALL_BYTE,
+ DPMAC_CNT_EGR_FCS_ERR,
+ DPMAC_CNT_EGR_VLAN_FRAME,
+ DPMAC_CNT_EGR_ALL_FRAME,
+ DPMAC_CNT_EGR_CONTROL_FRAME
};
int dpmac_get_counter(struct fsl_mc_io *mc_io,
--
2.25.1
^ permalink raw reply [flat|nested] 24+ messages in thread* [PATCH 08/11] net/dpaa2: support dpmac Tx stats in xstats
2025-05-30 7:13 [PATCH 00/11] NXP DPAA2 driver enhancements and fixes Gagandeep Singh
` (6 preceding siblings ...)
2025-05-30 7:13 ` [PATCH 07/11] net/dpaa2: support dpmac Tx stats Gagandeep Singh
@ 2025-05-30 7:13 ` Gagandeep Singh
2025-05-30 7:13 ` [PATCH 09/11] net/dpaa2: retrieve DPNI API version at init time Gagandeep Singh
` (3 subsequent siblings)
11 siblings, 0 replies; 24+ messages in thread
From: Gagandeep Singh @ 2025-05-30 7:13 UTC (permalink / raw)
To: dev, Hemant Agrawal, Sachin Saxena; +Cc: Apeksha Gupta, Vanshika Shukla
From: Apeksha Gupta <apeksha.gupta@nxp.com>
Added all mac counters including Tx stats buckets for
packet sizes in xstats.
Signed-off-by: Apeksha Gupta <apeksha.gupta@nxp.com>
Signed-off-by: Vanshika Shukla <vanshika.shukla@nxp.com>
---
drivers/net/dpaa2/dpaa2_ethdev.c | 20 +++++++++++++++++++-
drivers/net/dpaa2/dpaa2_ethdev.h | 4 ++--
2 files changed, 21 insertions(+), 3 deletions(-)
diff --git a/drivers/net/dpaa2/dpaa2_ethdev.c b/drivers/net/dpaa2/dpaa2_ethdev.c
index bbf4df69d4..298fded65e 100644
--- a/drivers/net/dpaa2/dpaa2_ethdev.c
+++ b/drivers/net/dpaa2/dpaa2_ethdev.c
@@ -1,7 +1,7 @@
/* * SPDX-License-Identifier: BSD-3-Clause
*
* Copyright (c) 2016 Freescale Semiconductor, Inc. All rights reserved.
- * Copyright 2016-2024 NXP
+ * Copyright 2016-2025 NXP
*
*/
@@ -134,6 +134,24 @@ static const struct rte_dpaa2_xstats_name_off dpaa2_xstats_strings[] = {
{"mac_tx_frame errors", 0, 0},
{"mac_rx_frames ok", 0, 0},
{"mac_tx_frames ok", 0, 0},
+ {"mac_tx_64 bytes", 0, 0},
+ {"mac_tx_65-127 bytes", 0, 0},
+ {"mac_tx_128-255 bytes", 0, 0},
+ {"mac_tx_256-511 bytes", 0, 0},
+ {"mac_tx_512-1023 bytes", 0, 0},
+ {"mac_tx_1024-1518 bytes", 0, 0},
+ {"mac_tx_1519-max bytes", 0, 0},
+ {"mac_rx_all_bytes", 0, 0},
+ {"mac_rx_fcs_err", 0, 0},
+ {"mac_rx_vlan_frame", 0, 0},
+ {"mac_rx_undersized", 0, 0},
+ {"mac_rx_control_frame", 0, 0},
+ {"mac_rx_frame_discard_not_trunc", 0, 0},
+ {"mac_tx_all_bytes", 0, 0},
+ {"mac_tx_fcs_err", 0, 0},
+ {"mac_tx_vlan_frame", 0, 0},
+ {"mac_tx_all_frame", 0, 0},
+ {"mac_tx_control_frame", 0, 0},
};
static struct rte_dpaa2_driver rte_dpaa2_pmd;
diff --git a/drivers/net/dpaa2/dpaa2_ethdev.h b/drivers/net/dpaa2/dpaa2_ethdev.h
index 532c257203..570b1608a0 100644
--- a/drivers/net/dpaa2/dpaa2_ethdev.h
+++ b/drivers/net/dpaa2/dpaa2_ethdev.h
@@ -1,7 +1,7 @@
/* SPDX-License-Identifier: BSD-3-Clause
*
* Copyright (c) 2015-2016 Freescale Semiconductor, Inc. All rights reserved.
- * Copyright 2016-2022 NXP
+ * Copyright 2016-2025 NXP
*
*/
@@ -131,7 +131,7 @@
#define DPAA2_PKT_TYPE_VLAN_2 0x0260
/* mac counters */
-#define DPAA2_MAC_NUM_STATS (DPMAC_CNT_EGR_GOOD_FRAME + 1)
+#define DPAA2_MAC_NUM_STATS (DPMAC_CNT_EGR_CONTROL_FRAME + 1)
#define DPAA2_MAC_STATS_INDEX_DMA_SIZE (DPAA2_MAC_NUM_STATS * sizeof(uint32_t))
#define DPAA2_MAC_STATS_VALUE_DMA_SIZE (DPAA2_MAC_NUM_STATS * sizeof(uint64_t))
--
2.25.1
^ permalink raw reply [flat|nested] 24+ messages in thread* [PATCH 09/11] net/dpaa2: retrieve DPNI API version at init time
2025-05-30 7:13 [PATCH 00/11] NXP DPAA2 driver enhancements and fixes Gagandeep Singh
` (7 preceding siblings ...)
2025-05-30 7:13 ` [PATCH 08/11] net/dpaa2: support dpmac Tx stats in xstats Gagandeep Singh
@ 2025-05-30 7:13 ` Gagandeep Singh
2025-05-30 7:13 ` [PATCH 10/11] net/dpaa2: setup the speed cap based on the actual MAC Gagandeep Singh
` (2 subsequent siblings)
11 siblings, 0 replies; 24+ messages in thread
From: Gagandeep Singh @ 2025-05-30 7:13 UTC (permalink / raw)
To: dev, Thomas Monjalon, Hemant Agrawal, Sachin Saxena; +Cc: Ioana Ciornei
From: Ioana Ciornei <ioana.ciornei@nxp.com>
The list of availabla DPNI APIs depends on the DPNI API version
available on a system. Retrieve the API version in the init stage and
store it in the private structure so that it can be used at a later
stage.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
---
.mailmap | 1 +
drivers/net/dpaa2/dpaa2_ethdev.c | 8 ++++++++
drivers/net/dpaa2/dpaa2_ethdev.h | 3 +++
3 files changed, 12 insertions(+)
diff --git a/.mailmap b/.mailmap
index 91e08f4a1f..93905921b1 100644
--- a/.mailmap
+++ b/.mailmap
@@ -606,6 +606,7 @@ Ilya Maximets <i.maximets@ovn.org> <i.maximets@samsung.com>
Ilya V. Matveychikov <matvejchikov@gmail.com>
Ilyes Ben Hamouda <ilyes.ben_hamouda@6wind.com>
Intiyaz Basha <intiyaz.basha@caviumnetworks.com>
+Ioana Ciornei <ioana.ciornei@nxp.com>
Isaac Boukris <iboukris@gmail.com>
Itamar Gozlan <igozlan@nvidia.com>
Itsuro Oda <oda@valinux.co.jp>
diff --git a/drivers/net/dpaa2/dpaa2_ethdev.c b/drivers/net/dpaa2/dpaa2_ethdev.c
index 298fded65e..b88c9d748a 100644
--- a/drivers/net/dpaa2/dpaa2_ethdev.c
+++ b/drivers/net/dpaa2/dpaa2_ethdev.c
@@ -2814,6 +2814,14 @@ dpaa2_dev_init(struct rte_eth_dev *eth_dev)
goto init_err;
}
+ ret = dpni_get_api_version(dpni_dev, CMD_PRI_LOW, &priv->dpni_ver_major,
+ &priv->dpni_ver_minor);
+ if (ret) {
+ DPAA2_PMD_ERR("Failure in get dpni@%d API version, err code %d",
+ hw_id, ret);
+ goto init_err;
+ }
+
priv->num_rx_tc = attr.num_rx_tcs;
priv->num_tx_tc = attr.num_tx_tcs;
priv->qos_entries = attr.qos_entries;
diff --git a/drivers/net/dpaa2/dpaa2_ethdev.h b/drivers/net/dpaa2/dpaa2_ethdev.h
index 570b1608a0..ee5ae3b70a 100644
--- a/drivers/net/dpaa2/dpaa2_ethdev.h
+++ b/drivers/net/dpaa2/dpaa2_ethdev.h
@@ -394,6 +394,9 @@ struct dpaa2_dev_priv {
uint8_t max_cgs;
uint8_t cgid_in_use[MAX_RX_QUEUES];
+ uint16_t dpni_ver_major;
+ uint16_t dpni_ver_minor;
+
enum rte_dpaa2_dev_type ep_dev_type; /**< Endpoint Device Type */
uint16_t ep_object_id; /**< Endpoint DPAA2 Object ID */
char ep_name[RTE_DEV_NAME_MAX_LEN];
--
2.25.1
^ permalink raw reply [flat|nested] 24+ messages in thread* [PATCH 10/11] net/dpaa2: setup the speed cap based on the actual MAC
2025-05-30 7:13 [PATCH 00/11] NXP DPAA2 driver enhancements and fixes Gagandeep Singh
` (8 preceding siblings ...)
2025-05-30 7:13 ` [PATCH 09/11] net/dpaa2: retrieve DPNI API version at init time Gagandeep Singh
@ 2025-05-30 7:13 ` Gagandeep Singh
2025-05-30 7:13 ` [PATCH 11/11] net/dpaa2: enable software taildrop for ordered queues Gagandeep Singh
2025-06-02 10:40 ` [PATCH v2 00/11] NXP DPAA2 driver enhancements and fixes Gagandeep Singh
11 siblings, 0 replies; 24+ messages in thread
From: Gagandeep Singh @ 2025-05-30 7:13 UTC (permalink / raw)
To: dev, Hemant Agrawal, Sachin Saxena; +Cc: Ioana Ciornei
From: Ioana Ciornei <ioana.ciornei@nxp.com>
Previously, the speed_capa field from struct rte_eth_dev_info was
populated with all possible speeds that the MACs on the system could
sustain. What this meant is that the bitmap of speed capability did not
reflect what the MAC could do in the current circumstance.
Fix this by using the newly added MC command
dpni_get_mac_speed_capability() which returns a bitmap of
enum dpmac_link_speed. Since the MC API is a newly added one, we check
for the DPNI version to determine is we can use the API, if not the code
will fallback to the procedure used up until now.
Also, we interogate the MC firmware only at probe time to get the needed
into and then we store the information in the private structure to
use it any time .dev_infos_get() is called.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
---
drivers/net/dpaa2/dpaa2_ethdev.c | 87 ++++++++++++++++++++++++++---
drivers/net/dpaa2/dpaa2_ethdev.h | 12 ++++
drivers/net/dpaa2/mc/dpni.c | 21 +++++++
drivers/net/dpaa2/mc/fsl_dpmac.h | 15 +++++
drivers/net/dpaa2/mc/fsl_dpni.h | 5 +-
drivers/net/dpaa2/mc/fsl_dpni_cmd.h | 4 ++
6 files changed, 134 insertions(+), 10 deletions(-)
diff --git a/drivers/net/dpaa2/dpaa2_ethdev.c b/drivers/net/dpaa2/dpaa2_ethdev.c
index b88c9d748a..c661e027f5 100644
--- a/drivers/net/dpaa2/dpaa2_ethdev.c
+++ b/drivers/net/dpaa2/dpaa2_ethdev.c
@@ -290,6 +290,79 @@ dpaa2_fw_version_get(struct rte_eth_dev *dev,
return 0;
}
+static uint32_t dpaa2_speed_to_rte_link_speed(enum dpmac_link_speed dpmac_speed)
+{
+ switch (dpmac_speed) {
+ case DPMAC_LINK_SPEED_10M:
+ return RTE_ETH_LINK_SPEED_10M;
+ case DPMAC_LINK_SPEED_100M:
+ return RTE_ETH_LINK_SPEED_100M;
+ case DPMAC_LINK_SPEED_1G:
+ return RTE_ETH_LINK_SPEED_1G;
+ case DPMAC_LINK_SPEED_2_5G:
+ return RTE_ETH_LINK_SPEED_2_5G;
+ case DPMAC_LINK_SPEED_5G:
+ return RTE_ETH_LINK_SPEED_5G;
+ case DPMAC_LINK_SPEED_10G:
+ return RTE_ETH_LINK_SPEED_10G;
+ case DPMAC_LINK_SPEED_25G:
+ return RTE_ETH_LINK_SPEED_25G;
+ case DPMAC_LINK_SPEED_40G:
+ return RTE_ETH_LINK_SPEED_40G;
+ case DPMAC_LINK_SPEED_50G:
+ return RTE_ETH_LINK_SPEED_50G;
+ case DPMAC_LINK_SPEED_100G:
+ return RTE_ETH_LINK_SPEED_100G;
+ default:
+ return 0;
+ }
+}
+
+static uint32_t dpaa2_dev_get_speed_capability(struct rte_eth_dev *dev)
+{
+ struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
+ struct dpaa2_dev_priv *priv = dev->data->dev_private;
+ enum dpmac_link_speed speed;
+ uint32_t dpmac_speed_cap;
+ uint32_t speed_capa = 0;
+ int ret;
+
+ /* The dpni_get_mac_supported_eth_if() API is only available starting
+ * with DPNI ver 8.6.
+ */
+ if (dpaa2_dev_cmp_dpni_ver(priv, DPNI_GET_MAC_SUPPORTED_IFS_VER_MAJOR,
+ DPNI_GET_MAC_SUPPORTED_IFS_VER_MINOR) < 0)
+ goto fallback;
+
+ if (priv->ep_dev_type != DPAA2_MAC)
+ goto fallback;
+
+ ret = dpni_get_mac_speed_capability(dpni, CMD_PRI_LOW, priv->token,
+ &dpmac_speed_cap);
+ if (ret < 0) {
+ DPAA2_PMD_WARN("dpni_get_mac_speed_capability() failed with %d", ret);
+ goto fallback;
+ }
+ for (speed = DPMAC_LINK_SPEED_10M; speed < DPMAC_LINK_SPEED_MAX; speed++) {
+ if ((dpmac_speed_cap & (1 << speed)) == 0)
+ continue;
+
+ speed_capa |= dpaa2_speed_to_rte_link_speed(speed);
+ }
+
+ return speed_capa;
+
+fallback:
+ speed_capa = RTE_ETH_LINK_SPEED_1G | RTE_ETH_LINK_SPEED_2_5G |
+ RTE_ETH_LINK_SPEED_10G;
+
+ if (dpaa2_svr_family == SVR_LX2160A)
+ speed_capa |= RTE_ETH_LINK_SPEED_25G | RTE_ETH_LINK_SPEED_40G |
+ RTE_ETH_LINK_SPEED_50G | RTE_ETH_LINK_SPEED_100G;
+
+ return speed_capa;
+}
+
static int
dpaa2_dev_info_get(struct rte_eth_dev *dev,
struct rte_eth_dev_info *dev_info)
@@ -307,9 +380,6 @@ dpaa2_dev_info_get(struct rte_eth_dev *dev,
dev_rx_offloads_nodis;
dev_info->tx_offload_capa = dev_tx_offloads_sup |
dev_tx_offloads_nodis;
- dev_info->speed_capa = RTE_ETH_LINK_SPEED_1G |
- RTE_ETH_LINK_SPEED_2_5G |
- RTE_ETH_LINK_SPEED_10G;
dev_info->dev_capa &= ~RTE_ETH_DEV_CAPA_FLOW_RULE_KEEP;
dev_info->max_hash_mac_addrs = 0;
@@ -326,12 +396,7 @@ dpaa2_dev_info_get(struct rte_eth_dev *dev,
dev_info->default_txportconf.ring_size = CONG_ENTER_TX_THRESHOLD;
dev_info->default_rxportconf.ring_size = DPAA2_RX_DEFAULT_NBDESC;
- if (dpaa2_svr_family == SVR_LX2160A) {
- dev_info->speed_capa |= RTE_ETH_LINK_SPEED_25G |
- RTE_ETH_LINK_SPEED_40G |
- RTE_ETH_LINK_SPEED_50G |
- RTE_ETH_LINK_SPEED_100G;
- }
+ dev_info->speed_capa = priv->speed_capa;
return 0;
}
@@ -1133,6 +1198,7 @@ dpaa2_supported_ptypes_get(struct rte_eth_dev *dev, size_t *no_of_elements)
/*todo -= add more types */
RTE_PTYPE_L2_ETHER,
RTE_PTYPE_L3_IPV4,
+
RTE_PTYPE_L3_IPV4_EXT,
RTE_PTYPE_L3_IPV6,
RTE_PTYPE_L3_IPV6_EXT,
@@ -3010,6 +3076,9 @@ dpaa2_dev_init(struct rte_eth_dev *eth_dev)
DPAA2_PMD_INFO("%s: netdev created, connected to %s",
eth_dev->data->name, dpaa2_dev->ep_name);
+
+ priv->speed_capa = dpaa2_dev_get_speed_capability(eth_dev);
+
return 0;
init_err:
dpaa2_dev_close(eth_dev);
diff --git a/drivers/net/dpaa2/dpaa2_ethdev.h b/drivers/net/dpaa2/dpaa2_ethdev.h
index ee5ae3b70a..70357f0351 100644
--- a/drivers/net/dpaa2/dpaa2_ethdev.h
+++ b/drivers/net/dpaa2/dpaa2_ethdev.h
@@ -396,6 +396,7 @@ struct dpaa2_dev_priv {
uint16_t dpni_ver_major;
uint16_t dpni_ver_minor;
+ uint32_t speed_capa;
enum rte_dpaa2_dev_type ep_dev_type; /**< Endpoint Device Type */
uint16_t ep_object_id; /**< Endpoint DPAA2 Object ID */
@@ -433,6 +434,17 @@ struct dpaa2_dev_priv {
LIST_HEAD(shaper_profiles, dpaa2_tm_shaper_profile) shaper_profiles;
};
+#define DPNI_GET_MAC_SUPPORTED_IFS_VER_MAJOR 8
+#define DPNI_GET_MAC_SUPPORTED_IFS_VER_MINOR 6
+
+static inline int dpaa2_dev_cmp_dpni_ver(struct dpaa2_dev_priv *priv,
+ uint16_t ver_major, uint16_t ver_minor)
+{
+ if (priv->dpni_ver_major == ver_major)
+ return priv->dpni_ver_minor - ver_minor;
+ return priv->dpni_ver_major - ver_major;
+}
+
int dpaa2_distset_to_dpkg_profile_cfg(uint64_t req_dist_set,
struct dpkg_profile_cfg *kg_cfg);
diff --git a/drivers/net/dpaa2/mc/dpni.c b/drivers/net/dpaa2/mc/dpni.c
index f651f29b02..a1f168dd04 100644
--- a/drivers/net/dpaa2/mc/dpni.c
+++ b/drivers/net/dpaa2/mc/dpni.c
@@ -3493,6 +3493,7 @@ int dpni_sp_enable(struct fsl_mc_io *mc_io, uint32_t cmd_flags, uint16_t token,
/* send command to MC */
return mc_send_command(mc_io, &cmd);
}
+
/**
* dpni_get_mac_statistics() - Get statistics on the connected DPMAC objects
* @mc_io: Pointer to opaque I/O object
@@ -3520,3 +3521,23 @@ int dpni_get_mac_statistics(struct fsl_mc_io *mc_io, uint32_t cmd_flags, uint16_
return mc_send_command(mc_io, &cmd);
}
+
+int dpni_get_mac_speed_capability(struct fsl_mc_io *mc_io, uint32_t cmd_flags, uint16_t token,
+ uint32_t *speed_cap)
+{
+ struct dpni_rsp_mac_speed_cap *rsp_params;
+ struct mc_command cmd = { 0 };
+ int err;
+
+ cmd.header = mc_encode_cmd_header(DPNI_CMDID_GET_MAC_SPEED_CAPABILITY,
+ cmd_flags, token);
+
+ err = mc_send_command(mc_io, &cmd);
+ if (err)
+ return err;
+
+ rsp_params = (struct dpni_rsp_mac_speed_cap *)cmd.params;
+ *speed_cap = le32_to_cpu(rsp_params->speed_cap);
+
+ return 0;
+}
diff --git a/drivers/net/dpaa2/mc/fsl_dpmac.h b/drivers/net/dpaa2/mc/fsl_dpmac.h
index a71f1658da..478c9cca20 100644
--- a/drivers/net/dpaa2/mc/fsl_dpmac.h
+++ b/drivers/net/dpaa2/mc/fsl_dpmac.h
@@ -92,6 +92,21 @@ enum dpmac_eth_if {
DPMAC_ETH_IF_1000BASEX,
DPMAC_ETH_IF_USXGMII,
};
+
+enum dpmac_link_speed {
+ DPMAC_LINK_SPEED_10M = 0,
+ DPMAC_LINK_SPEED_100M,
+ DPMAC_LINK_SPEED_1G,
+ DPMAC_LINK_SPEED_2_5G,
+ DPMAC_LINK_SPEED_5G,
+ DPMAC_LINK_SPEED_10G,
+ DPMAC_LINK_SPEED_25G,
+ DPMAC_LINK_SPEED_40G,
+ DPMAC_LINK_SPEED_50G,
+ DPMAC_LINK_SPEED_100G,
+ DPMAC_LINK_SPEED_MAX,
+};
+
/*
* @DPMAC_FEC_NONE: RS-FEC (enabled by default) is disabled
* @DPMAC_FEC_RS: RS-FEC (Clause 91) mode configured
diff --git a/drivers/net/dpaa2/mc/fsl_dpni.h b/drivers/net/dpaa2/mc/fsl_dpni.h
index 2f8125314c..8d28b8ce76 100644
--- a/drivers/net/dpaa2/mc/fsl_dpni.h
+++ b/drivers/net/dpaa2/mc/fsl_dpni.h
@@ -1,7 +1,7 @@
/* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0)
*
* Copyright 2013-2016 Freescale Semiconductor Inc.
- * Copyright 2016-2023 NXP
+ * Copyright 2016-2025 NXP
*
*/
#ifndef __FSL_DPNI_H
@@ -2017,4 +2017,7 @@ int dpni_sp_enable(struct fsl_mc_io *mc_io, uint32_t cmd_flags, uint16_t token,
int dpni_get_mac_statistics(struct fsl_mc_io *mc_io, uint32_t cmd_flags, uint16_t token,
uint64_t iova_cnt, uint64_t iova_values, uint32_t num_cnt);
+int dpni_get_mac_speed_capability(struct fsl_mc_io *mc_io, uint32_t cmd_flags, uint16_t token,
+ uint32_t *speed_cap);
+
#endif /* __FSL_DPNI_H */
diff --git a/drivers/net/dpaa2/mc/fsl_dpni_cmd.h b/drivers/net/dpaa2/mc/fsl_dpni_cmd.h
index f653f2c0e4..cf4558d540 100644
--- a/drivers/net/dpaa2/mc/fsl_dpni_cmd.h
+++ b/drivers/net/dpaa2/mc/fsl_dpni_cmd.h
@@ -132,6 +132,7 @@
#define DPNI_CMDID_SET_QUEUE_TX_CONFIRMATION_MODE DPNI_CMD(0x281)
#define DPNI_CMDID_GET_QUEUE_TX_CONFIRMATION_MODE DPNI_CMD(0x282)
#define DPNI_CMDID_GET_MAC_STATISTICS DPNI_CMD(0x283)
+#define DPNI_CMDID_GET_MAC_SPEED_CAPABILITY DPNI_CMD(0x284)
/* Macros for accessing command fields smaller than 1byte */
#define DPNI_MASK(field) \
@@ -1031,5 +1032,8 @@ struct dpni_cmd_get_mac_statistics {
uint32_t num_cnt;
};
+struct dpni_rsp_mac_speed_cap {
+ uint32_t speed_cap;
+};
#pragma pack(pop)
#endif /* _FSL_DPNI_CMD_H */
--
2.25.1
^ permalink raw reply [flat|nested] 24+ messages in thread* [PATCH 11/11] net/dpaa2: enable software taildrop for ordered queues
2025-05-30 7:13 [PATCH 00/11] NXP DPAA2 driver enhancements and fixes Gagandeep Singh
` (9 preceding siblings ...)
2025-05-30 7:13 ` [PATCH 10/11] net/dpaa2: setup the speed cap based on the actual MAC Gagandeep Singh
@ 2025-05-30 7:13 ` Gagandeep Singh
2025-06-02 10:40 ` [PATCH v2 00/11] NXP DPAA2 driver enhancements and fixes Gagandeep Singh
11 siblings, 0 replies; 24+ messages in thread
From: Gagandeep Singh @ 2025-05-30 7:13 UTC (permalink / raw)
To: dev, Hemant Agrawal, Sachin Saxena
This patch adds support for software taildrop on ordered queues
in the DPAA2 driver.
It also enables congestion notification by default on
traffic management (TM) queues, which is a prerequisite for
software taildrop functionality.
Signed-off-by: Gagandeep Singh <g.singh@nxp.com>
---
drivers/net/dpaa2/dpaa2_rxtx.c | 24 +++++++++++++-
drivers/net/dpaa2/dpaa2_tm.c | 60 ++++++++++++++++------------------
2 files changed, 52 insertions(+), 32 deletions(-)
diff --git a/drivers/net/dpaa2/dpaa2_rxtx.c b/drivers/net/dpaa2/dpaa2_rxtx.c
index 67d065bb7c..dce1da80bb 100644
--- a/drivers/net/dpaa2/dpaa2_rxtx.c
+++ b/drivers/net/dpaa2/dpaa2_rxtx.c
@@ -1800,8 +1800,11 @@ dpaa2_dev_tx_ordered(void *queue, struct rte_mbuf **bufs, uint16_t nb_pkts)
while (qbman_result_SCN_state(dpaa2_q->cscn)) {
retry_count++;
/* Retry for some time before giving up */
- if (retry_count > CONG_RETRY_COUNT)
+ if (retry_count > CONG_RETRY_COUNT) {
+ if (dpaa2_q->tm_sw_td)
+ goto sw_td;
goto skip_tx;
+ }
}
frames_to_send = (nb_pkts > dpaa2_eqcr_size) ?
@@ -1961,6 +1964,25 @@ dpaa2_dev_tx_ordered(void *queue, struct rte_mbuf **bufs, uint16_t nb_pkts)
rte_pktmbuf_free_seg(buf_to_free[loop].seg);
}
+ return num_tx;
+sw_td:
+ loop = 0;
+ while (loop < num_tx) {
+ if (unlikely(RTE_MBUF_HAS_EXTBUF(*bufs)))
+ rte_pktmbuf_free(*bufs);
+ bufs++;
+ loop++;
+ }
+
+ /* free the pending buffers */
+ while (nb_pkts) {
+ rte_pktmbuf_free(*bufs);
+ bufs++;
+ nb_pkts--;
+ num_tx++;
+ }
+ dpaa2_q->tx_pkts += num_tx;
+
return num_tx;
}
diff --git a/drivers/net/dpaa2/dpaa2_tm.c b/drivers/net/dpaa2/dpaa2_tm.c
index dbf66c756e..36e815c356 100644
--- a/drivers/net/dpaa2/dpaa2_tm.c
+++ b/drivers/net/dpaa2/dpaa2_tm.c
@@ -611,41 +611,39 @@ dpaa2_tm_configure_queue(struct rte_eth_dev *dev, struct dpaa2_tm_node *node)
}
dpaa2_q->fqid = qid.fqid;
- /* setting congestion notification */
- if (!(priv->flags & DPAA2_TX_CGR_OFF)) {
- struct dpni_congestion_notification_cfg cong_notif_cfg = {0};
-
- cong_notif_cfg.units = DPNI_CONGESTION_UNIT_FRAMES;
- cong_notif_cfg.threshold_entry = dpaa2_q->nb_desc;
- /* Notify that the queue is not congested when the data in
- * the queue is below this thershold.(90% of value)
- */
- cong_notif_cfg.threshold_exit = (dpaa2_q->nb_desc * 9) / 10;
- cong_notif_cfg.message_ctx = 0;
- iova = DPAA2_VADDR_TO_IOVA_AND_CHECK(dpaa2_q->cscn,
- sizeof(struct qbman_result));
- if (iova == RTE_BAD_IOVA) {
- DPAA2_PMD_ERR("No IOMMU map for cscn(%p)", dpaa2_q->cscn);
- return -ENOBUFS;
- }
- cong_notif_cfg.message_iova = iova;
- cong_notif_cfg.dest_cfg.dest_type = DPNI_DEST_NONE;
- cong_notif_cfg.notification_mode =
+ /* setting taildrop through congestion notification */
+ struct dpni_congestion_notification_cfg cong_notif_cfg = {0};
+
+ cong_notif_cfg.units = DPNI_CONGESTION_UNIT_FRAMES;
+ cong_notif_cfg.threshold_entry = dpaa2_q->nb_desc;
+ /* Notify that the queue is not congested when the data in
+ * the queue is below this thershold.(90% of value)
+ */
+ cong_notif_cfg.threshold_exit = (dpaa2_q->nb_desc * 9) / 10;
+ cong_notif_cfg.message_ctx = 0;
+
+ iova = DPAA2_VADDR_TO_IOVA_AND_CHECK(dpaa2_q->cscn,
+ sizeof(struct qbman_result));
+ if (iova == RTE_BAD_IOVA) {
+ DPAA2_PMD_ERR("No IOMMU map for cscn(%p)", dpaa2_q->cscn);
+ return -ENOBUFS;
+ }
+ cong_notif_cfg.message_iova = iova;
+ cong_notif_cfg.dest_cfg.dest_type = DPNI_DEST_NONE;
+ cong_notif_cfg.notification_mode =
DPNI_CONG_OPT_WRITE_MEM_ON_ENTER |
DPNI_CONG_OPT_WRITE_MEM_ON_EXIT |
DPNI_CONG_OPT_COHERENT_WRITE;
- cong_notif_cfg.cg_point = DPNI_CP_QUEUE;
+ cong_notif_cfg.cg_point = DPNI_CP_QUEUE;
- ret = dpni_set_congestion_notification(dpni, CMD_PRI_LOW,
- priv->token,
- DPNI_QUEUE_TX,
- ((node->parent->channel_id << 8) | tc_id),
- &cong_notif_cfg);
- if (ret) {
- DPAA2_PMD_ERR("Error in setting tx congestion notification: "
- "err=%d", ret);
- return -ret;
- }
+ ret = dpni_set_congestion_notification(dpni, CMD_PRI_LOW,
+ priv->token, DPNI_QUEUE_TX,
+ ((node->parent->channel_id << 8) | tc_id),
+ &cong_notif_cfg);
+ if (ret) {
+ DPAA2_PMD_ERR("Error in setting tx congestion notification: "
+ "err=%d", ret);
+ return -ret;
}
dpaa2_q->tm_sw_td = true;
--
2.25.1
^ permalink raw reply [flat|nested] 24+ messages in thread* [PATCH v2 00/11] NXP DPAA2 driver enhancements and fixes
2025-05-30 7:13 [PATCH 00/11] NXP DPAA2 driver enhancements and fixes Gagandeep Singh
` (10 preceding siblings ...)
2025-05-30 7:13 ` [PATCH 11/11] net/dpaa2: enable software taildrop for ordered queues Gagandeep Singh
@ 2025-06-02 10:40 ` Gagandeep Singh
2025-06-02 10:40 ` [PATCH v2 01/11] net/dpaa2: fix issue of extract buffer preparation Gagandeep Singh
` (10 more replies)
11 siblings, 11 replies; 24+ messages in thread
From: Gagandeep Singh @ 2025-06-02 10:40 UTC (permalink / raw)
To: dev; +Cc: hemant.agrawal
V1-logs:
This patch series introduces enhancements and fixes to the
NXP DPAA2 Ethernet driver.
It includes support for
- software taildrop on ordered queues.
- setup speed capabilities.
- DPAA2 resource version.
- MAC level statistics.
- improve PA-VA conversion.
- add buffer pool depletion state configuration.
- fixes for shaper rate and buffer prepration.
V2-Chages:
- Fix compilation issue on UB2404-32
Apeksha Gupta (4):
net/dpaa2: add dpmac MC header file
net/dpaa2: support dpmac counters in stats
net/dpaa2: support dpmac Tx stats
net/dpaa2: support dpmac Tx stats in xstats
Gagandeep Singh (2):
net/dpaa2: fix shaper rate
net/dpaa2: enable software taildrop for ordered queues
Ioana Ciornei (2):
net/dpaa2: retrieve DPNI API version at init time
net/dpaa2: setup the speed cap based on the actual MAC
Jun Yang (2):
net/dpaa2: fix issue of extract buffer preparation
mempool/dpaa2: use unified VA to IOVA conversion
Vanshika Shukla (1):
bus/fslmc: add DPBP APIs for setting depletion thresholds
.mailmap | 1 +
doc/guides/platform/dpaa2.rst | 2 +-
drivers/bus/fslmc/mc/dpbp.c | 78 ++-
drivers/bus/fslmc/mc/fsl_dpbp.h | 41 +-
drivers/mempool/dpaa2/dpaa2_hw_mempool.c | 248 ++++++----
drivers/mempool/dpaa2/dpaa2_hw_mempool.h | 1 +
drivers/mempool/dpaa2/rte_dpaa2_mempool.h | 12 +
drivers/net/dpaa2/dpaa2_ethdev.c | 276 ++++++++++-
drivers/net/dpaa2/dpaa2_ethdev.h | 36 +-
drivers/net/dpaa2/dpaa2_rxtx.c | 24 +-
drivers/net/dpaa2/dpaa2_tm.c | 68 ++-
drivers/net/dpaa2/mc/dpni.c | 50 +-
drivers/net/dpaa2/mc/fsl_dpmac.h | 551 ++++++++++++++++++++++
drivers/net/dpaa2/mc/fsl_dpni.h | 8 +-
drivers/net/dpaa2/mc/fsl_dpni_cmd.h | 15 +-
15 files changed, 1263 insertions(+), 148 deletions(-)
create mode 100644 drivers/net/dpaa2/mc/fsl_dpmac.h
--
2.25.1
^ permalink raw reply [flat|nested] 24+ messages in thread* [PATCH v2 01/11] net/dpaa2: fix issue of extract buffer preparation
2025-06-02 10:40 ` [PATCH v2 00/11] NXP DPAA2 driver enhancements and fixes Gagandeep Singh
@ 2025-06-02 10:40 ` Gagandeep Singh
2025-06-02 10:40 ` [PATCH v2 02/11] net/dpaa2: fix shaper rate Gagandeep Singh
` (9 subsequent siblings)
10 siblings, 0 replies; 24+ messages in thread
From: Gagandeep Singh @ 2025-06-02 10:40 UTC (permalink / raw)
To: dev, Hemant Agrawal, Sachin Saxena, Jun Yang; +Cc: stable
From: Jun Yang <jun.yang@nxp.com>
1) The max size of extract buffer should be size of
"struct dpni_ext_set_rx_tc_dist"(488), which is greater than 256.
2) dpkg_prepare_key_cfg is responsible to clear
extract buffer before preparing.
Fixes: 25d0ae624245 ("net/dpaa2: check IOVA before sending MC command")
Cc: stable@dpdk.org
Signed-off-by: Jun Yang <jun.yang@nxp.com>
---
drivers/net/dpaa2/dpaa2_ethdev.c | 4 ++--
drivers/net/dpaa2/dpaa2_ethdev.h | 6 ++++--
2 files changed, 6 insertions(+), 4 deletions(-)
diff --git a/drivers/net/dpaa2/dpaa2_ethdev.c b/drivers/net/dpaa2/dpaa2_ethdev.c
index c53c2d0549..c154a574ce 100644
--- a/drivers/net/dpaa2/dpaa2_ethdev.c
+++ b/drivers/net/dpaa2/dpaa2_ethdev.c
@@ -2788,7 +2788,7 @@ dpaa2_dev_init(struct rte_eth_dev *eth_dev)
/* Init fields w.r.t. classification */
memset(&priv->extract.qos_key_extract, 0,
sizeof(struct dpaa2_key_extract));
- priv->extract.qos_extract_param = rte_malloc(NULL,
+ priv->extract.qos_extract_param = rte_zmalloc(NULL,
DPAA2_EXTRACT_PARAM_MAX_SIZE,
RTE_CACHE_LINE_SIZE);
if (!priv->extract.qos_extract_param) {
@@ -2799,7 +2799,7 @@ dpaa2_dev_init(struct rte_eth_dev *eth_dev)
for (i = 0; i < MAX_TCS; i++) {
memset(&priv->extract.tc_key_extract[i], 0,
sizeof(struct dpaa2_key_extract));
- priv->extract.tc_extract_param[i] = rte_malloc(NULL,
+ priv->extract.tc_extract_param[i] = rte_zmalloc(NULL,
DPAA2_EXTRACT_PARAM_MAX_SIZE,
RTE_CACHE_LINE_SIZE);
if (!priv->extract.tc_extract_param[i]) {
diff --git a/drivers/net/dpaa2/dpaa2_ethdev.h b/drivers/net/dpaa2/dpaa2_ethdev.h
index fd3119247a..f32c31c763 100644
--- a/drivers/net/dpaa2/dpaa2_ethdev.h
+++ b/drivers/net/dpaa2/dpaa2_ethdev.h
@@ -31,7 +31,9 @@
#define MAX_DPNI 8
#define DPAA2_MAX_CHANNELS 16
-#define DPAA2_EXTRACT_PARAM_MAX_SIZE 256
+#define DPAA2_EXTRACT_PARAM_MAX_SIZE \
+ RTE_ALIGN(sizeof(struct dpni_ext_set_rx_tc_dist), 256)
+
#define DPAA2_EXTRACT_ALLOC_KEY_MAX_SIZE 256
#define DPAA2_RX_DEFAULT_NBDESC 512
@@ -60,7 +62,7 @@
#define CONG_RX_OAL 128
/* Size of the input SMMU mapped memory required by MC */
-#define DIST_PARAM_IOVA_SIZE 256
+#define DIST_PARAM_IOVA_SIZE DPAA2_EXTRACT_PARAM_MAX_SIZE
/* Enable TX Congestion control support
* default is disable
--
2.25.1
^ permalink raw reply [flat|nested] 24+ messages in thread* [PATCH v2 02/11] net/dpaa2: fix shaper rate
2025-06-02 10:40 ` [PATCH v2 00/11] NXP DPAA2 driver enhancements and fixes Gagandeep Singh
2025-06-02 10:40 ` [PATCH v2 01/11] net/dpaa2: fix issue of extract buffer preparation Gagandeep Singh
@ 2025-06-02 10:40 ` Gagandeep Singh
2025-06-02 10:40 ` [PATCH v2 03/11] bus/fslmc: add DPBP APIs for setting depletion thresholds Gagandeep Singh
` (8 subsequent siblings)
10 siblings, 0 replies; 24+ messages in thread
From: Gagandeep Singh @ 2025-06-02 10:40 UTC (permalink / raw)
To: dev, Hemant Agrawal, Sachin Saxena; +Cc: stable
This patch fixes the shaper rate by configuring the
user given rate in bytes. Earlier driver was considering
the user given rate value in bits.
Fixes: ac624068ee25 ("net/dpaa2: support traffic management")
Cc: stable@dpdk.org
Signed-off-by: Gagandeep Singh <g.singh@nxp.com>
---
drivers/net/dpaa2/dpaa2_tm.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/net/dpaa2/dpaa2_tm.c b/drivers/net/dpaa2/dpaa2_tm.c
index f91392b092..dbf66c756e 100644
--- a/drivers/net/dpaa2/dpaa2_tm.c
+++ b/drivers/net/dpaa2/dpaa2_tm.c
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright 2020-2023 NXP
+ * Copyright 2020-2024 NXP
*/
#include <rte_ethdev.h>
@@ -733,12 +733,12 @@ dpaa2_hierarchy_commit(struct rte_eth_dev *dev, int clear_on_fail,
tx_cr_shaper.max_burst_size =
node->profile->params.committed.size;
tx_cr_shaper.rate_limit =
- node->profile->params.committed.rate /
- (1024 * 1024);
+ (node->profile->params.committed.rate /
+ (1024 * 1024)) * 8;
tx_er_shaper.max_burst_size =
node->profile->params.peak.size;
tx_er_shaper.rate_limit =
- node->profile->params.peak.rate / (1024 * 1024);
+ (node->profile->params.peak.rate / (1024 * 1024)) * 8;
/* root node */
if (node->parent == NULL) {
DPAA2_PMD_DEBUG("LNI S.rate = %u, burst =%u",
--
2.25.1
^ permalink raw reply [flat|nested] 24+ messages in thread* [PATCH v2 03/11] bus/fslmc: add DPBP APIs for setting depletion thresholds
2025-06-02 10:40 ` [PATCH v2 00/11] NXP DPAA2 driver enhancements and fixes Gagandeep Singh
2025-06-02 10:40 ` [PATCH v2 01/11] net/dpaa2: fix issue of extract buffer preparation Gagandeep Singh
2025-06-02 10:40 ` [PATCH v2 02/11] net/dpaa2: fix shaper rate Gagandeep Singh
@ 2025-06-02 10:40 ` Gagandeep Singh
2025-06-02 10:40 ` [PATCH v2 04/11] mempool/dpaa2: use unified VA to IOVA conversion Gagandeep Singh
` (7 subsequent siblings)
10 siblings, 0 replies; 24+ messages in thread
From: Gagandeep Singh @ 2025-06-02 10:40 UTC (permalink / raw)
To: dev, Hemant Agrawal, Sachin Saxena; +Cc: Vanshika Shukla
From: Vanshika Shukla <vanshika.shukla@nxp.com>
This patch adds DPBP APIs for setting and getting the depletion/surplus
thresholds for controlling pause frame generation.
By default, depletion_entry is set as 128 by MC. This API would help user
configure the buffer in depletion state as per requirement.
Signed-off-by: Vanshika Shukla <vanshika.shukla@nxp.com>
---
doc/guides/platform/dpaa2.rst | 2 +-
drivers/bus/fslmc/mc/dpbp.c | 78 ++++++++++++++++++++++-
drivers/bus/fslmc/mc/fsl_dpbp.h | 41 +++++++++++-
drivers/mempool/dpaa2/dpaa2_hw_mempool.c | 26 ++++++++
drivers/mempool/dpaa2/dpaa2_hw_mempool.h | 1 +
drivers/mempool/dpaa2/rte_dpaa2_mempool.h | 12 ++++
drivers/net/dpaa2/dpaa2_ethdev.c | 39 +++++++++++-
drivers/net/dpaa2/dpaa2_ethdev.h | 1 +
8 files changed, 194 insertions(+), 6 deletions(-)
diff --git a/doc/guides/platform/dpaa2.rst b/doc/guides/platform/dpaa2.rst
index c9ec21334f..e32ba5d300 100644
--- a/doc/guides/platform/dpaa2.rst
+++ b/doc/guides/platform/dpaa2.rst
@@ -106,7 +106,7 @@ separately:
Currently supported by DPDK:
- NXP SDK **LSDK 21.08++**.
-- MC Firmware version **10.37.0** and higher.
+- MC Firmware version **10.39.0** and higher.
- Supported architectures: **arm64 LE**.
- Follow the DPDK :ref:`Getting Started Guide for Linux <linux_gsg>`
diff --git a/drivers/bus/fslmc/mc/dpbp.c b/drivers/bus/fslmc/mc/dpbp.c
index 08f24d33e8..5529a1fe9c 100644
--- a/drivers/bus/fslmc/mc/dpbp.c
+++ b/drivers/bus/fslmc/mc/dpbp.c
@@ -1,7 +1,7 @@
/* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0)
*
* Copyright 2013-2016 Freescale Semiconductor Inc.
- * Copyright 2016-2017 NXP
+ * Copyright 2016-2017, 2025 NXP
*
*/
#include <fsl_mc_sys.h>
@@ -362,3 +362,79 @@ int dpbp_get_num_free_bufs(struct fsl_mc_io *mc_io,
return 0;
}
+
+/**
+ * dpbp_set_notifications() - Set notifications towards software
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token: Token of DPBP object
+ * @cfg: notifications configuration
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+RTE_EXPORT_INTERNAL_SYMBOL(dpbp_set_notifications)
+int dpbp_set_notifications(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ struct dpbp_notification_cfg *cfg)
+{
+ struct dpbp_cmd_set_notifications *cmd_params;
+ struct mc_command cmd = { 0 };
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPBP_CMDID_SET_NOTIFICATIONS,
+ cmd_flags, token);
+ cmd_params = (struct dpbp_cmd_set_notifications *)cmd.params;
+ cmd_params->depletion_entry = cpu_to_le32(cfg->depletion_entry);
+ cmd_params->depletion_exit = cpu_to_le32(cfg->depletion_exit);
+ cmd_params->surplus_entry = cpu_to_le32(cfg->surplus_entry);
+ cmd_params->surplus_exit = cpu_to_le32(cfg->surplus_exit);
+ cmd_params->options = cpu_to_le32(cfg->options);
+ cmd_params->message_ctx = cpu_to_le64(cfg->message_ctx);
+ cmd_params->message_iova = cpu_to_le64(cfg->message_iova);
+
+ /* send command to mc*/
+ return mc_send_command(mc_io, &cmd);
+}
+
+/**
+ * dpbp_get_notifications() - Get the notifications configuration
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token: Token of DPBP object
+ * @cfg: notifications configuration
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+RTE_EXPORT_INTERNAL_SYMBOL(dpbp_get_notifications)
+int dpbp_get_notifications(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ struct dpbp_notification_cfg *cfg)
+{
+ struct dpbp_rsp_get_notifications *rsp_params;
+ struct mc_command cmd = { 0 };
+ int err;
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPBP_CMDID_GET_NOTIFICATIONS,
+ cmd_flags,
+ token);
+
+ /* send command to mc*/
+ err = mc_send_command(mc_io, &cmd);
+ if (err)
+ return err;
+
+ /* retrieve response parameters */
+ rsp_params = (struct dpbp_rsp_get_notifications *)cmd.params;
+ cfg->depletion_entry = le32_to_cpu(rsp_params->depletion_entry);
+ cfg->depletion_exit = le32_to_cpu(rsp_params->depletion_exit);
+ cfg->surplus_entry = le32_to_cpu(rsp_params->surplus_entry);
+ cfg->surplus_exit = le32_to_cpu(rsp_params->surplus_exit);
+ cfg->options = le32_to_cpu(rsp_params->options);
+ cfg->message_ctx = le64_to_cpu(rsp_params->message_ctx);
+ cfg->message_iova = le64_to_cpu(rsp_params->message_iova);
+
+ return 0;
+}
diff --git a/drivers/bus/fslmc/mc/fsl_dpbp.h b/drivers/bus/fslmc/mc/fsl_dpbp.h
index 8a021f55f1..c79b511715 100644
--- a/drivers/bus/fslmc/mc/fsl_dpbp.h
+++ b/drivers/bus/fslmc/mc/fsl_dpbp.h
@@ -1,7 +1,7 @@
/* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0)
*
* Copyright 2013-2016 Freescale Semiconductor Inc.
- * Copyright 2016-2017 NXP
+ * Copyright 2016-2017, 2025 NXP
*
*/
#ifndef __FSL_DPBP_H
@@ -16,6 +16,34 @@
struct fsl_mc_io;
+/**
+ * struct dpbp_notification_cfg - Structure representing DPBP notifications
+ * towards software
+ * @depletion_entry: below this threshold the pool is "depleted";
+ * set it to '0' to disable it
+ * @depletion_exit: greater than or equal to this threshold the pool exit its
+ * "depleted" state
+ * @surplus_entry: above this threshold the pool is in "surplus" state;
+ * set it to '0' to disable it
+ * @surplus_exit: less than or equal to this threshold the pool exit its
+ * "surplus" state
+ * @message_iova: MUST be given if either 'depletion_entry' or 'surplus_entry'
+ * is not '0' (enable); I/O virtual address (must be in DMA-able memory),
+ * must be 16B aligned.
+ * @message_ctx: The context that will be part of the BPSCN message and will
+ * be written to 'message_iova'
+ * @options: Mask of available options; use 'DPBP_NOTIF_OPT_<X>' values
+ */
+struct dpbp_notification_cfg {
+ uint32_t depletion_entry;
+ uint32_t depletion_exit;
+ uint32_t surplus_entry;
+ uint32_t surplus_exit;
+ uint64_t message_iova;
+ uint64_t message_ctx;
+ uint32_t options;
+};
+
__rte_internal
int dpbp_open(struct fsl_mc_io *mc_io,
uint32_t cmd_flags,
@@ -25,7 +53,18 @@ int dpbp_open(struct fsl_mc_io *mc_io,
int dpbp_close(struct fsl_mc_io *mc_io,
uint32_t cmd_flags,
uint16_t token);
+__rte_internal
+int dpbp_set_notifications(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ struct dpbp_notification_cfg *cfg);
+__rte_internal
+int dpbp_get_notifications(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ struct dpbp_notification_cfg *cfg);
+#define DPBP_NOTIF_OPT_WRIOP 0x00010000
/**
* struct dpbp_cfg - Structure representing DPBP configuration
* @options: place holder
diff --git a/drivers/mempool/dpaa2/dpaa2_hw_mempool.c b/drivers/mempool/dpaa2/dpaa2_hw_mempool.c
index 09729d2828..eb22a14fb5 100644
--- a/drivers/mempool/dpaa2/dpaa2_hw_mempool.c
+++ b/drivers/mempool/dpaa2/dpaa2_hw_mempool.c
@@ -38,6 +38,32 @@ RTE_EXPORT_INTERNAL_SYMBOL(rte_dpaa2_bpid_info)
struct dpaa2_bp_info *rte_dpaa2_bpid_info;
static struct dpaa2_bp_list *h_bp_list;
+int
+rte_dpaa2_dpbp_set_notifications(struct rte_mempool *mp,
+ struct dpaa2_dpbp_cfg *dpbp_cfg)
+{
+ struct dpaa2_dpbp_dev *avail_dpbp;
+ struct dpaa2_bp_info *bpinfo;
+ struct dpaa2_bp_list *bp;
+ int ret;
+
+ bpinfo = mempool_to_bpinfo(mp);
+ bp = bpinfo->bp_list;
+
+ avail_dpbp = bp->buf_pool.dpbp_node;
+
+ ret = dpbp_set_notifications(&avail_dpbp->dpbp, CMD_PRI_LOW,
+ avail_dpbp->token,
+ (struct dpbp_notification_cfg *) dpbp_cfg);
+ if (ret) {
+ DPAA2_MEMPOOL_ERR("DPBP set notifications failure!");
+ return ret;
+ }
+ bp->dpbp_notification_enable = true;
+
+ return 0;
+}
+
static int
rte_hw_mbuf_create_pool(struct rte_mempool *mp)
{
diff --git a/drivers/mempool/dpaa2/dpaa2_hw_mempool.h b/drivers/mempool/dpaa2/dpaa2_hw_mempool.h
index 9e21823fb6..f2583be4c6 100644
--- a/drivers/mempool/dpaa2/dpaa2_hw_mempool.h
+++ b/drivers/mempool/dpaa2/dpaa2_hw_mempool.h
@@ -48,6 +48,7 @@ struct dpaa2_bp_list {
struct rte_mempool *mp; /**< DPDK RTE EAL pool reference */
int32_t dpaa2_ops_index; /**< Index into DPDK Mempool ops table */
struct buf_pool buf_pool;
+ bool dpbp_notification_enable;
};
struct dpaa2_bp_info {
diff --git a/drivers/mempool/dpaa2/rte_dpaa2_mempool.h b/drivers/mempool/dpaa2/rte_dpaa2_mempool.h
index 0286090b1b..c1cf160a21 100644
--- a/drivers/mempool/dpaa2/rte_dpaa2_mempool.h
+++ b/drivers/mempool/dpaa2/rte_dpaa2_mempool.h
@@ -19,6 +19,16 @@
extern "C" {
#endif
+struct dpaa2_dpbp_cfg {
+ uint32_t depletion_entry;
+ uint32_t depletion_exit;
+ uint32_t surplus_entry;
+ uint32_t surplus_exit;
+ uint64_t message_iova;
+ uint64_t message_ctx;
+ uint32_t options;
+};
+
/**
* Get BPID corresponding to the packet pool
*
@@ -62,6 +72,8 @@ rte_dpaa2_mbuf_from_buf_addr(struct rte_mempool *mp, void *buf_addr);
__rte_internal
int rte_dpaa2_bpid_info_init(struct rte_mempool *mp);
+int rte_dpaa2_dpbp_set_notifications(struct rte_mempool *mp, struct dpaa2_dpbp_cfg *dpbp_cfg);
+
#ifdef __cplusplus
}
#endif
diff --git a/drivers/net/dpaa2/dpaa2_ethdev.c b/drivers/net/dpaa2/dpaa2_ethdev.c
index c154a574ce..d17785a6ee 100644
--- a/drivers/net/dpaa2/dpaa2_ethdev.c
+++ b/drivers/net/dpaa2/dpaa2_ethdev.c
@@ -745,6 +745,9 @@ dpaa2_dev_rx_queue_setup(struct rte_eth_dev *dev,
dpaa2_q->nb_desc = UINT16_MAX;
dpaa2_q->offloads = rx_conf->offloads;
+ if (priv->bp_list->dpbp_notification_enable)
+ priv->enable_bp_flow_ctrl = true;
+
/*Get the flow id from given VQ id*/
flow_id = dpaa2_q->flow_id;
memset(&cfg, 0, sizeof(struct dpni_queue));
@@ -1176,7 +1179,7 @@ dpaa2_eth_setup_irqs(struct rte_eth_dev *dev, int enable)
return err;
}
-
+static int dpaa2_flow_ctrl_set(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf);
static int
dpaa2_dev_start(struct rte_eth_dev *dev)
{
@@ -1191,11 +1194,27 @@ dpaa2_dev_start(struct rte_eth_dev *dev)
struct dpaa2_queue *dpaa2_q;
int ret, i;
struct rte_intr_handle *intr_handle;
+ struct rte_eth_fc_conf *fc_conf;
+
+ PMD_INIT_FUNC_TRACE();
dpaa2_dev = container_of(rdev, struct rte_dpaa2_device, device);
intr_handle = dpaa2_dev->intr_handle;
- PMD_INIT_FUNC_TRACE();
+ if (priv->enable_bp_flow_ctrl) {
+ fc_conf = rte_zmalloc(NULL, sizeof(struct rte_eth_fc_conf),
+ RTE_CACHE_LINE_SIZE);
+ fc_conf->autoneg = 0;
+ fc_conf->mode = RTE_ETH_FC_FULL;
+
+ ret = dpaa2_flow_ctrl_set(dev, fc_conf);
+ if (ret) {
+ DPAA2_PMD_ERR("Unable to set flow ctrl");
+ return ret;
+ }
+ rte_free(fc_conf);
+ }
+
ret = dpni_enable(dpni, CMD_PRI_LOW, priv->token);
if (ret) {
DPAA2_PMD_ERR("Failure in enabling dpni %d device: err=%d",
@@ -1298,6 +1317,7 @@ dpaa2_dev_stop(struct rte_eth_dev *dev)
struct rte_device *rdev = dev->device;
struct rte_intr_handle *intr_handle;
struct rte_dpaa2_device *dpaa2_dev;
+ struct rte_eth_fc_conf *fc_conf;
uint16_t i;
dpaa2_dev = container_of(rdev, struct rte_dpaa2_device, device);
@@ -1305,6 +1325,19 @@ dpaa2_dev_stop(struct rte_eth_dev *dev)
PMD_INIT_FUNC_TRACE();
+ if (priv->enable_bp_flow_ctrl) {
+ fc_conf = rte_zmalloc(NULL, sizeof(struct rte_eth_fc_conf),
+ RTE_CACHE_LINE_SIZE);
+ fc_conf->mode = RTE_ETH_FC_NONE;
+
+ ret = dpaa2_flow_ctrl_set(dev, fc_conf);
+ if (ret) {
+ DPAA2_PMD_ERR("Unable to set flow ctrl");
+ return ret;
+ }
+ rte_free(fc_conf);
+ }
+
/* reset interrupt callback */
if (intr_handle && rte_intr_fd_get(intr_handle) &&
dev->data->dev_conf.intr_conf.lsc != 0) {
@@ -2110,7 +2143,7 @@ dpaa2_flow_ctrl_get(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
return ret;
}
-static int
+int
dpaa2_flow_ctrl_set(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
{
int ret = -EINVAL;
diff --git a/drivers/net/dpaa2/dpaa2_ethdev.h b/drivers/net/dpaa2/dpaa2_ethdev.h
index f32c31c763..103fa2ca67 100644
--- a/drivers/net/dpaa2/dpaa2_ethdev.h
+++ b/drivers/net/dpaa2/dpaa2_ethdev.h
@@ -409,6 +409,7 @@ struct dpaa2_dev_priv {
struct rte_eth_dev *eth_dev; /**< Pointer back to holding ethdev */
rte_spinlock_t lpbk_qp_lock;
+ bool enable_bp_flow_ctrl;
uint8_t channel_inuse;
/* Stores correction offset for one step timestamping */
uint16_t ptp_correction_offset;
--
2.25.1
^ permalink raw reply [flat|nested] 24+ messages in thread* [PATCH v2 04/11] mempool/dpaa2: use unified VA to IOVA conversion
2025-06-02 10:40 ` [PATCH v2 00/11] NXP DPAA2 driver enhancements and fixes Gagandeep Singh
` (2 preceding siblings ...)
2025-06-02 10:40 ` [PATCH v2 03/11] bus/fslmc: add DPBP APIs for setting depletion thresholds Gagandeep Singh
@ 2025-06-02 10:40 ` Gagandeep Singh
2025-06-02 10:40 ` [PATCH v2 05/11] net/dpaa2: add dpmac MC header file Gagandeep Singh
` (6 subsequent siblings)
10 siblings, 0 replies; 24+ messages in thread
From: Gagandeep Singh @ 2025-06-02 10:40 UTC (permalink / raw)
To: dev, Hemant Agrawal, Sachin Saxena; +Cc: Jun Yang
From: Jun Yang <jun.yang@nxp.com>
Use DPAA2_VADDR_TO_IOVA to convert va to iova for both VA and PA modes.
Signed-off-by: Jun Yang <jun.yang@nxp.com>
---
drivers/mempool/dpaa2/dpaa2_hw_mempool.c | 222 +++++++++++++++--------
1 file changed, 142 insertions(+), 80 deletions(-)
diff --git a/drivers/mempool/dpaa2/dpaa2_hw_mempool.c b/drivers/mempool/dpaa2/dpaa2_hw_mempool.c
index eb22a14fb5..3c5155afde 100644
--- a/drivers/mempool/dpaa2/dpaa2_hw_mempool.c
+++ b/drivers/mempool/dpaa2/dpaa2_hw_mempool.c
@@ -224,26 +224,47 @@ rte_hw_mbuf_free_pool(struct rte_mempool *mp)
dpaa2_free_dpbp_dev(dpbp_node);
}
-static void
-rte_dpaa2_mbuf_release(struct rte_mempool *pool __rte_unused,
- void * const *obj_table,
- uint32_t bpid,
- uint32_t meta_data_size,
- int count)
+static inline int
+dpaa2_bman_multi_release(uint64_t *bufs, int num,
+ struct qbman_swp *swp,
+ const struct qbman_release_desc *releasedesc)
+{
+ int retry_count = 0, ret;
+
+release_again:
+ ret = qbman_swp_release(swp, releasedesc, bufs, num);
+ if (unlikely(ret == -EBUSY)) {
+ retry_count++;
+ if (retry_count <= DPAA2_MAX_TX_RETRY_COUNT)
+ goto release_again;
+
+ DPAA2_MEMPOOL_ERR("bman release retry exceeded, low fbpr?");
+ return ret;
+ }
+ if (unlikely(ret)) {
+ DPAA2_MEMPOOL_ERR("bman release failed(err=%d)", ret);
+ return ret;
+ }
+
+ return 0;
+}
+
+static int
+dpaa2_mbuf_release(void * const *obj_table, uint32_t bpid,
+ uint32_t meta_data_size, int count)
{
struct qbman_release_desc releasedesc;
struct qbman_swp *swp;
int ret;
- int i, n, retry_count;
+ int i, n;
uint64_t bufs[DPAA2_MBUF_MAX_ACQ_REL];
if (unlikely(!DPAA2_PER_LCORE_DPIO)) {
ret = dpaa2_affine_qbman_swp();
- if (ret != 0) {
- DPAA2_MEMPOOL_ERR(
- "Failed to allocate IO portal, tid: %d",
- rte_gettid());
- return;
+ if (ret) {
+ DPAA2_MEMPOOL_ERR("affine portal err: %d, tid: %d",
+ ret, rte_gettid());
+ return -EIO;
}
}
swp = DPAA2_PER_LCORE_PORTAL;
@@ -259,51 +280,62 @@ rte_dpaa2_mbuf_release(struct rte_mempool *pool __rte_unused,
goto aligned;
/* convert mbuf to buffers for the remainder */
- for (i = 0; i < n ; i++) {
-#ifdef RTE_LIBRTE_DPAA2_USE_PHYS_IOVA
- bufs[i] = (uint64_t)rte_mempool_virt2iova(obj_table[i])
- + meta_data_size;
-#else
- bufs[i] = (uint64_t)obj_table[i] + meta_data_size;
-#endif
+ if (likely(rte_eal_iova_mode() == RTE_IOVA_VA)) {
+ for (i = 0; i < n ; i++) {
+ bufs[i] = DPAA2_VAMODE_VADDR_TO_IOVA(obj_table[i]) +
+ meta_data_size;
+ }
+ } else {
+ for (i = 0; i < n ; i++) {
+ bufs[i] = DPAA2_PAMODE_VADDR_TO_IOVA(obj_table[i]) +
+ meta_data_size;
+ }
}
/* feed them to bman */
- retry_count = 0;
- while ((ret = qbman_swp_release(swp, &releasedesc, bufs, n)) ==
- -EBUSY) {
- retry_count++;
- if (retry_count > DPAA2_MAX_TX_RETRY_COUNT) {
- DPAA2_MEMPOOL_ERR("bman release retry exceeded, low fbpr?");
- return;
- }
- }
+ ret = dpaa2_bman_multi_release(bufs, n, swp, &releasedesc);
+ if (unlikely(ret))
+ return 0;
aligned:
/* if there are more buffers to free */
+ if (unlikely(rte_eal_iova_mode() != RTE_IOVA_VA))
+ goto iova_pa_release;
+
while (n < count) {
/* convert mbuf to buffers */
for (i = 0; i < DPAA2_MBUF_MAX_ACQ_REL; i++) {
-#ifdef RTE_LIBRTE_DPAA2_USE_PHYS_IOVA
- bufs[i] = (uint64_t)
- rte_mempool_virt2iova(obj_table[n + i])
- + meta_data_size;
-#else
- bufs[i] = (uint64_t)obj_table[n + i] + meta_data_size;
-#endif
+ bufs[i] = DPAA2_VAMODE_VADDR_TO_IOVA(obj_table[n + i]) +
+ meta_data_size;
}
- retry_count = 0;
- while ((ret = qbman_swp_release(swp, &releasedesc, bufs,
- DPAA2_MBUF_MAX_ACQ_REL)) == -EBUSY) {
- retry_count++;
- if (retry_count > DPAA2_MAX_TX_RETRY_COUNT) {
- DPAA2_MEMPOOL_ERR("bman release retry exceeded, low fbpr?");
- return;
- }
+ ret = dpaa2_bman_multi_release(bufs,
+ DPAA2_MBUF_MAX_ACQ_REL, swp, &releasedesc);
+ if (unlikely(ret))
+ return n;
+
+ n += DPAA2_MBUF_MAX_ACQ_REL;
+ }
+
+ return count;
+
+iova_pa_release:
+ while (n < count) {
+ /* convert mbuf to buffers */
+ for (i = 0; i < DPAA2_MBUF_MAX_ACQ_REL; i++) {
+ bufs[i] = DPAA2_PAMODE_VADDR_TO_IOVA(obj_table[n + i]) +
+ meta_data_size;
}
+
+ ret = dpaa2_bman_multi_release(bufs,
+ DPAA2_MBUF_MAX_ACQ_REL, swp, &releasedesc);
+ if (unlikely(ret))
+ return n;
+
n += DPAA2_MBUF_MAX_ACQ_REL;
}
+
+ return count;
}
RTE_EXPORT_INTERNAL_SYMBOL(rte_dpaa2_bpid_info_init)
@@ -371,7 +403,7 @@ rte_dpaa2_mbuf_alloc_bulk(struct rte_mempool *pool,
#endif
struct qbman_swp *swp;
uint16_t bpid;
- size_t bufs[DPAA2_MBUF_MAX_ACQ_REL];
+ uint64_t bufs[DPAA2_MBUF_MAX_ACQ_REL];
int i, ret;
unsigned int n = 0;
struct dpaa2_bp_info *bp_info;
@@ -387,56 +419,79 @@ rte_dpaa2_mbuf_alloc_bulk(struct rte_mempool *pool,
if (unlikely(!DPAA2_PER_LCORE_DPIO)) {
ret = dpaa2_affine_qbman_swp();
- if (ret != 0) {
- DPAA2_MEMPOOL_ERR(
- "Failed to allocate IO portal, tid: %d",
- rte_gettid());
+ if (ret) {
+ DPAA2_MEMPOOL_ERR("affine portal err: %d, tid: %d",
+ ret, rte_gettid());
return ret;
}
}
swp = DPAA2_PER_LCORE_PORTAL;
+ if (unlikely(rte_eal_iova_mode() != RTE_IOVA_VA))
+ goto iova_pa_acquire;
+
while (n < count) {
/* Acquire is all-or-nothing, so we drain in 7s,
* then the remainder.
*/
- if ((count - n) > DPAA2_MBUF_MAX_ACQ_REL) {
- ret = qbman_swp_acquire(swp, bpid, (void *)bufs,
- DPAA2_MBUF_MAX_ACQ_REL);
- } else {
- ret = qbman_swp_acquire(swp, bpid, (void *)bufs,
- count - n);
+ ret = qbman_swp_acquire(swp, bpid, bufs,
+ (count - n) > DPAA2_MBUF_MAX_ACQ_REL ?
+ DPAA2_MBUF_MAX_ACQ_REL : (count - n));
+ if (unlikely(ret <= 0))
+ goto acquire_failed;
+
+ /* assigning mbuf from the acquired objects */
+ for (i = 0; i < ret; i++) {
+ DPAA2_VAMODE_MODIFY_IOVA_TO_VADDR(bufs[i],
+ size_t);
+ obj_table[n] = (void *)(uintptr_t)(bufs[i] -
+ bp_info->meta_data_size);
+ n++;
}
- /* In case of less than requested number of buffers available
- * in pool, qbman_swp_acquire returns 0
+ }
+ goto acquire_success;
+
+iova_pa_acquire:
+
+ while (n < count) {
+ /* Acquire is all-or-nothing, so we drain in 7s,
+ * then the remainder.
*/
- if (ret <= 0) {
- DPAA2_MEMPOOL_DP_DEBUG(
- "Buffer acquire failed with err code: %d", ret);
- /* The API expect the exact number of requested bufs */
- /* Releasing all buffers allocated */
- rte_dpaa2_mbuf_release(pool, obj_table, bpid,
- bp_info->meta_data_size, n);
- return -ENOBUFS;
- }
+ ret = qbman_swp_acquire(swp, bpid, bufs,
+ (count - n) > DPAA2_MBUF_MAX_ACQ_REL ?
+ DPAA2_MBUF_MAX_ACQ_REL : (count - n));
+ if (unlikely(ret <= 0))
+ goto acquire_failed;
+
/* assigning mbuf from the acquired objects */
- for (i = 0; (i < ret) && bufs[i]; i++) {
- DPAA2_MODIFY_IOVA_TO_VADDR(bufs[i], size_t);
- obj_table[n] = (struct rte_mbuf *)
- (bufs[i] - bp_info->meta_data_size);
- DPAA2_MEMPOOL_DP_DEBUG(
- "Acquired %p address %p from BMAN\n",
- (void *)bufs[i], (void *)obj_table[n]);
+ for (i = 0; i < ret; i++) {
+ DPAA2_PAMODE_MODIFY_IOVA_TO_VADDR(bufs[i],
+ size_t);
+ obj_table[n] = (void *)(uintptr_t)(bufs[i] -
+ bp_info->meta_data_size);
n++;
}
}
+acquire_success:
#ifdef RTE_LIBRTE_DPAA2_DEBUG_DRIVER
alloc += n;
- DPAA2_MEMPOOL_DP_DEBUG("Total = %d , req = %d done = %d\n",
- alloc, count, n);
+ DPAA2_MEMPOOL_DP_DEBUG("Total = %d , req = %d done = %d",
+ alloc, count, n);
#endif
return 0;
+
+acquire_failed:
+ DPAA2_MEMPOOL_DP_DEBUG("Buffer acquire err: %d", ret);
+ /* The API expect the exact number of requested bufs */
+ /* Releasing all buffers allocated */
+ ret = dpaa2_mbuf_release(obj_table, bpid,
+ bp_info->meta_data_size, n);
+ if (ret != (int)n) {
+ DPAA2_MEMPOOL_ERR("%s: expect to free %d!= %d",
+ __func__, n, ret);
+ }
+ return -ENOBUFS;
}
static int
@@ -444,14 +499,21 @@ rte_hw_mbuf_free_bulk(struct rte_mempool *pool,
void * const *obj_table, unsigned int n)
{
struct dpaa2_bp_info *bp_info;
+ int ret;
bp_info = mempool_to_bpinfo(pool);
if (!(bp_info->bp_list)) {
DPAA2_MEMPOOL_ERR("DPAA2 buffer pool not configured");
return -ENOENT;
}
- rte_dpaa2_mbuf_release(pool, obj_table, bp_info->bpid,
- bp_info->meta_data_size, n);
+ ret = dpaa2_mbuf_release(obj_table, bp_info->bpid,
+ bp_info->meta_data_size, n);
+ if (unlikely(ret != (int)n)) {
+ DPAA2_MEMPOOL_ERR("%s: expect to free %d!= %d",
+ __func__, n, ret);
+
+ return -EIO;
+ }
return 0;
}
@@ -497,6 +559,7 @@ dpaa2_populate(struct rte_mempool *mp, unsigned int max_objs,
rte_mempool_populate_obj_cb_t *obj_cb, void *obj_cb_arg)
{
struct rte_memseg_list *msl;
+ int ret;
/* The memsegment list exists incase the memory is not external.
* So, DMA-Map is required only when memory is provided by user,
* i.e. External.
@@ -505,11 +568,10 @@ dpaa2_populate(struct rte_mempool *mp, unsigned int max_objs,
if (!msl) {
DPAA2_MEMPOOL_DEBUG("Memsegment is External.");
- rte_fslmc_vfio_mem_dmamap((size_t)vaddr,
- (size_t)paddr, (size_t)len);
+ ret = rte_fslmc_vfio_mem_dmamap((size_t)vaddr, paddr, len);
+ if (ret)
+ return ret;
}
- /* Insert entry into the PA->VA Table */
- dpaax_iova_table_update(paddr, vaddr, len);
return rte_mempool_op_populate_helper(mp, 0, max_objs, vaddr, paddr,
len, obj_cb, obj_cb_arg);
--
2.25.1
^ permalink raw reply [flat|nested] 24+ messages in thread* [PATCH v2 05/11] net/dpaa2: add dpmac MC header file
2025-06-02 10:40 ` [PATCH v2 00/11] NXP DPAA2 driver enhancements and fixes Gagandeep Singh
` (3 preceding siblings ...)
2025-06-02 10:40 ` [PATCH v2 04/11] mempool/dpaa2: use unified VA to IOVA conversion Gagandeep Singh
@ 2025-06-02 10:40 ` Gagandeep Singh
2025-06-02 10:40 ` [PATCH v2 06/11] net/dpaa2: support dpmac counters in stats Gagandeep Singh
` (5 subsequent siblings)
10 siblings, 0 replies; 24+ messages in thread
From: Gagandeep Singh @ 2025-06-02 10:40 UTC (permalink / raw)
To: dev, Hemant Agrawal, Sachin Saxena; +Cc: Apeksha Gupta
From: Apeksha Gupta <apeksha.gupta@nxp.com>
This patch upgrades the MC firmware release API compatibility
to 10.39.0. Added mc/fsl_dpmac.h file.
Signed-off-by: Apeksha Gupta <apeksha.gupta@nxp.com>
---
drivers/net/dpaa2/mc/fsl_dpmac.h | 490 +++++++++++++++++++++++++++++++
1 file changed, 490 insertions(+)
create mode 100644 drivers/net/dpaa2/mc/fsl_dpmac.h
diff --git a/drivers/net/dpaa2/mc/fsl_dpmac.h b/drivers/net/dpaa2/mc/fsl_dpmac.h
new file mode 100644
index 0000000000..c4f16f6113
--- /dev/null
+++ b/drivers/net/dpaa2/mc/fsl_dpmac.h
@@ -0,0 +1,490 @@
+/* Copyright 2013-2016 Freescale Semiconductor Inc.
+ * Copyright 2018-2022, 2024 NXP
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of the above-listed copyright holders nor the
+ * names of any contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+#ifndef __FSL_DPMAC_H
+#define __FSL_DPMAC_H
+
+/** @addtogroup dpmac Data Path MAC API
+ * Contains initialization APIs and runtime control APIs for DPMAC
+ * @{
+ */
+
+struct fsl_mc_io;
+
+int dpmac_open(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ int dpmac_id,
+ uint16_t *token);
+
+int dpmac_close(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token);
+
+/**
+ * enum dpmac_link_type - DPMAC link type
+ * @DPMAC_LINK_TYPE_NONE: No link
+ * @DPMAC_LINK_TYPE_FIXED: Link is fixed type
+ * @DPMAC_LINK_TYPE_PHY: Link by PHY ID
+ * @DPMAC_LINK_TYPE_BACKPLANE: Backplane link type
+ */
+enum dpmac_link_type {
+ DPMAC_LINK_TYPE_NONE,
+ DPMAC_LINK_TYPE_FIXED,
+ DPMAC_LINK_TYPE_PHY,
+ DPMAC_LINK_TYPE_BACKPLANE
+};
+
+/**
+ * enum dpmac_eth_if - DPMAC Ethrnet interface
+ * @DPMAC_ETH_IF_MII: MII interface
+ * @DPMAC_ETH_IF_RMII: RMII interface
+ * @DPMAC_ETH_IF_SMII: SMII interface
+ * @DPMAC_ETH_IF_GMII: GMII interface
+ * @DPMAC_ETH_IF_RGMII: RGMII interface
+ * @DPMAC_ETH_IF_SGMII: SGMII interface
+ * @DPMAC_ETH_IF_QSGMII: QSGMII interface
+ * @DPMAC_ETH_IF_XAUI: XAUI interface
+ * @DPMAC_ETH_IF_XFI: XFI interface
+ * @DPMAC_ETH_IF_CAUI: CAUI interface
+ * @DPMAC_ETH_IF_1000BASEX: 1000BASEX interface
+ * @DPMAC_ETH_IF_USXGMII: USXGMII interface
+ */
+enum dpmac_eth_if {
+ DPMAC_ETH_IF_MII,
+ DPMAC_ETH_IF_RMII,
+ DPMAC_ETH_IF_SMII,
+ DPMAC_ETH_IF_GMII,
+ DPMAC_ETH_IF_RGMII,
+ DPMAC_ETH_IF_SGMII,
+ DPMAC_ETH_IF_QSGMII,
+ DPMAC_ETH_IF_XAUI,
+ DPMAC_ETH_IF_XFI,
+ DPMAC_ETH_IF_CAUI,
+ DPMAC_ETH_IF_1000BASEX,
+ DPMAC_ETH_IF_USXGMII,
+};
+/*
+ * @DPMAC_FEC_NONE: RS-FEC (enabled by default) is disabled
+ * @DPMAC_FEC_RS: RS-FEC (Clause 91) mode configured
+ * @DPMAC_FEC_FC: FC-FEC (Clause 74) mode configured (not yet supported)
+ */
+enum dpmac_fec_mode {
+ DPMAC_FEC_NONE,
+ DPMAC_FEC_RS,
+ DPMAC_FEC_FC,
+};
+
+/* serdes sfi/custom settings feature internals
+ * @SERDES_CFG_DEFAULT: the default configuration.
+ * @SERDES_CFG_SFI: default operating mode for XFI interfaces
+ * @SERDES_CFG_CUSTOM: It allows the user to manually configure the type of equalization,
+ * amplitude, preq and post1q settings. Can be used with all interfaces except RGMII.
+ */
+enum serdes_eq_cfg_mode {
+ SERDES_CFG_DEFAULT = 0,
+ SERDES_CFG_SFI,
+ SERDES_CFG_CUSTOM,
+};
+
+/**
+ * struct dpmac_cfg - Structure representing DPMAC configuration
+ * @mac_id: Represents the Hardware MAC ID; in case of multiple WRIOP,
+ * the MAC IDs are continuous.
+ * For example: 2 WRIOPs, 16 MACs in each:
+ * MAC IDs for the 1st WRIOP: 1-16,
+ * MAC IDs for the 2nd WRIOP: 17-32.
+ */
+struct dpmac_cfg {
+ uint16_t mac_id;
+};
+
+int dpmac_create(struct fsl_mc_io *mc_io,
+ uint16_t dprc_token,
+ uint32_t cmd_flags,
+ const struct dpmac_cfg *cfg,
+ uint32_t *obj_id);
+
+int dpmac_destroy(struct fsl_mc_io *mc_io,
+ uint16_t dprc_token,
+ uint32_t cmd_flags,
+ uint32_t object_id);
+
+/**
+ * DPMAC IRQ Index and Events
+ */
+
+/**
+ * IRQ index
+ */
+#define DPMAC_IRQ_INDEX 0
+/**
+ * IRQ event - indicates a change in link state
+ */
+#define DPMAC_IRQ_EVENT_LINK_CFG_REQ 0x00000001
+/**
+ * IRQ event - Indicates that the link state changed
+ */
+#define DPMAC_IRQ_EVENT_LINK_CHANGED 0x00000002
+/**
+ * IRQ event - The object requests link up
+ */
+#define DPMAC_IRQ_EVENT_LINK_UP_REQ 0x00000004
+/**
+ * IRQ event - The object requests link down
+ */
+#define DPMAC_IRQ_EVENT_LINK_DOWN_REQ 0x00000008
+/**
+ * IRQ event - indicates a change in endpoint
+ */
+#define DPMAC_IRQ_EVENT_ENDPOINT_CHANGED 0x00000010
+
+int dpmac_set_irq_enable(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ uint8_t irq_index,
+ uint8_t en);
+
+int dpmac_get_irq_enable(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ uint8_t irq_index,
+ uint8_t *en);
+
+int dpmac_set_irq_mask(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ uint8_t irq_index,
+ uint32_t mask);
+
+int dpmac_get_irq_mask(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ uint8_t irq_index,
+ uint32_t *mask);
+
+int dpmac_get_irq_status(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ uint8_t irq_index,
+ uint32_t *status);
+
+int dpmac_clear_irq_status(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ uint8_t irq_index,
+ uint32_t status);
+
+/**
+ * @brief Inter-Frame Gap mode
+ *
+ * LAN/WAN uses different Inter-Frame Gap mode
+ */
+enum dpmac_ifg_mode {
+ DPMAC_IFG_MODE_FIXED,
+ /*!< IFG length represents number of octets in steps of 4 */
+ DPMAC_IFG_MODE_STRETCHED
+ /*!< IFG length represents the stretch factor */
+};
+
+/**
+ * @brief Structure representing Inter-Frame Gap mode configuration
+ */
+struct dpmac_ifg_cfg {
+ enum dpmac_ifg_mode ipg_mode; /*!< WAN/LAN mode */
+ uint8_t ipg_length; /*!< IPG Length, default value is 0xC */
+};
+
+/**
+ * @brief Structure used to read through MDIO
+ */
+struct dpmac_mdio_read {
+ uint8_t cl45; /*!< Clause 45 */
+ uint8_t phy_addr; /*!< MDIO PHY address */
+ uint16_t reg; /*!< PHY register */
+};
+
+/**
+ * @brief Structure used to write through MDIO
+ */
+struct dpmac_mdio_write {
+ uint8_t cl45; /*!< Clause 45 */
+ uint8_t phy_addr; /*!< MDIO PHY address */
+ uint16_t reg; /*!< PHY register */
+ uint16_t data; /*!< Data to be written */
+};
+
+#define DPMAC_SET_PARAMS_IFG 0x1
+
+/**
+ * struct serdes_eq_settings - Structure SerDes equalization settings
+ * cfg: serdes sfi/custom/default settings feature internals
+ * @eq_type: Number of levels of TX equalization
+ * @sgn_preq: Precursor sign indicating direction of eye closure
+ * @eq_preq: Drive strength of TX full swing transition bit to precursor
+ * @sgn_post1q: First post-cursor sign indicating direction of eye closure
+ * @eq_post1q: Drive strength of full swing transition bit to first post-cursor
+ * @eq_amp_red: Overall transmit amplitude reduction
+ */
+struct serdes_eq_settings {
+ enum serdes_eq_cfg_mode cfg;
+ int eq_type;
+ int sgn_preq;
+ int eq_preq;
+ int sgn_post1q;
+ int eq_post1q;
+ int eq_amp_red;
+};
+
+/**
+ * struct dpmac_attr - Structure representing DPMAC attributes
+ * @id: DPMAC object ID
+ * @max_rate: Maximum supported rate - in Mbps
+ * @eth_if: Ethernet interface
+ * @link_type: link type
+ * @fec_mode: FEC mode - Configurable only for 25G interfaces
+ * serdes_cfg: SerDes equalization settings
+ */
+struct dpmac_attr {
+ uint16_t id;
+ uint32_t max_rate;
+ enum dpmac_eth_if eth_if;
+ enum dpmac_link_type link_type;
+ enum dpmac_fec_mode fec_mode;
+ struct serdes_eq_settings serdes_cfg;
+ struct dpmac_ifg_cfg ifg_cfg;
+};
+
+int dpmac_get_attributes(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ struct dpmac_attr *attr);
+
+int dpmac_set_params(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ uint32_t flags,
+ struct dpmac_ifg_cfg ifg_cfg);
+
+int dpmac_get_mac_addr(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ uint8_t mac_addr[6]);
+
+/**
+ * DPMAC link configuration/state options
+ */
+
+/**
+ * Enable auto-negotiation
+ */
+#define DPMAC_LINK_OPT_AUTONEG 0x0000000000000001ULL
+/**
+ * Enable half-duplex mode
+ */
+#define DPMAC_LINK_OPT_HALF_DUPLEX 0x0000000000000002ULL
+/**
+ * Enable pause frames
+ */
+#define DPMAC_LINK_OPT_PAUSE 0x0000000000000004ULL
+/**
+ * Enable a-symmetric pause frames
+ */
+#define DPMAC_LINK_OPT_ASYM_PAUSE 0x0000000000000008ULL
+/**
+ * Advertise 10MB full duplex
+ */
+#define DPMAC_ADVERTISED_10BASET_FULL 0x0000000000000001ULL
+/**
+ * Advertise 100MB full duplex
+ */
+#define DPMAC_ADVERTISED_100BASET_FULL 0x0000000000000002ULL
+/**
+ * Advertise 1GB full duplex
+ */
+#define DPMAC_ADVERTISED_1000BASET_FULL 0x0000000000000004ULL
+/**
+ * Advertise auto-negotiation enable
+ */
+#define DPMAC_ADVERTISED_AUTONEG 0x0000000000000008ULL
+/**
+ * Advertise 10GB full duplex
+ */
+#define DPMAC_ADVERTISED_10000BASET_FULL 0x0000000000000010ULL
+/**
+ * Advertise 2.5GB full duplex
+ */
+#define DPMAC_ADVERTISED_2500BASEX_FULL 0x0000000000000020ULL
+/**
+ * Advertise 5GB full duplex
+ */
+#define DPMAC_ADVERTISED_5000BASET_FULL 0x0000000000000040ULL
+
+/**
+ * struct dpmac_link_cfg - Structure representing DPMAC link configuration
+ * @rate: Link's rate - in Mbps
+ * @options: Enable/Disable DPMAC link cfg features (bitmap)
+ * @advertising: Speeds that are advertised for autoneg (bitmap)
+ */
+struct dpmac_link_cfg {
+ uint32_t rate;
+ uint64_t options;
+ uint64_t advertising;
+};
+
+int dpmac_get_link_cfg(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ struct dpmac_link_cfg *cfg);
+
+/**
+ * struct dpmac_link_state - DPMAC link configuration request
+ * @rate: Rate in Mbps
+ * @options: Enable/Disable DPMAC link cfg features (bitmap)
+ * @up: Link state
+ * @state_valid: Ignore/Update the state of the link
+ * @supported: Speeds capability of the phy (bitmap)
+ * @advertising: Speeds that are advertised for autoneg (bitmap)
+ */
+struct dpmac_link_state {
+ uint32_t rate;
+ uint64_t options;
+ int up;
+ int state_valid;
+ uint64_t supported;
+ uint64_t advertising;
+};
+
+int dpmac_set_link_state(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ struct dpmac_link_state *link_state);
+
+/**
+ * enum dpmac_counter - DPMAC counter types
+ * @DPMAC_CNT_ING_FRAME_64: counts 64-bytes frames, good or bad.
+ * @DPMAC_CNT_ING_FRAME_127: counts 65- to 127-bytes frames, good or bad.
+ * @DPMAC_CNT_ING_FRAME_255: counts 128- to 255-bytes frames, good or bad.
+ * @DPMAC_CNT_ING_FRAME_511: counts 256- to 511-bytes frames, good or bad.
+ * @DPMAC_CNT_ING_FRAME_1023: counts 512- to 1023-bytes frames, good or bad.
+ * @DPMAC_CNT_ING_FRAME_1518: counts 1024- to 1518-bytes frames, good or bad.
+ * @DPMAC_CNT_ING_FRAME_1519_MAX: counts 1519-bytes frames and larger
+ * (up to max frame length specified),
+ * good or bad.
+ * @DPMAC_CNT_ING_FRAG: counts frames which are shorter than 64 bytes received
+ * with a wrong CRC
+ * @DPMAC_CNT_ING_JABBER: counts frames longer than the maximum frame length
+ * specified, with a bad frame check sequence.
+ * @DPMAC_CNT_ING_FRAME_DISCARD: counts dropped frames due to internal errors.
+ * Occurs when a receive FIFO overflows.
+ * Includes also frames truncated as a result of
+ * the receive FIFO overflow.
+ * @DPMAC_CNT_ING_ALIGN_ERR: counts frames with an alignment error
+ * (optional used for wrong SFD).
+ * @DPMAC_CNT_EGR_UNDERSIZED: counts frames transmitted that was less than 64
+ * bytes long with a good CRC.
+ * @DPMAC_CNT_ING_OVERSIZED: counts frames longer than the maximum frame length
+ * specified, with a good frame check sequence.
+ * @DPMAC_CNT_ING_VALID_PAUSE_FRAME: counts valid pause frames (regular and PFC)
+ * @DPMAC_CNT_EGR_VALID_PAUSE_FRAME: counts valid pause frames transmitted
+ * (regular and PFC).
+ * @DPMAC_CNT_ING_BYTE: counts bytes received except preamble for all valid
+ * frames and valid pause frames.
+ * @DPMAC_CNT_ING_MCAST_FRAME: counts received multicast frames.
+ * @DPMAC_CNT_ING_BCAST_FRAME: counts received broadcast frames.
+ * @DPMAC_CNT_ING_ALL_FRAME: counts each good or bad frames received.
+ * @DPMAC_CNT_ING_UCAST_FRAME: counts received unicast frames.
+ * @DPMAC_CNT_ING_ERR_FRAME: counts frames received with an error
+ * (except for undersized/fragment frame).
+ * @DPMAC_CNT_EGR_BYTE: counts bytes transmitted except preamble for all valid
+ * frames and valid pause frames transmitted.
+ * @DPMAC_CNT_EGR_MCAST_FRAME: counts transmitted multicast frames.
+ * @DPMAC_CNT_EGR_BCAST_FRAME: counts transmitted broadcast frames.
+ * @DPMAC_CNT_EGR_UCAST_FRAME: counts transmitted unicast frames.
+ * @DPMAC_CNT_EGR_ERR_FRAME: counts frames transmitted with an error.
+ * @DPMAC_CNT_ING_GOOD_FRAME: counts frames received without error, including
+ * pause frames.
+ * @DPMAC_CNT_EGR_GOOD_FRAME: counts frames transmitted without error, including
+ * pause frames.
+ */
+enum dpmac_counter {
+ DPMAC_CNT_ING_FRAME_64,
+ DPMAC_CNT_ING_FRAME_127,
+ DPMAC_CNT_ING_FRAME_255,
+ DPMAC_CNT_ING_FRAME_511,
+ DPMAC_CNT_ING_FRAME_1023,
+ DPMAC_CNT_ING_FRAME_1518,
+ DPMAC_CNT_ING_FRAME_1519_MAX,
+ DPMAC_CNT_ING_FRAG,
+ DPMAC_CNT_ING_JABBER,
+ DPMAC_CNT_ING_FRAME_DISCARD,
+ DPMAC_CNT_ING_ALIGN_ERR,
+ DPMAC_CNT_EGR_UNDERSIZED,
+ DPMAC_CNT_ING_OVERSIZED,
+ DPMAC_CNT_ING_VALID_PAUSE_FRAME,
+ DPMAC_CNT_EGR_VALID_PAUSE_FRAME,
+ DPMAC_CNT_ING_BYTE,
+ DPMAC_CNT_ING_MCAST_FRAME,
+ DPMAC_CNT_ING_BCAST_FRAME,
+ DPMAC_CNT_ING_ALL_FRAME,
+ DPMAC_CNT_ING_UCAST_FRAME,
+ DPMAC_CNT_ING_ERR_FRAME,
+ DPMAC_CNT_EGR_BYTE,
+ DPMAC_CNT_EGR_MCAST_FRAME,
+ DPMAC_CNT_EGR_BCAST_FRAME,
+ DPMAC_CNT_EGR_UCAST_FRAME,
+ DPMAC_CNT_EGR_ERR_FRAME,
+ DPMAC_CNT_ING_GOOD_FRAME,
+ DPMAC_CNT_EGR_GOOD_FRAME
+};
+
+int dpmac_get_counter(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ enum dpmac_counter type,
+ uint64_t *counter);
+
+int dpmac_get_api_version(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t *major_ver,
+ uint16_t *minor_ver);
+
+int dpmac_reset(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token);
+
+int dpmac_set_protocol(struct fsl_mc_io *mc_io, uint32_t cmd_flags,
+ uint16_t token, enum dpmac_eth_if protocol);
+
+int dpmac_get_statistics(struct fsl_mc_io *mc_io, uint32_t cmd_flags, uint16_t token,
+ uint64_t iova_cnt, uint64_t iova_values, uint32_t num_cnt);
+
+#endif /* __FSL_DPMAC_H */
--
2.25.1
^ permalink raw reply [flat|nested] 24+ messages in thread* [PATCH v2 06/11] net/dpaa2: support dpmac counters in stats
2025-06-02 10:40 ` [PATCH v2 00/11] NXP DPAA2 driver enhancements and fixes Gagandeep Singh
` (4 preceding siblings ...)
2025-06-02 10:40 ` [PATCH v2 05/11] net/dpaa2: add dpmac MC header file Gagandeep Singh
@ 2025-06-02 10:40 ` Gagandeep Singh
2025-06-02 10:40 ` [PATCH v2 07/11] net/dpaa2: support dpmac Tx stats Gagandeep Singh
` (4 subsequent siblings)
10 siblings, 0 replies; 24+ messages in thread
From: Gagandeep Singh @ 2025-06-02 10:40 UTC (permalink / raw)
To: dev, Hemant Agrawal, Sachin Saxena; +Cc: Apeksha Gupta, Vanshika Shukla
From: Apeksha Gupta <apeksha.gupta@nxp.com>
Add support of dpmac counters in xstats.
Signed-off-by: Apeksha Gupta <apeksha.gupta@nxp.com>
Signed-off-by: Vanshika Shukla <vanshika.shukla@nxp.com>
---
drivers/net/dpaa2/dpaa2_ethdev.c | 118 ++++++++++++++++++++++++++--
drivers/net/dpaa2/dpaa2_ethdev.h | 12 +++
drivers/net/dpaa2/mc/dpni.c | 29 ++++++-
drivers/net/dpaa2/mc/fsl_dpni.h | 3 +
drivers/net/dpaa2/mc/fsl_dpni_cmd.h | 11 ++-
5 files changed, 163 insertions(+), 10 deletions(-)
diff --git a/drivers/net/dpaa2/dpaa2_ethdev.c b/drivers/net/dpaa2/dpaa2_ethdev.c
index d17785a6ee..bbf4df69d4 100644
--- a/drivers/net/dpaa2/dpaa2_ethdev.c
+++ b/drivers/net/dpaa2/dpaa2_ethdev.c
@@ -106,6 +106,34 @@ static const struct rte_dpaa2_xstats_name_off dpaa2_xstats_strings[] = {
{"egress_confirmed_frames", 2, 4},
{"cgr_reject_frames", 4, 0},
{"cgr_reject_bytes", 4, 1},
+ {"mac_rx_64 bytes", 0, 0},
+ {"mac_rx_65-127 bytes", 0, 0},
+ {"mac_rx_128-255 bytes", 0, 0},
+ {"mac_rx_256-511 bytes", 0, 0},
+ {"mac_rx_512-1023 bytes", 0, 0},
+ {"mac_rx_1024-1518 bytes", 0, 0},
+ {"mac_rx_1519-max bytes", 0, 0},
+ {"mac_rx_frags", 0, 0},
+ {"mac_rx_jabber", 0, 0},
+ {"mac_rx_frame discards", 0, 0},
+ {"mac_rx_align errors", 0, 0},
+ {"mac_tx_undersized", 0, 0},
+ {"mac_rx_oversized", 0, 0},
+ {"mac_rx_pause", 0, 0},
+ {"mac_tx_b-pause", 0, 0},
+ {"mac_rx_bytes", 0, 0},
+ {"mac_rx_m-cast", 0, 0},
+ {"mac_rx_b-cast", 0, 0},
+ {"mac_rx_all frames", 0, 0},
+ {"mac_rx_u-cast", 0, 0},
+ {"mac_rx_frame errors", 0, 0},
+ {"mac_tx_bytes", 0, 0},
+ {"mac_tx_m-cast", 0, 0},
+ {"mac_tx_b-cast", 0, 0},
+ {"mac_tx_u-cast", 0, 0},
+ {"mac_tx_frame errors", 0, 0},
+ {"mac_rx_frames ok", 0, 0},
+ {"mac_tx_frames ok", 0, 0},
};
static struct rte_dpaa2_driver rte_dpaa2_pmd;
@@ -1713,16 +1741,67 @@ dpaa2_dev_stats_get(struct rte_eth_dev *dev,
return retcode;
};
+void
+dpaa2_dev_mac_setup_stats(struct rte_eth_dev *dev)
+{
+ struct dpaa2_dev_priv *priv = dev->data->dev_private;
+ uint32_t *cnt_idx;
+ int i;
+
+ priv->cnt_idx_dma_mem = rte_malloc(NULL, DPAA2_MAC_STATS_INDEX_DMA_SIZE,
+ RTE_CACHE_LINE_SIZE);
+ if (!priv->cnt_idx_dma_mem) {
+ DPAA2_PMD_ERR("Failure to allocate memory for mac index");
+ goto out;
+ }
+
+ priv->cnt_values_dma_mem = rte_malloc(NULL, DPAA2_MAC_STATS_VALUE_DMA_SIZE,
+ RTE_CACHE_LINE_SIZE);
+ if (!priv->cnt_values_dma_mem) {
+ DPAA2_PMD_ERR("Failure to allocate memory for mac values");
+ goto err_alloc_values;
+ }
+
+ cnt_idx = priv->cnt_idx_dma_mem;
+ for (i = 0; i < DPAA2_MAC_NUM_STATS; i++)
+ *cnt_idx++ = rte_cpu_to_le_32((uint32_t)i);
+
+ priv->cnt_idx_iova = rte_mem_virt2iova(priv->cnt_idx_dma_mem);
+ if (priv->cnt_idx_iova == RTE_BAD_IOVA) {
+ DPAA2_PMD_ERR("%s: No IOMMU map for count index dma mem(%p)",
+ __func__, priv->cnt_idx_dma_mem);
+ goto err_dma_map;
+ }
+
+ priv->cnt_values_iova = rte_mem_virt2iova(priv->cnt_values_dma_mem);
+ if (priv->cnt_values_iova == RTE_BAD_IOVA) {
+ DPAA2_PMD_ERR("%s: No IOMMU map for count values dma mem(%p)",
+ __func__, priv->cnt_values_dma_mem);
+ goto err_dma_map;
+ }
+
+ return;
+
+err_dma_map:
+ rte_free(priv->cnt_values_dma_mem);
+err_alloc_values:
+ rte_free(priv->cnt_idx_dma_mem);
+out:
+ priv->cnt_idx_dma_mem = NULL;
+ priv->cnt_values_dma_mem = NULL;
+}
+
static int
dpaa2_dev_xstats_get(struct rte_eth_dev *dev,
struct rte_eth_xstat *xstats, unsigned int n)
{
- struct dpaa2_dev_priv *priv = dev->data->dev_private;
struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
- int32_t retcode;
+ unsigned int i = 0, j = 0, num = RTE_DIM(dpaa2_xstats_strings);
+ struct dpaa2_dev_priv *priv = dev->data->dev_private;
union dpni_statistics value[5] = {};
- unsigned int i = 0, num = RTE_DIM(dpaa2_xstats_strings);
uint8_t page_id, stats_id;
+ uint64_t *cnt_values;
+ int32_t retcode;
if (n < num)
return num;
@@ -1748,8 +1827,8 @@ dpaa2_dev_xstats_get(struct rte_eth_dev *dev,
if (retcode)
goto err;
- for (i = 0; i < priv->max_cgs; i++) {
- if (!priv->cgid_in_use[i]) {
+ for (j = 0; j < priv->max_cgs; j++) {
+ if (!priv->cgid_in_use[j]) {
/* Get Counters from page_4*/
retcode = dpni_get_statistics(dpni, CMD_PRI_LOW,
priv->token,
@@ -1759,13 +1838,38 @@ dpaa2_dev_xstats_get(struct rte_eth_dev *dev,
break;
}
}
-
- for (i = 0; i < num; i++) {
+ while (i < (num - DPAA2_MAC_NUM_STATS)) {
xstats[i].id = i;
page_id = dpaa2_xstats_strings[i].page_id;
stats_id = dpaa2_xstats_strings[i].stats_id;
xstats[i].value = value[page_id].raw.counter[stats_id];
+ i++;
+ }
+
+ dpaa2_dev_mac_setup_stats(dev);
+ retcode = dpni_get_mac_statistics(dpni, CMD_PRI_LOW, priv->token,
+ priv->cnt_idx_iova, priv->cnt_values_iova,
+ DPAA2_MAC_NUM_STATS);
+ if (retcode) {
+ DPAA2_PMD_WARN("MAC (mac_*) counters are not supported!!");
+ rte_free(priv->cnt_values_dma_mem);
+ rte_free(priv->cnt_idx_dma_mem);
+ while (i >= (num - DPAA2_MAC_NUM_STATS) && i < num) {
+ xstats[i].id = i;
+ xstats[i].value = 0;
+ i++;
+ }
}
+ if (!retcode) {
+ cnt_values = priv->cnt_values_dma_mem;
+ while (i >= (num - DPAA2_MAC_NUM_STATS) && i < num) {
+ /* mac counters value */
+ xstats[i].id = i;
+ xstats[i].value = rte_le_to_cpu_64(*cnt_values++);
+ i++;
+ }
+ }
+
return i;
err:
DPAA2_PMD_ERR("Error in obtaining extended stats (%d)", retcode);
diff --git a/drivers/net/dpaa2/dpaa2_ethdev.h b/drivers/net/dpaa2/dpaa2_ethdev.h
index 103fa2ca67..532c257203 100644
--- a/drivers/net/dpaa2/dpaa2_ethdev.h
+++ b/drivers/net/dpaa2/dpaa2_ethdev.h
@@ -18,6 +18,7 @@
#include <mc/fsl_dpni.h>
#include <mc/fsl_mc_sys.h>
+#include <mc/fsl_dpmac.h>
#include "base/dpaa2_hw_dpni_annot.h"
@@ -129,6 +130,11 @@
#define DPAA2_PKT_TYPE_VLAN_1 0x0160
#define DPAA2_PKT_TYPE_VLAN_2 0x0260
+/* mac counters */
+#define DPAA2_MAC_NUM_STATS (DPMAC_CNT_EGR_GOOD_FRAME + 1)
+#define DPAA2_MAC_STATS_INDEX_DMA_SIZE (DPAA2_MAC_NUM_STATS * sizeof(uint32_t))
+#define DPAA2_MAC_STATS_VALUE_DMA_SIZE (DPAA2_MAC_NUM_STATS * sizeof(uint64_t))
+
/* Global pool used by driver for SG list TX */
extern struct rte_mempool *dpaa2_tx_sg_pool;
/* Maximum SG segments */
@@ -413,6 +419,10 @@ struct dpaa2_dev_priv {
uint8_t channel_inuse;
/* Stores correction offset for one step timestamping */
uint16_t ptp_correction_offset;
+ /* for mac counters */
+ uint32_t *cnt_idx_dma_mem;
+ uint64_t *cnt_values_dma_mem;
+ uint64_t cnt_idx_iova, cnt_values_iova;
struct dpaa2_dev_flow *curr;
LIST_HEAD(, dpaa2_dev_flow) flows;
@@ -498,4 +508,6 @@ int dpaa2_dev_recycle_qp_setup(struct rte_dpaa2_device *dpaa2_dev,
struct dpaa2_queue **txq,
struct dpaa2_queue **rxq);
+void
+dpaa2_dev_mac_setup_stats(struct rte_eth_dev *dev);
#endif /* _DPAA2_ETHDEV_H */
diff --git a/drivers/net/dpaa2/mc/dpni.c b/drivers/net/dpaa2/mc/dpni.c
index 558f08dc69..f651f29b02 100644
--- a/drivers/net/dpaa2/mc/dpni.c
+++ b/drivers/net/dpaa2/mc/dpni.c
@@ -1,7 +1,7 @@
/* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0)
*
* Copyright 2013-2016 Freescale Semiconductor Inc.
- * Copyright 2016-2023 NXP
+ * Copyright 2016-2025 NXP
*
*/
#include <fsl_mc_sys.h>
@@ -3493,3 +3493,30 @@ int dpni_sp_enable(struct fsl_mc_io *mc_io, uint32_t cmd_flags, uint16_t token,
/* send command to MC */
return mc_send_command(mc_io, &cmd);
}
+/**
+ * dpni_get_mac_statistics() - Get statistics on the connected DPMAC objects
+ * @mc_io: Pointer to opaque I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token: Token of DPMAC object
+ * @iova_cnt: IOVA containing the requested MAC counters formatted as an
+ * array of __le32 representing the dpmac_counter_id.
+ * @iova_values: IOVA containing the values for all the requested counters
+ * formatted as an array of __le64.
+ * @num_cnt: Number of counters requested
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dpni_get_mac_statistics(struct fsl_mc_io *mc_io, uint32_t cmd_flags, uint16_t token,
+ uint64_t iova_cnt, uint64_t iova_values, uint32_t num_cnt)
+{
+ struct dpni_cmd_get_mac_statistics *cmd_params;
+ struct mc_command cmd = { 0 };
+
+ cmd.header = mc_encode_cmd_header(DPNI_CMDID_GET_MAC_STATISTICS, cmd_flags, token);
+ cmd_params = (struct dpni_cmd_get_mac_statistics *)cmd.params;
+ cmd_params->iova_cnt = cpu_to_le64(iova_cnt);
+ cmd_params->iova_values = cpu_to_le64(iova_values);
+ cmd_params->num_cnt = cpu_to_le32(num_cnt);
+
+ return mc_send_command(mc_io, &cmd);
+}
diff --git a/drivers/net/dpaa2/mc/fsl_dpni.h b/drivers/net/dpaa2/mc/fsl_dpni.h
index 3a5fcfa8a5..2f8125314c 100644
--- a/drivers/net/dpaa2/mc/fsl_dpni.h
+++ b/drivers/net/dpaa2/mc/fsl_dpni.h
@@ -2014,4 +2014,7 @@ int dpni_set_sp_profile(struct fsl_mc_io *mc_io, uint32_t cmd_flags, uint16_t to
int dpni_sp_enable(struct fsl_mc_io *mc_io, uint32_t cmd_flags, uint16_t token,
uint8_t type, uint8_t en);
+int dpni_get_mac_statistics(struct fsl_mc_io *mc_io, uint32_t cmd_flags, uint16_t token,
+ uint64_t iova_cnt, uint64_t iova_values, uint32_t num_cnt);
+
#endif /* __FSL_DPNI_H */
diff --git a/drivers/net/dpaa2/mc/fsl_dpni_cmd.h b/drivers/net/dpaa2/mc/fsl_dpni_cmd.h
index 1152182e34..f653f2c0e4 100644
--- a/drivers/net/dpaa2/mc/fsl_dpni_cmd.h
+++ b/drivers/net/dpaa2/mc/fsl_dpni_cmd.h
@@ -1,7 +1,7 @@
/* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0)
*
* Copyright 2013-2016 Freescale Semiconductor Inc.
- * Copyright 2016-2023 NXP
+ * Copyright 2016-2025 NXP
*
*/
#ifndef _FSL_DPNI_CMD_H
@@ -9,7 +9,7 @@
/* DPNI Version */
#define DPNI_VER_MAJOR 8
-#define DPNI_VER_MINOR 4
+#define DPNI_VER_MINOR 6
#define DPNI_CMD_BASE_VERSION 1
#define DPNI_CMD_VERSION_2 2
@@ -131,6 +131,7 @@
#define DPNI_CMDID_SP_ENABLE DPNI_CMD(0x280)
#define DPNI_CMDID_SET_QUEUE_TX_CONFIRMATION_MODE DPNI_CMD(0x281)
#define DPNI_CMDID_GET_QUEUE_TX_CONFIRMATION_MODE DPNI_CMD(0x282)
+#define DPNI_CMDID_GET_MAC_STATISTICS DPNI_CMD(0x283)
/* Macros for accessing command fields smaller than 1byte */
#define DPNI_MASK(field) \
@@ -1024,5 +1025,11 @@ struct dpni_cmd_sp_enable {
uint8_t en;
};
+struct dpni_cmd_get_mac_statistics {
+ uint64_t iova_cnt;
+ uint64_t iova_values;
+ uint32_t num_cnt;
+};
+
#pragma pack(pop)
#endif /* _FSL_DPNI_CMD_H */
--
2.25.1
^ permalink raw reply [flat|nested] 24+ messages in thread* [PATCH v2 07/11] net/dpaa2: support dpmac Tx stats
2025-06-02 10:40 ` [PATCH v2 00/11] NXP DPAA2 driver enhancements and fixes Gagandeep Singh
` (5 preceding siblings ...)
2025-06-02 10:40 ` [PATCH v2 06/11] net/dpaa2: support dpmac counters in stats Gagandeep Singh
@ 2025-06-02 10:40 ` Gagandeep Singh
2025-06-02 10:40 ` [PATCH v2 08/11] net/dpaa2: support dpmac Tx stats in xstats Gagandeep Singh
` (3 subsequent siblings)
10 siblings, 0 replies; 24+ messages in thread
From: Gagandeep Singh @ 2025-06-02 10:40 UTC (permalink / raw)
To: dev, Hemant Agrawal, Sachin Saxena; +Cc: Apeksha Gupta, Vanshika Shukla
From: Apeksha Gupta <apeksha.gupta@nxp.com>
Added all mac counters including Tx stats buckets for
packet sizes.
Signed-off-by: Apeksha Gupta <apeksha.gupta@nxp.com>
Signed-off-by: Vanshika Shukla <vanshika.shukla@nxp.com>
---
drivers/net/dpaa2/mc/fsl_dpmac.h | 50 ++++++++++++++++++++++++++++++--
1 file changed, 48 insertions(+), 2 deletions(-)
diff --git a/drivers/net/dpaa2/mc/fsl_dpmac.h b/drivers/net/dpaa2/mc/fsl_dpmac.h
index c4f16f6113..13b5a94b8c 100644
--- a/drivers/net/dpaa2/mc/fsl_dpmac.h
+++ b/drivers/net/dpaa2/mc/fsl_dpmac.h
@@ -1,5 +1,5 @@
/* Copyright 2013-2016 Freescale Semiconductor Inc.
- * Copyright 2018-2022, 2024 NXP
+ * Copyright 2018-2022, 2024-2025 NXP
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
@@ -434,6 +434,34 @@ int dpmac_set_link_state(struct fsl_mc_io *mc_io,
* pause frames.
* @DPMAC_CNT_EGR_GOOD_FRAME: counts frames transmitted without error, including
* pause frames.
+ * @DPMAC_CNT_EGR_FRAME_64: counts transmitted 64-bytes frames, good or bad.
+ * @DPMAC_CNT_EGR_FRAME_127: counts transmitted 65 to 127-bytes frames, good or bad.
+ * @DPMAC_CNT_EGR_FRAME_255: counts transmitted 128 to 255-bytes frames, good or bad.
+ * @DPMAC_CNT_EGR_FRAME_511: counts transmitted 256 to 511-bytes frames, good or bad.
+ * @DPMAC_CNT_EGR_FRAME_1023: counts transmitted 512 to 1023-bytes frames, good or bad.
+ * @DPMAC_CNT_EGR_FRAME_1518: counts transmitted 1024 to 1518-bytes frames, good or bad.
+ * @DPMAC_CNT_EGR_FRAME_1519_MAX: counts transmitted 1519-bytes frames and
+ * larger (up to max frame length specified), good or bad.
+ * @DPMAC_CNT_ING_ALL_BYTE: counts bytes received in both good and bad packets
+ * @DPMAC_CNT_ING_FCS_ERR: counts frames received with a CRC-32 error but the
+ * frame is otherwise of correct length
+ * @DPMAC_CNT_ING_VLAN_FRAME: counts the received VLAN tagged frames which are valid.
+ * @DPMAC_CNT_ING_UNDERSIZED: counts received frames which were less than 64
+ * bytes long and with a good CRC.
+ * @DPMAC_CNT_ING_CONTROL_FRAME: counts received control frames (type 0x8808)
+ * but not pause frames.
+ * @DPMAC_CNT_ING_FRAME_DISCARD_NOT_TRUNC: counts the fully dropped frames (not
+ * truncated) due to internal errors of the MAC client. Occurs when a received
+ * FIFO overflows.
+ * @DPMAC_CNT_EGR_ALL_BYTE: counts transmitted bytes in both good and bad
+ * packets.
+ * @DPMAC_CNT_EGR_FCS_ERR: counts trasmitted frames with a CRC-32 error except
+ * for underflows.
+ * @DPMAC_CNT_EGR_VLAN_FRAME: counts the transmitted VLAN tagged frames which
+ * are valid.
+ * @DPMAC_CNT_EGR_ALL_FRAME: counts all trasmitted frames, good or bad.
+ * @DPMAC_CNT_EGR_CONTROL_FRAME: counts transmitted control frames (type
+ * 0x8808) but not pause frames.
*/
enum dpmac_counter {
DPMAC_CNT_ING_FRAME_64,
@@ -463,7 +491,25 @@ enum dpmac_counter {
DPMAC_CNT_EGR_UCAST_FRAME,
DPMAC_CNT_EGR_ERR_FRAME,
DPMAC_CNT_ING_GOOD_FRAME,
- DPMAC_CNT_EGR_GOOD_FRAME
+ DPMAC_CNT_EGR_GOOD_FRAME,
+ DPMAC_CNT_EGR_FRAME_64,
+ DPMAC_CNT_EGR_FRAME_127,
+ DPMAC_CNT_EGR_FRAME_255,
+ DPMAC_CNT_EGR_FRAME_511,
+ DPMAC_CNT_EGR_FRAME_1023,
+ DPMAC_CNT_EGR_FRAME_1518,
+ DPMAC_CNT_EGR_FRAME_1519_MAX,
+ DPMAC_CNT_ING_ALL_BYTE,
+ DPMAC_CNT_ING_FCS_ERR,
+ DPMAC_CNT_ING_VLAN_FRAME,
+ DPMAC_CNT_ING_UNDERSIZED,
+ DPMAC_CNT_ING_CONTROL_FRAME,
+ DPMAC_CNT_ING_FRAME_DISCARD_NOT_TRUNC,
+ DPMAC_CNT_EGR_ALL_BYTE,
+ DPMAC_CNT_EGR_FCS_ERR,
+ DPMAC_CNT_EGR_VLAN_FRAME,
+ DPMAC_CNT_EGR_ALL_FRAME,
+ DPMAC_CNT_EGR_CONTROL_FRAME
};
int dpmac_get_counter(struct fsl_mc_io *mc_io,
--
2.25.1
^ permalink raw reply [flat|nested] 24+ messages in thread* [PATCH v2 08/11] net/dpaa2: support dpmac Tx stats in xstats
2025-06-02 10:40 ` [PATCH v2 00/11] NXP DPAA2 driver enhancements and fixes Gagandeep Singh
` (6 preceding siblings ...)
2025-06-02 10:40 ` [PATCH v2 07/11] net/dpaa2: support dpmac Tx stats Gagandeep Singh
@ 2025-06-02 10:40 ` Gagandeep Singh
2025-06-02 10:40 ` [PATCH v2 09/11] net/dpaa2: retrieve DPNI API version at init time Gagandeep Singh
` (2 subsequent siblings)
10 siblings, 0 replies; 24+ messages in thread
From: Gagandeep Singh @ 2025-06-02 10:40 UTC (permalink / raw)
To: dev, Hemant Agrawal, Sachin Saxena; +Cc: Apeksha Gupta, Vanshika Shukla
From: Apeksha Gupta <apeksha.gupta@nxp.com>
Added all mac counters including Tx stats buckets for
packet sizes in xstats.
Signed-off-by: Apeksha Gupta <apeksha.gupta@nxp.com>
Signed-off-by: Vanshika Shukla <vanshika.shukla@nxp.com>
---
drivers/net/dpaa2/dpaa2_ethdev.c | 20 +++++++++++++++++++-
drivers/net/dpaa2/dpaa2_ethdev.h | 4 ++--
2 files changed, 21 insertions(+), 3 deletions(-)
diff --git a/drivers/net/dpaa2/dpaa2_ethdev.c b/drivers/net/dpaa2/dpaa2_ethdev.c
index bbf4df69d4..298fded65e 100644
--- a/drivers/net/dpaa2/dpaa2_ethdev.c
+++ b/drivers/net/dpaa2/dpaa2_ethdev.c
@@ -1,7 +1,7 @@
/* * SPDX-License-Identifier: BSD-3-Clause
*
* Copyright (c) 2016 Freescale Semiconductor, Inc. All rights reserved.
- * Copyright 2016-2024 NXP
+ * Copyright 2016-2025 NXP
*
*/
@@ -134,6 +134,24 @@ static const struct rte_dpaa2_xstats_name_off dpaa2_xstats_strings[] = {
{"mac_tx_frame errors", 0, 0},
{"mac_rx_frames ok", 0, 0},
{"mac_tx_frames ok", 0, 0},
+ {"mac_tx_64 bytes", 0, 0},
+ {"mac_tx_65-127 bytes", 0, 0},
+ {"mac_tx_128-255 bytes", 0, 0},
+ {"mac_tx_256-511 bytes", 0, 0},
+ {"mac_tx_512-1023 bytes", 0, 0},
+ {"mac_tx_1024-1518 bytes", 0, 0},
+ {"mac_tx_1519-max bytes", 0, 0},
+ {"mac_rx_all_bytes", 0, 0},
+ {"mac_rx_fcs_err", 0, 0},
+ {"mac_rx_vlan_frame", 0, 0},
+ {"mac_rx_undersized", 0, 0},
+ {"mac_rx_control_frame", 0, 0},
+ {"mac_rx_frame_discard_not_trunc", 0, 0},
+ {"mac_tx_all_bytes", 0, 0},
+ {"mac_tx_fcs_err", 0, 0},
+ {"mac_tx_vlan_frame", 0, 0},
+ {"mac_tx_all_frame", 0, 0},
+ {"mac_tx_control_frame", 0, 0},
};
static struct rte_dpaa2_driver rte_dpaa2_pmd;
diff --git a/drivers/net/dpaa2/dpaa2_ethdev.h b/drivers/net/dpaa2/dpaa2_ethdev.h
index 532c257203..570b1608a0 100644
--- a/drivers/net/dpaa2/dpaa2_ethdev.h
+++ b/drivers/net/dpaa2/dpaa2_ethdev.h
@@ -1,7 +1,7 @@
/* SPDX-License-Identifier: BSD-3-Clause
*
* Copyright (c) 2015-2016 Freescale Semiconductor, Inc. All rights reserved.
- * Copyright 2016-2022 NXP
+ * Copyright 2016-2025 NXP
*
*/
@@ -131,7 +131,7 @@
#define DPAA2_PKT_TYPE_VLAN_2 0x0260
/* mac counters */
-#define DPAA2_MAC_NUM_STATS (DPMAC_CNT_EGR_GOOD_FRAME + 1)
+#define DPAA2_MAC_NUM_STATS (DPMAC_CNT_EGR_CONTROL_FRAME + 1)
#define DPAA2_MAC_STATS_INDEX_DMA_SIZE (DPAA2_MAC_NUM_STATS * sizeof(uint32_t))
#define DPAA2_MAC_STATS_VALUE_DMA_SIZE (DPAA2_MAC_NUM_STATS * sizeof(uint64_t))
--
2.25.1
^ permalink raw reply [flat|nested] 24+ messages in thread* [PATCH v2 09/11] net/dpaa2: retrieve DPNI API version at init time
2025-06-02 10:40 ` [PATCH v2 00/11] NXP DPAA2 driver enhancements and fixes Gagandeep Singh
` (7 preceding siblings ...)
2025-06-02 10:40 ` [PATCH v2 08/11] net/dpaa2: support dpmac Tx stats in xstats Gagandeep Singh
@ 2025-06-02 10:40 ` Gagandeep Singh
2025-06-02 10:40 ` [PATCH v2 10/11] net/dpaa2: setup the speed cap based on the actual MAC Gagandeep Singh
2025-06-02 10:40 ` [PATCH v2 11/11] net/dpaa2: enable software taildrop for ordered queues Gagandeep Singh
10 siblings, 0 replies; 24+ messages in thread
From: Gagandeep Singh @ 2025-06-02 10:40 UTC (permalink / raw)
To: dev, Thomas Monjalon, Hemant Agrawal, Sachin Saxena; +Cc: Ioana Ciornei
From: Ioana Ciornei <ioana.ciornei@nxp.com>
The list of availabla DPNI APIs depends on the DPNI API version
available on a system. Retrieve the API version in the init stage and
store it in the private structure so that it can be used at a later
stage.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
---
.mailmap | 1 +
drivers/net/dpaa2/dpaa2_ethdev.c | 8 ++++++++
drivers/net/dpaa2/dpaa2_ethdev.h | 3 +++
3 files changed, 12 insertions(+)
diff --git a/.mailmap b/.mailmap
index 91e08f4a1f..93905921b1 100644
--- a/.mailmap
+++ b/.mailmap
@@ -606,6 +606,7 @@ Ilya Maximets <i.maximets@ovn.org> <i.maximets@samsung.com>
Ilya V. Matveychikov <matvejchikov@gmail.com>
Ilyes Ben Hamouda <ilyes.ben_hamouda@6wind.com>
Intiyaz Basha <intiyaz.basha@caviumnetworks.com>
+Ioana Ciornei <ioana.ciornei@nxp.com>
Isaac Boukris <iboukris@gmail.com>
Itamar Gozlan <igozlan@nvidia.com>
Itsuro Oda <oda@valinux.co.jp>
diff --git a/drivers/net/dpaa2/dpaa2_ethdev.c b/drivers/net/dpaa2/dpaa2_ethdev.c
index 298fded65e..b88c9d748a 100644
--- a/drivers/net/dpaa2/dpaa2_ethdev.c
+++ b/drivers/net/dpaa2/dpaa2_ethdev.c
@@ -2814,6 +2814,14 @@ dpaa2_dev_init(struct rte_eth_dev *eth_dev)
goto init_err;
}
+ ret = dpni_get_api_version(dpni_dev, CMD_PRI_LOW, &priv->dpni_ver_major,
+ &priv->dpni_ver_minor);
+ if (ret) {
+ DPAA2_PMD_ERR("Failure in get dpni@%d API version, err code %d",
+ hw_id, ret);
+ goto init_err;
+ }
+
priv->num_rx_tc = attr.num_rx_tcs;
priv->num_tx_tc = attr.num_tx_tcs;
priv->qos_entries = attr.qos_entries;
diff --git a/drivers/net/dpaa2/dpaa2_ethdev.h b/drivers/net/dpaa2/dpaa2_ethdev.h
index 570b1608a0..ee5ae3b70a 100644
--- a/drivers/net/dpaa2/dpaa2_ethdev.h
+++ b/drivers/net/dpaa2/dpaa2_ethdev.h
@@ -394,6 +394,9 @@ struct dpaa2_dev_priv {
uint8_t max_cgs;
uint8_t cgid_in_use[MAX_RX_QUEUES];
+ uint16_t dpni_ver_major;
+ uint16_t dpni_ver_minor;
+
enum rte_dpaa2_dev_type ep_dev_type; /**< Endpoint Device Type */
uint16_t ep_object_id; /**< Endpoint DPAA2 Object ID */
char ep_name[RTE_DEV_NAME_MAX_LEN];
--
2.25.1
^ permalink raw reply [flat|nested] 24+ messages in thread* [PATCH v2 10/11] net/dpaa2: setup the speed cap based on the actual MAC
2025-06-02 10:40 ` [PATCH v2 00/11] NXP DPAA2 driver enhancements and fixes Gagandeep Singh
` (8 preceding siblings ...)
2025-06-02 10:40 ` [PATCH v2 09/11] net/dpaa2: retrieve DPNI API version at init time Gagandeep Singh
@ 2025-06-02 10:40 ` Gagandeep Singh
2025-06-02 10:40 ` [PATCH v2 11/11] net/dpaa2: enable software taildrop for ordered queues Gagandeep Singh
10 siblings, 0 replies; 24+ messages in thread
From: Gagandeep Singh @ 2025-06-02 10:40 UTC (permalink / raw)
To: dev, Hemant Agrawal, Sachin Saxena; +Cc: Ioana Ciornei
From: Ioana Ciornei <ioana.ciornei@nxp.com>
Previously, the speed_capa field from struct rte_eth_dev_info was
populated with all possible speeds that the MACs on the system could
sustain. What this meant is that the bitmap of speed capability did not
reflect what the MAC could do in the current circumstance.
Fix this by using the newly added MC command
dpni_get_mac_speed_capability() which returns a bitmap of
enum dpmac_link_speed. Since the MC API is a newly added one, we check
for the DPNI version to determine is we can use the API, if not the code
will fallback to the procedure used up until now.
Also, we interogate the MC firmware only at probe time to get the needed
into and then we store the information in the private structure to
use it any time .dev_infos_get() is called.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
---
drivers/net/dpaa2/dpaa2_ethdev.c | 87 ++++++++++++++++++++++++++---
drivers/net/dpaa2/dpaa2_ethdev.h | 12 ++++
drivers/net/dpaa2/mc/dpni.c | 21 +++++++
drivers/net/dpaa2/mc/fsl_dpmac.h | 15 +++++
drivers/net/dpaa2/mc/fsl_dpni.h | 5 +-
drivers/net/dpaa2/mc/fsl_dpni_cmd.h | 4 ++
6 files changed, 134 insertions(+), 10 deletions(-)
diff --git a/drivers/net/dpaa2/dpaa2_ethdev.c b/drivers/net/dpaa2/dpaa2_ethdev.c
index b88c9d748a..c661e027f5 100644
--- a/drivers/net/dpaa2/dpaa2_ethdev.c
+++ b/drivers/net/dpaa2/dpaa2_ethdev.c
@@ -290,6 +290,79 @@ dpaa2_fw_version_get(struct rte_eth_dev *dev,
return 0;
}
+static uint32_t dpaa2_speed_to_rte_link_speed(enum dpmac_link_speed dpmac_speed)
+{
+ switch (dpmac_speed) {
+ case DPMAC_LINK_SPEED_10M:
+ return RTE_ETH_LINK_SPEED_10M;
+ case DPMAC_LINK_SPEED_100M:
+ return RTE_ETH_LINK_SPEED_100M;
+ case DPMAC_LINK_SPEED_1G:
+ return RTE_ETH_LINK_SPEED_1G;
+ case DPMAC_LINK_SPEED_2_5G:
+ return RTE_ETH_LINK_SPEED_2_5G;
+ case DPMAC_LINK_SPEED_5G:
+ return RTE_ETH_LINK_SPEED_5G;
+ case DPMAC_LINK_SPEED_10G:
+ return RTE_ETH_LINK_SPEED_10G;
+ case DPMAC_LINK_SPEED_25G:
+ return RTE_ETH_LINK_SPEED_25G;
+ case DPMAC_LINK_SPEED_40G:
+ return RTE_ETH_LINK_SPEED_40G;
+ case DPMAC_LINK_SPEED_50G:
+ return RTE_ETH_LINK_SPEED_50G;
+ case DPMAC_LINK_SPEED_100G:
+ return RTE_ETH_LINK_SPEED_100G;
+ default:
+ return 0;
+ }
+}
+
+static uint32_t dpaa2_dev_get_speed_capability(struct rte_eth_dev *dev)
+{
+ struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
+ struct dpaa2_dev_priv *priv = dev->data->dev_private;
+ enum dpmac_link_speed speed;
+ uint32_t dpmac_speed_cap;
+ uint32_t speed_capa = 0;
+ int ret;
+
+ /* The dpni_get_mac_supported_eth_if() API is only available starting
+ * with DPNI ver 8.6.
+ */
+ if (dpaa2_dev_cmp_dpni_ver(priv, DPNI_GET_MAC_SUPPORTED_IFS_VER_MAJOR,
+ DPNI_GET_MAC_SUPPORTED_IFS_VER_MINOR) < 0)
+ goto fallback;
+
+ if (priv->ep_dev_type != DPAA2_MAC)
+ goto fallback;
+
+ ret = dpni_get_mac_speed_capability(dpni, CMD_PRI_LOW, priv->token,
+ &dpmac_speed_cap);
+ if (ret < 0) {
+ DPAA2_PMD_WARN("dpni_get_mac_speed_capability() failed with %d", ret);
+ goto fallback;
+ }
+ for (speed = DPMAC_LINK_SPEED_10M; speed < DPMAC_LINK_SPEED_MAX; speed++) {
+ if ((dpmac_speed_cap & (1 << speed)) == 0)
+ continue;
+
+ speed_capa |= dpaa2_speed_to_rte_link_speed(speed);
+ }
+
+ return speed_capa;
+
+fallback:
+ speed_capa = RTE_ETH_LINK_SPEED_1G | RTE_ETH_LINK_SPEED_2_5G |
+ RTE_ETH_LINK_SPEED_10G;
+
+ if (dpaa2_svr_family == SVR_LX2160A)
+ speed_capa |= RTE_ETH_LINK_SPEED_25G | RTE_ETH_LINK_SPEED_40G |
+ RTE_ETH_LINK_SPEED_50G | RTE_ETH_LINK_SPEED_100G;
+
+ return speed_capa;
+}
+
static int
dpaa2_dev_info_get(struct rte_eth_dev *dev,
struct rte_eth_dev_info *dev_info)
@@ -307,9 +380,6 @@ dpaa2_dev_info_get(struct rte_eth_dev *dev,
dev_rx_offloads_nodis;
dev_info->tx_offload_capa = dev_tx_offloads_sup |
dev_tx_offloads_nodis;
- dev_info->speed_capa = RTE_ETH_LINK_SPEED_1G |
- RTE_ETH_LINK_SPEED_2_5G |
- RTE_ETH_LINK_SPEED_10G;
dev_info->dev_capa &= ~RTE_ETH_DEV_CAPA_FLOW_RULE_KEEP;
dev_info->max_hash_mac_addrs = 0;
@@ -326,12 +396,7 @@ dpaa2_dev_info_get(struct rte_eth_dev *dev,
dev_info->default_txportconf.ring_size = CONG_ENTER_TX_THRESHOLD;
dev_info->default_rxportconf.ring_size = DPAA2_RX_DEFAULT_NBDESC;
- if (dpaa2_svr_family == SVR_LX2160A) {
- dev_info->speed_capa |= RTE_ETH_LINK_SPEED_25G |
- RTE_ETH_LINK_SPEED_40G |
- RTE_ETH_LINK_SPEED_50G |
- RTE_ETH_LINK_SPEED_100G;
- }
+ dev_info->speed_capa = priv->speed_capa;
return 0;
}
@@ -1133,6 +1198,7 @@ dpaa2_supported_ptypes_get(struct rte_eth_dev *dev, size_t *no_of_elements)
/*todo -= add more types */
RTE_PTYPE_L2_ETHER,
RTE_PTYPE_L3_IPV4,
+
RTE_PTYPE_L3_IPV4_EXT,
RTE_PTYPE_L3_IPV6,
RTE_PTYPE_L3_IPV6_EXT,
@@ -3010,6 +3076,9 @@ dpaa2_dev_init(struct rte_eth_dev *eth_dev)
DPAA2_PMD_INFO("%s: netdev created, connected to %s",
eth_dev->data->name, dpaa2_dev->ep_name);
+
+ priv->speed_capa = dpaa2_dev_get_speed_capability(eth_dev);
+
return 0;
init_err:
dpaa2_dev_close(eth_dev);
diff --git a/drivers/net/dpaa2/dpaa2_ethdev.h b/drivers/net/dpaa2/dpaa2_ethdev.h
index ee5ae3b70a..70357f0351 100644
--- a/drivers/net/dpaa2/dpaa2_ethdev.h
+++ b/drivers/net/dpaa2/dpaa2_ethdev.h
@@ -396,6 +396,7 @@ struct dpaa2_dev_priv {
uint16_t dpni_ver_major;
uint16_t dpni_ver_minor;
+ uint32_t speed_capa;
enum rte_dpaa2_dev_type ep_dev_type; /**< Endpoint Device Type */
uint16_t ep_object_id; /**< Endpoint DPAA2 Object ID */
@@ -433,6 +434,17 @@ struct dpaa2_dev_priv {
LIST_HEAD(shaper_profiles, dpaa2_tm_shaper_profile) shaper_profiles;
};
+#define DPNI_GET_MAC_SUPPORTED_IFS_VER_MAJOR 8
+#define DPNI_GET_MAC_SUPPORTED_IFS_VER_MINOR 6
+
+static inline int dpaa2_dev_cmp_dpni_ver(struct dpaa2_dev_priv *priv,
+ uint16_t ver_major, uint16_t ver_minor)
+{
+ if (priv->dpni_ver_major == ver_major)
+ return priv->dpni_ver_minor - ver_minor;
+ return priv->dpni_ver_major - ver_major;
+}
+
int dpaa2_distset_to_dpkg_profile_cfg(uint64_t req_dist_set,
struct dpkg_profile_cfg *kg_cfg);
diff --git a/drivers/net/dpaa2/mc/dpni.c b/drivers/net/dpaa2/mc/dpni.c
index f651f29b02..a1f168dd04 100644
--- a/drivers/net/dpaa2/mc/dpni.c
+++ b/drivers/net/dpaa2/mc/dpni.c
@@ -3493,6 +3493,7 @@ int dpni_sp_enable(struct fsl_mc_io *mc_io, uint32_t cmd_flags, uint16_t token,
/* send command to MC */
return mc_send_command(mc_io, &cmd);
}
+
/**
* dpni_get_mac_statistics() - Get statistics on the connected DPMAC objects
* @mc_io: Pointer to opaque I/O object
@@ -3520,3 +3521,23 @@ int dpni_get_mac_statistics(struct fsl_mc_io *mc_io, uint32_t cmd_flags, uint16_
return mc_send_command(mc_io, &cmd);
}
+
+int dpni_get_mac_speed_capability(struct fsl_mc_io *mc_io, uint32_t cmd_flags, uint16_t token,
+ uint32_t *speed_cap)
+{
+ struct dpni_rsp_mac_speed_cap *rsp_params;
+ struct mc_command cmd = { 0 };
+ int err;
+
+ cmd.header = mc_encode_cmd_header(DPNI_CMDID_GET_MAC_SPEED_CAPABILITY,
+ cmd_flags, token);
+
+ err = mc_send_command(mc_io, &cmd);
+ if (err)
+ return err;
+
+ rsp_params = (struct dpni_rsp_mac_speed_cap *)cmd.params;
+ *speed_cap = le32_to_cpu(rsp_params->speed_cap);
+
+ return 0;
+}
diff --git a/drivers/net/dpaa2/mc/fsl_dpmac.h b/drivers/net/dpaa2/mc/fsl_dpmac.h
index 13b5a94b8c..ed73939ec0 100644
--- a/drivers/net/dpaa2/mc/fsl_dpmac.h
+++ b/drivers/net/dpaa2/mc/fsl_dpmac.h
@@ -92,6 +92,21 @@ enum dpmac_eth_if {
DPMAC_ETH_IF_1000BASEX,
DPMAC_ETH_IF_USXGMII,
};
+
+enum dpmac_link_speed {
+ DPMAC_LINK_SPEED_10M = 0,
+ DPMAC_LINK_SPEED_100M,
+ DPMAC_LINK_SPEED_1G,
+ DPMAC_LINK_SPEED_2_5G,
+ DPMAC_LINK_SPEED_5G,
+ DPMAC_LINK_SPEED_10G,
+ DPMAC_LINK_SPEED_25G,
+ DPMAC_LINK_SPEED_40G,
+ DPMAC_LINK_SPEED_50G,
+ DPMAC_LINK_SPEED_100G,
+ DPMAC_LINK_SPEED_MAX,
+};
+
/*
* @DPMAC_FEC_NONE: RS-FEC (enabled by default) is disabled
* @DPMAC_FEC_RS: RS-FEC (Clause 91) mode configured
diff --git a/drivers/net/dpaa2/mc/fsl_dpni.h b/drivers/net/dpaa2/mc/fsl_dpni.h
index 2f8125314c..8d28b8ce76 100644
--- a/drivers/net/dpaa2/mc/fsl_dpni.h
+++ b/drivers/net/dpaa2/mc/fsl_dpni.h
@@ -1,7 +1,7 @@
/* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0)
*
* Copyright 2013-2016 Freescale Semiconductor Inc.
- * Copyright 2016-2023 NXP
+ * Copyright 2016-2025 NXP
*
*/
#ifndef __FSL_DPNI_H
@@ -2017,4 +2017,7 @@ int dpni_sp_enable(struct fsl_mc_io *mc_io, uint32_t cmd_flags, uint16_t token,
int dpni_get_mac_statistics(struct fsl_mc_io *mc_io, uint32_t cmd_flags, uint16_t token,
uint64_t iova_cnt, uint64_t iova_values, uint32_t num_cnt);
+int dpni_get_mac_speed_capability(struct fsl_mc_io *mc_io, uint32_t cmd_flags, uint16_t token,
+ uint32_t *speed_cap);
+
#endif /* __FSL_DPNI_H */
diff --git a/drivers/net/dpaa2/mc/fsl_dpni_cmd.h b/drivers/net/dpaa2/mc/fsl_dpni_cmd.h
index f653f2c0e4..cf4558d540 100644
--- a/drivers/net/dpaa2/mc/fsl_dpni_cmd.h
+++ b/drivers/net/dpaa2/mc/fsl_dpni_cmd.h
@@ -132,6 +132,7 @@
#define DPNI_CMDID_SET_QUEUE_TX_CONFIRMATION_MODE DPNI_CMD(0x281)
#define DPNI_CMDID_GET_QUEUE_TX_CONFIRMATION_MODE DPNI_CMD(0x282)
#define DPNI_CMDID_GET_MAC_STATISTICS DPNI_CMD(0x283)
+#define DPNI_CMDID_GET_MAC_SPEED_CAPABILITY DPNI_CMD(0x284)
/* Macros for accessing command fields smaller than 1byte */
#define DPNI_MASK(field) \
@@ -1031,5 +1032,8 @@ struct dpni_cmd_get_mac_statistics {
uint32_t num_cnt;
};
+struct dpni_rsp_mac_speed_cap {
+ uint32_t speed_cap;
+};
#pragma pack(pop)
#endif /* _FSL_DPNI_CMD_H */
--
2.25.1
^ permalink raw reply [flat|nested] 24+ messages in thread* [PATCH v2 11/11] net/dpaa2: enable software taildrop for ordered queues
2025-06-02 10:40 ` [PATCH v2 00/11] NXP DPAA2 driver enhancements and fixes Gagandeep Singh
` (9 preceding siblings ...)
2025-06-02 10:40 ` [PATCH v2 10/11] net/dpaa2: setup the speed cap based on the actual MAC Gagandeep Singh
@ 2025-06-02 10:40 ` Gagandeep Singh
10 siblings, 0 replies; 24+ messages in thread
From: Gagandeep Singh @ 2025-06-02 10:40 UTC (permalink / raw)
To: dev, Hemant Agrawal, Sachin Saxena
This patch adds support for software taildrop on ordered queues
in the DPAA2 driver.
It also enables congestion notification by default on
traffic management (TM) queues, which is a prerequisite for
software taildrop functionality.
Signed-off-by: Gagandeep Singh <g.singh@nxp.com>
---
drivers/net/dpaa2/dpaa2_rxtx.c | 24 +++++++++++++-
drivers/net/dpaa2/dpaa2_tm.c | 60 ++++++++++++++++------------------
2 files changed, 52 insertions(+), 32 deletions(-)
diff --git a/drivers/net/dpaa2/dpaa2_rxtx.c b/drivers/net/dpaa2/dpaa2_rxtx.c
index 67d065bb7c..dce1da80bb 100644
--- a/drivers/net/dpaa2/dpaa2_rxtx.c
+++ b/drivers/net/dpaa2/dpaa2_rxtx.c
@@ -1800,8 +1800,11 @@ dpaa2_dev_tx_ordered(void *queue, struct rte_mbuf **bufs, uint16_t nb_pkts)
while (qbman_result_SCN_state(dpaa2_q->cscn)) {
retry_count++;
/* Retry for some time before giving up */
- if (retry_count > CONG_RETRY_COUNT)
+ if (retry_count > CONG_RETRY_COUNT) {
+ if (dpaa2_q->tm_sw_td)
+ goto sw_td;
goto skip_tx;
+ }
}
frames_to_send = (nb_pkts > dpaa2_eqcr_size) ?
@@ -1961,6 +1964,25 @@ dpaa2_dev_tx_ordered(void *queue, struct rte_mbuf **bufs, uint16_t nb_pkts)
rte_pktmbuf_free_seg(buf_to_free[loop].seg);
}
+ return num_tx;
+sw_td:
+ loop = 0;
+ while (loop < num_tx) {
+ if (unlikely(RTE_MBUF_HAS_EXTBUF(*bufs)))
+ rte_pktmbuf_free(*bufs);
+ bufs++;
+ loop++;
+ }
+
+ /* free the pending buffers */
+ while (nb_pkts) {
+ rte_pktmbuf_free(*bufs);
+ bufs++;
+ nb_pkts--;
+ num_tx++;
+ }
+ dpaa2_q->tx_pkts += num_tx;
+
return num_tx;
}
diff --git a/drivers/net/dpaa2/dpaa2_tm.c b/drivers/net/dpaa2/dpaa2_tm.c
index dbf66c756e..36e815c356 100644
--- a/drivers/net/dpaa2/dpaa2_tm.c
+++ b/drivers/net/dpaa2/dpaa2_tm.c
@@ -611,41 +611,39 @@ dpaa2_tm_configure_queue(struct rte_eth_dev *dev, struct dpaa2_tm_node *node)
}
dpaa2_q->fqid = qid.fqid;
- /* setting congestion notification */
- if (!(priv->flags & DPAA2_TX_CGR_OFF)) {
- struct dpni_congestion_notification_cfg cong_notif_cfg = {0};
-
- cong_notif_cfg.units = DPNI_CONGESTION_UNIT_FRAMES;
- cong_notif_cfg.threshold_entry = dpaa2_q->nb_desc;
- /* Notify that the queue is not congested when the data in
- * the queue is below this thershold.(90% of value)
- */
- cong_notif_cfg.threshold_exit = (dpaa2_q->nb_desc * 9) / 10;
- cong_notif_cfg.message_ctx = 0;
- iova = DPAA2_VADDR_TO_IOVA_AND_CHECK(dpaa2_q->cscn,
- sizeof(struct qbman_result));
- if (iova == RTE_BAD_IOVA) {
- DPAA2_PMD_ERR("No IOMMU map for cscn(%p)", dpaa2_q->cscn);
- return -ENOBUFS;
- }
- cong_notif_cfg.message_iova = iova;
- cong_notif_cfg.dest_cfg.dest_type = DPNI_DEST_NONE;
- cong_notif_cfg.notification_mode =
+ /* setting taildrop through congestion notification */
+ struct dpni_congestion_notification_cfg cong_notif_cfg = {0};
+
+ cong_notif_cfg.units = DPNI_CONGESTION_UNIT_FRAMES;
+ cong_notif_cfg.threshold_entry = dpaa2_q->nb_desc;
+ /* Notify that the queue is not congested when the data in
+ * the queue is below this thershold.(90% of value)
+ */
+ cong_notif_cfg.threshold_exit = (dpaa2_q->nb_desc * 9) / 10;
+ cong_notif_cfg.message_ctx = 0;
+
+ iova = DPAA2_VADDR_TO_IOVA_AND_CHECK(dpaa2_q->cscn,
+ sizeof(struct qbman_result));
+ if (iova == RTE_BAD_IOVA) {
+ DPAA2_PMD_ERR("No IOMMU map for cscn(%p)", dpaa2_q->cscn);
+ return -ENOBUFS;
+ }
+ cong_notif_cfg.message_iova = iova;
+ cong_notif_cfg.dest_cfg.dest_type = DPNI_DEST_NONE;
+ cong_notif_cfg.notification_mode =
DPNI_CONG_OPT_WRITE_MEM_ON_ENTER |
DPNI_CONG_OPT_WRITE_MEM_ON_EXIT |
DPNI_CONG_OPT_COHERENT_WRITE;
- cong_notif_cfg.cg_point = DPNI_CP_QUEUE;
+ cong_notif_cfg.cg_point = DPNI_CP_QUEUE;
- ret = dpni_set_congestion_notification(dpni, CMD_PRI_LOW,
- priv->token,
- DPNI_QUEUE_TX,
- ((node->parent->channel_id << 8) | tc_id),
- &cong_notif_cfg);
- if (ret) {
- DPAA2_PMD_ERR("Error in setting tx congestion notification: "
- "err=%d", ret);
- return -ret;
- }
+ ret = dpni_set_congestion_notification(dpni, CMD_PRI_LOW,
+ priv->token, DPNI_QUEUE_TX,
+ ((node->parent->channel_id << 8) | tc_id),
+ &cong_notif_cfg);
+ if (ret) {
+ DPAA2_PMD_ERR("Error in setting tx congestion notification: "
+ "err=%d", ret);
+ return -ret;
}
dpaa2_q->tm_sw_td = true;
--
2.25.1
^ permalink raw reply [flat|nested] 24+ messages in thread