[PATCH] event/cnxk: add event vector adapter support

[PATCH] event/cnxk: add event vector adapter support

[pbhagavatula]

From: Pavan Nikhilesh <pbhagavatula@marvell.com>

Add event vector adapter support to CN20K event device.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
---
 drivers/common/cnxk/roc_sso.c          |   4 +-
 drivers/common/cnxk/roc_sso.h          |   2 +-
 drivers/event/cnxk/cn20k_eventdev.c    |   4 +
 drivers/event/cnxk/cnxk_vector_adptr.c | 144 +++++++++++++++++++++++++
 drivers/event/cnxk/cnxk_vector_adptr.h |  22 ++++
 5 files changed, 174 insertions(+), 2 deletions(-)
 create mode 100644 drivers/event/cnxk/cnxk_vector_adptr.c
 create mode 100644 drivers/event/cnxk/cnxk_vector_adptr.h

diff --git a/drivers/common/cnxk/roc_sso.c b/drivers/common/cnxk/roc_sso.c
index 4996329018fb..1d82e5b9782c 100644
--- a/drivers/common/cnxk/roc_sso.c
+++ b/drivers/common/cnxk/roc_sso.c
@@ -514,7 +514,8 @@ sso_agq_op_wait(struct roc_sso *roc_sso, uint16_t hwgrp)
 }
 
 int
-roc_sso_hwgrp_agq_alloc(struct roc_sso *roc_sso, uint16_t hwgrp, struct roc_sso_agq_data *data)
+roc_sso_hwgrp_agq_alloc(struct roc_sso *roc_sso, uint16_t hwgrp, struct roc_sso_agq_data *data,
+			uint32_t *agq_id)
 {
 	struct sso *sso = roc_sso_to_sso_priv(roc_sso);
 	struct sso_aggr_setconfig *req;
@@ -621,6 +622,7 @@ roc_sso_hwgrp_agq_alloc(struct roc_sso *roc_sso, uint16_t hwgrp, struct roc_sso_
 
 	plt_wmb();
 	sso->agg_used[hwgrp]++;
+	*agq_id = off;
 
 	return 0;
 }
diff --git a/drivers/common/cnxk/roc_sso.h b/drivers/common/cnxk/roc_sso.h
index f73128087a53..f1ad34bcc745 100644
--- a/drivers/common/cnxk/roc_sso.h
+++ b/drivers/common/cnxk/roc_sso.h
@@ -112,7 +112,7 @@ int __roc_api roc_sso_hwgrp_stash_config(struct roc_sso *roc_sso,
 void __roc_api roc_sso_hws_gwc_invalidate(struct roc_sso *roc_sso, uint8_t *hws,
 					  uint8_t nb_hws);
 int __roc_api roc_sso_hwgrp_agq_alloc(struct roc_sso *roc_sso, uint16_t hwgrp,
-				      struct roc_sso_agq_data *data);
+				      struct roc_sso_agq_data *data, uint32_t *agq_id);
 void __roc_api roc_sso_hwgrp_agq_free(struct roc_sso *roc_sso, uint16_t hwgrp, uint32_t agq_id);
 void __roc_api roc_sso_hwgrp_agq_release(struct roc_sso *roc_sso, uint16_t hwgrp);
 uint32_t __roc_api roc_sso_hwgrp_agq_from_tag(struct roc_sso *roc_sso, uint16_t hwgrp, uint32_t tag,
diff --git a/drivers/event/cnxk/cn20k_eventdev.c b/drivers/event/cnxk/cn20k_eventdev.c
index 0688cf97e5d6..302783380730 100644
--- a/drivers/event/cnxk/cn20k_eventdev.c
+++ b/drivers/event/cnxk/cn20k_eventdev.c
@@ -10,6 +10,7 @@
 #include "cn20k_worker.h"
 #include "cnxk_common.h"
 #include "cnxk_eventdev.h"
+#include "cnxk_vector_adptr.h"
 #include "cnxk_worker.h"
 
 #define CN20K_SET_EVDEV_DEQ_OP(dev, deq_op, deq_ops)                                               \
@@ -1081,6 +1082,9 @@ static struct eventdev_ops cn20k_sso_dev_ops = {
 
 	.timer_adapter_caps_get = cn20k_tim_caps_get,
 
+	.vector_adapter_caps_get = cnxk_vector_caps_get,
+	.vector_adapter_info_get = cnxk_vector_info_get,
+
 	.xstats_get = cnxk_sso_xstats_get,
 	.xstats_reset = cnxk_sso_xstats_reset,
 	.xstats_get_names = cnxk_sso_xstats_get_names,
diff --git a/drivers/event/cnxk/cnxk_vector_adptr.c b/drivers/event/cnxk/cnxk_vector_adptr.c
new file mode 100644
index 000000000000..5cfbf34674cf
--- /dev/null
+++ b/drivers/event/cnxk/cnxk_vector_adptr.c
@@ -0,0 +1,144 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(C) 2025 Marvell.
+ */
+#include <event_vector_adapter_pmd.h>
+#include <eventdev_pmd.h>
+
+#include "roc_api.h"
+
+#include "cnxk_eventdev.h"
+#include "cnxk_vector_adptr.h"
+#include "cnxk_worker.h"
+
+static int
+cnxk_sso_vector_adapter_create(struct rte_event_vector_adapter *adapter)
+{
+	struct rte_event_vector_adapter_conf *conf;
+	struct cnxk_event_vector_adapter *adptr;
+	uint32_t agq, tag_mask, stag_mask;
+	struct roc_sso_agq_data data;
+	struct cnxk_sso_evdev *dev;
+	uint8_t queue_id, tt;
+	int rc;
+
+	adptr = rte_zmalloc("cnxk_event_vector_adapter", sizeof(struct cnxk_event_vector_adapter),
+			    RTE_CACHE_LINE_SIZE);
+	if (adptr == NULL) {
+		plt_err("Failed to allocate memory for vector adapter");
+		return -ENOMEM;
+	}
+
+	conf = &adapter->data->conf;
+
+	queue_id = adapter->data->conf.ev.queue_id;
+	dev = cnxk_sso_pmd_priv(&rte_eventdevs[conf->event_dev_id]);
+	adapter->data->adapter_priv = adptr;
+
+	tag_mask = conf->ev.event & 0xFFFFFFFF;
+	stag_mask = (conf->ev_fallback.event & 0xFFFFFFFF) >> 20;
+
+	memset(&data, 0, sizeof(struct roc_sso_agq_data));
+	data.tag = tag_mask;
+	data.tt = conf->ev.sched_type;
+	data.stag = stag_mask;
+	data.vwqe_aura = roc_npa_aura_handle_to_aura(conf->vector_mp->pool_id);
+	data.vwqe_max_sz_exp = rte_log2_u32(conf->vector_sz);
+	data.vwqe_wait_tmo = conf->vector_timeout_ns / ((SSO_AGGR_DEF_TMO + 1) * 100);
+	data.xqe_type = 0;
+
+	agq = UINT32_MAX;
+	rc = roc_sso_hwgrp_agq_alloc(&dev->sso, queue_id, &data, &agq);
+	if (rc < 0 || agq == UINT32_MAX) {
+		plt_err("Failed to allocate aggregation queue for queue_id=%d", queue_id);
+		adapter->data->adapter_priv = NULL;
+		rte_free(adptr);
+		return rc;
+	}
+
+	adptr->agq = agq;
+	adptr->tt = conf->ev.sched_type;
+	adptr->base = roc_sso_hwgrp_base_get(&dev->sso, queue_id);
+
+	return 0;
+}
+
+static int
+cnxk_sso_vector_adapter_destroy(struct rte_event_vector_adapter *adapter)
+{
+	struct cnxk_event_vector_adapter *adptr;
+	struct cnxk_sso_evdev *dev;
+	uint16_t queue_id;
+
+	if (adapter == NULL || adapter->data == NULL)
+		return -EINVAL;
+
+	adptr = adapter->data->adapter_priv;
+	if (adptr == NULL)
+		return -EINVAL;
+
+	queue_id = adapter->data->conf.ev.queue_id;
+	dev = cnxk_sso_pmd_priv(&rte_eventdevs[adapter->data->conf.event_dev_id]);
+
+	roc_sso_hwgrp_agq_free(&dev->sso, queue_id, adptr->agq);
+	rte_free(adptr);
+	adapter->data->adapter_priv = NULL;
+
+	return 0;
+}
+
+static int
+cnxk_sso_vector_adapter_enqueue(struct rte_event_vector_adapter *adapter, uint64_t objs[],
+				uint16_t num_elem, uint64_t flags)
+{
+	struct cnxk_event_vector_adapter *adptr;
+	uint16_t n = num_elem;
+	uint64_t add_work0;
+
+	plt_wmb();
+
+	add_work0 = adptr->agq | ((uint64_t)(adptr->tt) << 32);
+	roc_store_pair(add_work0 | (!!(flags & RTE_EVENT_VECTOR_ENQ_SOV) << 34), objs[num_elem - n],
+		       adptr->base);
+	while (--n > 1)
+		roc_store_pair(add_work0, objs[num_elem - n], adptr->base);
+	if (n)
+		roc_store_pair(add_work0 | (!!(flags & RTE_EVENT_VECTOR_ENQ_EOV) << 35),
+			       objs[num_elem - n], adptr->base);
+
+	return num_elem;
+}
+
+static struct event_vector_adapter_ops ops = {
+	.create = cnxk_sso_vector_adapter_create,
+	.destroy = cnxk_sso_vector_adapter_destroy,
+	.enqueue = cnxk_sso_vector_adapter_enqueue,
+};
+
+int
+cnxk_vector_caps_get(const struct rte_eventdev *evdev, uint32_t *caps,
+		     const struct event_vector_adapter_ops **ops)
+{
+	RTE_SET_USED(evdev);
+
+	*caps = RTE_EVENT_VECTOR_ADAPTER_CAP_INTERNAL_PORT;
+	*ops = &ops;
+
+	return 0;
+}
+
+int
+cnxk_vector_info_get(const struct rte_eventdev *evdev, struct rte_event_vector_adapter_info *info)
+{
+	if (info == NULL)
+		return -EINVAL;
+
+	info->max_vector_adapters_per_event_queue =
+		SSO_AGGR_MAX_CTX > UINT8_MAX ? UINT8_MAX : SSO_AGGR_MAX_CTX;
+	info->log2_sz = true;
+	info->min_vector_sz = RTE_BIT32(ROC_NIX_VWQE_MIN_SIZE_LOG2);
+	info->max_vector_sz = RTE_BIT32(ROC_NIX_VWQE_MAX_SIZE_LOG2);
+	info->min_vector_timeout_ns = (SSO_AGGR_DEF_TMO + 1) * 100;
+	info->max_vector_timeout_ns = (BITMASK_ULL(11, 0) + 1) * info->min_vector_timeout_ns;
+
+	info->log2_sz = true;
+}
diff --git a/drivers/event/cnxk/cnxk_vector_adptr.h b/drivers/event/cnxk/cnxk_vector_adptr.h
new file mode 100644
index 000000000000..f60b0f4edd89
--- /dev/null
+++ b/drivers/event/cnxk/cnxk_vector_adptr.h
@@ -0,0 +1,22 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(C) 2025 Marvell.
+ */
+
+#ifndef __CNXK_VECTOR_ADPTR_H__
+#define __CNXK_VECTOR_ADPTR_H__
+
+#include <rte_event_vector_adapter.h>
+#include <rte_eventdev.h>
+
+struct cnxk_event_vector_adapter {
+	uint8_t tt;
+	uint32_t agq;  /**< Aggregation queue ID */
+	uint64_t base; /**< Base address of the adapter */
+};
+
+int cnxk_vector_caps_get(const struct rte_eventdev *evdev, uint32_t *caps,
+			 const struct event_vector_adapter_ops **ops);
+int cnxk_vector_info_get(const struct rte_eventdev *evdev,
+			 struct rte_event_vector_adapter_info *info);
+
+#endif /* __CNXK_VECTOR_ADPTR_H__ */
-- 
2.39.5 (Apple Git-154)