From: Dariusz Sosnowski <dsosnowski@nvidia.com>
To: Viacheslav Ovsiienko <viacheslavo@nvidia.com>,
Bing Zhao <bingz@nvidia.com>, Ori Kam <orika@nvidia.com>,
Suanming Mou <suanmingm@nvidia.com>,
Matan Azrad <matan@nvidia.com>,
Michael Baum <michaelba@nvidia.com>
Cc: <dev@dpdk.org>, <stable@dpdk.org>, Raslan Darawsheh <rasland@nvidia.com>
Subject: [PATCH v2] net/mlx5: fix indirect age action handling
Date: Tue, 19 Aug 2025 13:27:42 +0200 [thread overview]
Message-ID: <20250819112742.1068903-1-dsosnowski@nvidia.com> (raw)
In-Reply-To: <net/mlx5: fix indirect age action handling>
Indirect AGE flow actions can be created either through synchronous
or asynchronous flow API.
mlx5 PMD stores the queue used to create that action to support
strict queueing. When action is created through synchronous API
invalid queue index is stored instead.
Whenever a flow rule is created with indirect AGE and
direct COUNT flow actions, PMD allocates a HW counter for ageing
that flow rule during rule creation.
During allocation of the counter a queue index is needed
to select a proper counter pool cache.
In case when indirect AGE action created through synchronous API
was used in that case, the associated queue index was used
to select pool cache. Since queue index was invalid, PMD crashed.
Counter can be allocated using the index of currently used queue and
it does not have to match the queue used to create AGE action.
This patch fixes the crash by using the index of currently used queue
for counter allocation.
This patch also adds missing validation for synchronous
and asynchronous AGE flow action creation:
- If strict queueing is disabled, only synchronous creation is allowed.
- If strict queueing is enabled, only asynchronous creation is allowed.
PMD documentation is updated accordingly.
It also updates validation of synchronous query
of aged flow rules in regards to strict queueing.
When strict queueing is enabled, synchronous query is rejected.
This aligns PMD behavior with API description.
Fixes: 04a4de756e14 ("net/mlx5: support flow age action with HWS")
Cc: michaelba@nvidia.com
Cc: stable@dpdk.org
Signed-off-by: Dariusz Sosnowski <dsosnowski@nvidia.com>
Acked-by: Bing Zhao <bingz@nvidia.com>
Acked-by: Raslan Darawsheh <rasland@nvidia.com>
---
v2:
- Rebased on latest commit in next-net-mlx-main -
031f4aad9ea6 ("net/mlx5: fix panic for non template age rules flush")
- Added validation of rte_flow_get_aged_flows() to match API docs -
reject when strict queueing is enabled.
doc/guides/nics/mlx5.rst | 4 ++++
drivers/net/mlx5/mlx5_flow_hw.c | 24 +++++++++++++++++-------
2 files changed, 21 insertions(+), 7 deletions(-)
diff --git a/doc/guides/nics/mlx5.rst b/doc/guides/nics/mlx5.rst
index 20cfbe3a9a..b5f71cf84f 100644
--- a/doc/guides/nics/mlx5.rst
+++ b/doc/guides/nics/mlx5.rst
@@ -2740,6 +2740,10 @@ With :ref:`HW steering <mlx5_hws>`,
in addition to flow rules using only age (without count action).
- ``nb_aging_objects`` is the number of flow rules containing age action.
+#. With strict queueing enabled (when ``RTE_FLOW_PORT_FLAG_STRICT_QUEUE`` flag is passed
+ to ``rte_flow_configure()``), indirect age actions can be created
+ only through asynchronous flow API.
+
.. _mlx5_quota:
diff --git a/drivers/net/mlx5/mlx5_flow_hw.c b/drivers/net/mlx5/mlx5_flow_hw.c
index 3da8d93454..782f7982aa 100644
--- a/drivers/net/mlx5/mlx5_flow_hw.c
+++ b/drivers/net/mlx5/mlx5_flow_hw.c
@@ -3180,6 +3180,7 @@ flow_hw_shared_action_construct(struct rte_eth_dev *dev, uint32_t queue,
uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
uint32_t idx = act_idx &
((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
+ uint32_t *cnt_queue;
cnt_id_t age_cnt;
memset(&act_data, 0, sizeof(act_data));
@@ -3230,9 +3231,8 @@ flow_hw_shared_action_construct(struct rte_eth_dev *dev, uint32_t queue,
if (param == NULL)
return -1;
if (action_flags & MLX5_FLOW_ACTION_COUNT) {
- if (mlx5_hws_cnt_pool_get(priv->hws_cpool,
- ¶m->queue_id, &age_cnt,
- idx) < 0)
+ cnt_queue = mlx5_hws_cnt_get_queue(priv, &queue);
+ if (mlx5_hws_cnt_pool_get(priv->hws_cpool, cnt_queue, &age_cnt, idx) < 0)
return -1;
flow->flags |= MLX5_FLOW_HW_FLOW_FLAG_CNT_ID;
flow->cnt_id = age_cnt;
@@ -13136,6 +13136,14 @@ flow_hw_action_create(struct rte_eth_dev *dev,
const struct rte_flow_action *action,
struct rte_flow_error *err)
{
+ struct mlx5_priv *priv = dev->data->dev_private;
+
+ if (action->type == RTE_FLOW_ACTION_TYPE_AGE && priv->hws_strict_queue) {
+ rte_flow_error_set(err, EINVAL, RTE_FLOW_ERROR_TYPE_STATE, NULL,
+ "Cannot create age action synchronously with strict queueing");
+ return NULL;
+ }
+
return flow_hw_action_handle_create(dev, MLX5_HW_INV_QUEUE,
NULL, conf, action, NULL, err);
}
@@ -13355,6 +13363,8 @@ flow_hw_get_q_aged_flows(struct rte_eth_dev *dev, uint32_t queue_id,
RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
NULL, "No aging initialized");
if (priv->hws_strict_queue) {
+ /* Queue is invalid in sync query. Sync query and strict queueing is disallowed. */
+ MLX5_ASSERT(queue_id != MLX5_HW_INV_QUEUE);
if (queue_id >= age_info->hw_q_age->nb_rings)
return rte_flow_error_set(error, EINVAL,
RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
@@ -13408,10 +13418,10 @@ flow_hw_get_aged_flows(struct rte_eth_dev *dev, void **contexts,
struct mlx5_priv *priv = dev->data->dev_private;
if (priv->hws_strict_queue)
- DRV_LOG(WARNING,
- "port %u get aged flows called in strict queue mode.",
- dev->data->port_id);
- return flow_hw_get_q_aged_flows(dev, 0, contexts, nb_contexts, error);
+ return rte_flow_error_set(error, EINVAL, RTE_FLOW_ERROR_TYPE_STATE, NULL,
+ "Cannot get aged flows synchronously with strict queueing");
+
+ return flow_hw_get_q_aged_flows(dev, MLX5_HW_INV_QUEUE, contexts, nb_contexts, error);
}
/**
* Initialization function for non template API which calls
--
2.39.5
parent reply other threads:[~2025-08-19 11:29 UTC|newest]
Thread overview: expand[flat|nested] mbox.gz Atom feed
[parent not found: <net/mlx5: fix indirect age action handling>]
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