From: Tejasree Kondoj <ktejasree@marvell.com>
To: Akhil Goyal <gakhil@marvell.com>
Cc: Sucharitha Sarananaga <ssarananaga@marvell.com>,
Anoob Joseph <anoobj@marvell.com>,
Aakash Sasidharan <asasidharan@marvell.com>,
"Nithinsen Kaithakadan" <nkaithakadan@marvell.com>,
Rupesh Chiluka <rchiluka@marvell.com>,
Vidya Sagar Velumuri <vvelumuri@marvell.com>, <dev@dpdk.org>
Subject: [PATCH v2 4/8] crypto/cnxk: add new API to get EC grp tbl address
Date: Thu, 21 Aug 2025 11:43:37 +0530 [thread overview]
Message-ID: <20250821061341.3790775-5-ktejasree@marvell.com> (raw)
In-Reply-To: <20250821061341.3790775-1-ktejasree@marvell.com>
From: Sucharitha Sarananaga <ssarananaga@marvell.com>
This patch introduces a new API to get AE EC group table
address and added static_assert checks to ensure that each
enum value in roc_ae_ec_id matches its expected constant.
This helps catch accidental changes or reordering of enum
values at compile time.
Signed-off-by: Sucharitha Sarananaga <ssarananaga@marvell.com>
---
drivers/crypto/cnxk/cnxk_cryptodev_ops.c | 47 ++++++++++++++
drivers/crypto/cnxk/rte_pmd_cnxk_crypto.h | 78 +++++++++++++++++++++++
2 files changed, 125 insertions(+)
diff --git a/drivers/crypto/cnxk/cnxk_cryptodev_ops.c b/drivers/crypto/cnxk/cnxk_cryptodev_ops.c
index 97c12c6087..8bc7b2c345 100644
--- a/drivers/crypto/cnxk/cnxk_cryptodev_ops.c
+++ b/drivers/crypto/cnxk/cnxk_cryptodev_ops.c
@@ -43,6 +43,29 @@
#define CNXK_CPT_MAX_ASYM_OP_MOD_LEN 1024
#define CNXK_CPT_META_BUF_MAX_CACHE_SIZE 128
+static_assert((uint16_t)RTE_PMD_CNXK_AE_EC_ID_P192 == (uint16_t)ROC_AE_EC_ID_P192,
+ "Enum value mismatch");
+static_assert((uint16_t)RTE_PMD_CNXK_AE_EC_ID_P224 == (uint16_t)ROC_AE_EC_ID_P224,
+ "Enum value mismatch");
+static_assert((uint16_t)RTE_PMD_CNXK_AE_EC_ID_P256 == (uint16_t)ROC_AE_EC_ID_P256,
+ "Enum value mismatch");
+static_assert((uint16_t)RTE_PMD_CNXK_AE_EC_ID_P384 == (uint16_t)ROC_AE_EC_ID_P384,
+ "Enum value mismatch");
+static_assert((uint16_t)RTE_PMD_CNXK_AE_EC_ID_P521 == (uint16_t)ROC_AE_EC_ID_P521,
+ "Enum value mismatch");
+static_assert((uint16_t)RTE_PMD_CNXK_AE_EC_ID_P160 == (uint16_t)ROC_AE_EC_ID_P160,
+ "Enum value mismatch");
+static_assert((uint16_t)RTE_PMD_CNXK_AE_EC_ID_P320 == (uint16_t)ROC_AE_EC_ID_P320,
+ "Enum value mismatch");
+static_assert((uint16_t)RTE_PMD_CNXK_AE_EC_ID_P512 == (uint16_t)ROC_AE_EC_ID_P512,
+ "Enum value mismatch");
+static_assert((uint16_t)RTE_PMD_CNXK_AE_EC_ID_SM2 == (uint16_t)ROC_AE_EC_ID_SM2,
+ "Enum value mismatch");
+static_assert((uint16_t)RTE_PMD_CNXK_AE_EC_ID_ED25519 == (uint16_t)ROC_AE_EC_ID_ED25519,
+ "Enum value mismatch");
+static_assert((uint16_t)RTE_PMD_CNXK_AE_EC_ID_ED448 == (uint16_t)ROC_AE_EC_ID_ED448,
+ "Enum value mismatch");
+
static int
cnxk_cpt_get_mlen(void)
{
@@ -1018,6 +1041,30 @@ rte_pmd_cnxk_ae_fpm_table_get(uint8_t dev_id)
return vf->cnxk_fpm_iova;
}
+RTE_EXPORT_EXPERIMENTAL_SYMBOL(rte_pmd_cnxk_ae_ec_grp_table_get, 25.07)
+const struct rte_pmd_cnxk_crypto_ae_ec_group_params **
+rte_pmd_cnxk_ae_ec_grp_table_get(uint8_t dev_id, uint16_t *nb_max_entries)
+{
+ struct rte_cryptodev *dev;
+ struct cnxk_cpt_vf *vf;
+
+ dev = rte_cryptodev_pmd_get_dev(dev_id);
+ if (dev == NULL) {
+ plt_err("Invalid dev_id %u", dev_id);
+ return NULL;
+ }
+
+ vf = dev->data->dev_private;
+ if (vf == NULL) {
+ plt_err("VF is not initialized");
+ return NULL;
+ }
+
+ *nb_max_entries = ROC_AE_EC_ID_PMAX;
+
+ return (const struct rte_pmd_cnxk_crypto_ae_ec_group_params **)(void *)vf->ec_grp;
+}
+
static inline void
cnxk_crypto_cn10k_submit(struct rte_pmd_cnxk_crypto_qptr *qptr, void *inst, uint16_t nb_inst)
{
diff --git a/drivers/crypto/cnxk/rte_pmd_cnxk_crypto.h b/drivers/crypto/cnxk/rte_pmd_cnxk_crypto.h
index cd3ddc9dd1..3d43c77b8c 100644
--- a/drivers/crypto/cnxk/rte_pmd_cnxk_crypto.h
+++ b/drivers/crypto/cnxk/rte_pmd_cnxk_crypto.h
@@ -16,6 +16,26 @@
#include <rte_crypto.h>
#include <rte_security.h>
+#define AE_EC_DATA_MAX 66
+
+/**
+ * Enumerates supported elliptic curves
+ */
+typedef enum {
+ RTE_PMD_CNXK_AE_EC_ID_P192 = 0,
+ RTE_PMD_CNXK_AE_EC_ID_P224 = 1,
+ RTE_PMD_CNXK_AE_EC_ID_P256 = 2,
+ RTE_PMD_CNXK_AE_EC_ID_P384 = 3,
+ RTE_PMD_CNXK_AE_EC_ID_P521 = 4,
+ RTE_PMD_CNXK_AE_EC_ID_P160 = 5,
+ RTE_PMD_CNXK_AE_EC_ID_P320 = 6,
+ RTE_PMD_CNXK_AE_EC_ID_P512 = 7,
+ RTE_PMD_CNXK_AE_EC_ID_SM2 = 8,
+ RTE_PMD_CNXK_AE_EC_ID_ED25519 = 9,
+ RTE_PMD_CNXK_AE_EC_ID_ED448 = 10,
+ RTE_PMD_CNXK_AE_EC_ID_PMAX
+} rte_pmd_cnxk_ae_ec_id;
+
/* Forward declarations */
/**
@@ -72,6 +92,41 @@ struct rte_pmd_cnxk_crypto_sess {
};
};
+/**
+ * @brief AE EC (Elliptic Curve) group parameters structure.
+ *
+ * This structure holds the parameters for an elliptic curve group used in
+ * AE (Asymmetric Encryption) operations. It contains the prime, order,
+ * and curve constants (consta and constb), each represented as a byte array
+ * with an associated length. The maximum length is set to accommodate the
+ * largest supported curve (e.g., P521).
+ */
+struct rte_pmd_cnxk_crypto_ae_ec_group_params {
+ struct {
+ /* P521 maximum length */
+ uint8_t data[AE_EC_DATA_MAX];
+ unsigned int length;
+ } prime;
+
+ struct {
+ /* P521 maximum length */
+ uint8_t data[AE_EC_DATA_MAX];
+ unsigned int length;
+ } order;
+
+ struct {
+ /* P521 maximum length */
+ uint8_t data[AE_EC_DATA_MAX];
+ unsigned int length;
+ } consta;
+
+ struct {
+ /* P521 maximum length */
+ uint8_t data[AE_EC_DATA_MAX];
+ unsigned int length;
+ } constb;
+};
+
/**
* Get queue pointer of a specific queue in a cryptodev.
*
@@ -231,4 +286,27 @@ int rte_pmd_cnxk_crypto_qp_stats_get(struct rte_pmd_cnxk_crypto_qptr *qptr,
__rte_experimental
const uint64_t *rte_pmd_cnxk_ae_fpm_table_get(uint8_t dev_id);
+/**
+ * Retrieves the addresses of the AE EC group table.
+ *
+ * This API should be called only after the cryptodev device has been
+ * successfully configured. The returned pointer reference memory that is
+ * valid as long as the device remains configured and is not destroyed or
+ * reconfigured. If the device is reconfigured or destroyed, the memory
+ * referenced by the returned pointer becomes invalid and must not be used.
+ *
+ * @param dev_id
+ * Device identifier of cryptodev device.
+ * @param nb_max_entries
+ * Pointer to store the maximum number of entries in the EC group table.
+ * This value is set by the function to indicate how many entries can be
+ * retrieved from the table.
+ * @return
+ * - On success, pointer to the AE EC group table structure address.
+ * - NULL on error.
+ */
+__rte_experimental
+const struct rte_pmd_cnxk_crypto_ae_ec_group_params **
+rte_pmd_cnxk_ae_ec_grp_table_get(uint8_t dev_id, uint16_t *nb_max_entries);
+
#endif /* _PMD_CNXK_CRYPTO_H_ */
--
2.25.1
next prev parent reply other threads:[~2025-08-21 6:14 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-08-21 6:13 [PATCH v2 0/8] fixes and improvements to cnxk crypto PMD Tejasree Kondoj
2025-08-21 6:13 ` [PATCH v2 1/8] common/cnxk: get context ilen as devarg Tejasree Kondoj
2025-08-21 6:13 ` [PATCH v2 2/8] crypto/cnxk: fix compilation error and warnings Tejasree Kondoj
2025-08-21 6:13 ` [PATCH v2 3/8] crypto/cnxk: add new API to get fpm tbl address Tejasree Kondoj
2025-08-21 6:13 ` Tejasree Kondoj [this message]
2025-08-21 6:13 ` [PATCH v2 5/8] crypto/cnxk: align cptr to 256B in cn20k Tejasree Kondoj
2025-08-21 6:13 ` [PATCH v2 6/8] crypto/cnxk: refactor rsa verification Tejasree Kondoj
2025-08-21 6:13 ` [PATCH v2 7/8] crypto/cnxk: align PDCP API with latest firmware Tejasree Kondoj
2025-08-21 6:13 ` [PATCH v2 8/8] crypto/cnxk: support custom metadata with CN20K Tejasree Kondoj
2025-08-21 15:35 ` [PATCH v2 0/8] fixes and improvements to cnxk crypto PMD Stephen Hemminger
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20250821061341.3790775-5-ktejasree@marvell.com \
--to=ktejasree@marvell.com \
--cc=anoobj@marvell.com \
--cc=asasidharan@marvell.com \
--cc=dev@dpdk.org \
--cc=gakhil@marvell.com \
--cc=nkaithakadan@marvell.com \
--cc=rchiluka@marvell.com \
--cc=ssarananaga@marvell.com \
--cc=vvelumuri@marvell.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).