From: Nithin Dabilpuram <ndabilpuram@marvell.com>
To: Nithin Dabilpuram <ndabilpuram@marvell.com>,
Kiran Kumar K <kirankumark@marvell.com>,
Sunil Kumar Kori <skori@marvell.com>,
Satha Rao <skoteshwar@marvell.com>,
Harman Kalra <hkalra@marvell.com>
Cc: <jerinj@marvell.com>, <dev@dpdk.org>
Subject: [PATCH 01/19] common/cnxk: add new TM tree for SDP interface
Date: Mon, 1 Sep 2025 13:00:17 +0530 [thread overview]
Message-ID: <20250901073036.1381560-1-ndabilpuram@marvell.com> (raw)
From: Satha Rao <skoteshwar@marvell.com>
Create a new default tree for the SDP interface if more than one TX
queue is requested. This helps to backpressure each queue independently
when they are created with separate channels.
Signed-off-by: Satha Rao <skoteshwar@marvell.com>
---
drivers/common/cnxk/roc_nix.h | 2 +
drivers/common/cnxk/roc_nix_priv.h | 2 +
drivers/common/cnxk/roc_nix_tm.c | 158 ++++++++++++++++++
drivers/common/cnxk/roc_nix_tm_ops.c | 5 +-
drivers/common/cnxk/roc_nix_tm_utils.c | 2 +-
.../common/cnxk/roc_platform_base_symbols.c | 1 +
6 files changed, 168 insertions(+), 2 deletions(-)
diff --git a/drivers/common/cnxk/roc_nix.h b/drivers/common/cnxk/roc_nix.h
index a9cdc42617..a156d83200 100644
--- a/drivers/common/cnxk/roc_nix.h
+++ b/drivers/common/cnxk/roc_nix.h
@@ -596,6 +596,7 @@ enum roc_nix_tm_tree {
ROC_NIX_TM_DEFAULT = 0,
ROC_NIX_TM_RLIMIT,
ROC_NIX_TM_PFC,
+ ROC_NIX_TM_SDP,
ROC_NIX_TM_USER,
ROC_NIX_TM_TREE_MAX,
};
@@ -768,6 +769,7 @@ int __roc_api roc_nix_tm_lvl_cnt_get(struct roc_nix *roc_nix);
int __roc_api roc_nix_tm_lvl_have_link_access(struct roc_nix *roc_nix, int lvl);
int __roc_api roc_nix_tm_prepare_rate_limited_tree(struct roc_nix *roc_nix);
int __roc_api roc_nix_tm_pfc_prepare_tree(struct roc_nix *roc_nix);
+int __roc_api roc_nix_tm_sdp_prepare_tree(struct roc_nix *roc_nix);
bool __roc_api roc_nix_tm_is_user_hierarchy_enabled(struct roc_nix *nix);
int __roc_api roc_nix_tm_tree_type_get(struct roc_nix *nix);
int __roc_api roc_nix_tm_mark_config(struct roc_nix *roc_nix,
diff --git a/drivers/common/cnxk/roc_nix_priv.h b/drivers/common/cnxk/roc_nix_priv.h
index dc3450a3d4..d7ea3c6be2 100644
--- a/drivers/common/cnxk/roc_nix_priv.h
+++ b/drivers/common/cnxk/roc_nix_priv.h
@@ -387,6 +387,8 @@ nix_tm_tree2str(enum roc_nix_tm_tree tree)
return "Rate Limit Tree";
else if (tree == ROC_NIX_TM_PFC)
return "PFC Tree";
+ else if (tree == ROC_NIX_TM_SDP)
+ return "SDP Tree";
else if (tree == ROC_NIX_TM_USER)
return "User Tree";
return "???";
diff --git a/drivers/common/cnxk/roc_nix_tm.c b/drivers/common/cnxk/roc_nix_tm.c
index abfe80978b..2771fd8fc4 100644
--- a/drivers/common/cnxk/roc_nix_tm.c
+++ b/drivers/common/cnxk/roc_nix_tm.c
@@ -1890,6 +1890,164 @@ roc_nix_tm_pfc_prepare_tree(struct roc_nix *roc_nix)
return rc;
}
+int
+roc_nix_tm_sdp_prepare_tree(struct roc_nix *roc_nix)
+{
+ struct nix *nix = roc_nix_to_nix_priv(roc_nix);
+ uint32_t nonleaf_id = nix->nb_tx_queues;
+ uint32_t tl2_node_id, tl3_node_id;
+ uint8_t leaf_lvl, lvl, lvl_start;
+ struct nix_tm_node *node = NULL;
+ uint32_t parent, i;
+ int rc = -ENOMEM;
+
+ parent = ROC_NIX_TM_NODE_ID_INVALID;
+ leaf_lvl = (nix_tm_have_tl1_access(nix) ? ROC_TM_LVL_QUEUE : ROC_TM_LVL_SCH4);
+
+ /* TL1 node */
+ node = nix_tm_node_alloc();
+ if (!node)
+ goto error;
+
+ node->id = nonleaf_id;
+ node->parent_id = parent;
+ node->priority = 0;
+ node->weight = NIX_TM_DFLT_RR_WT;
+ node->shaper_profile_id = ROC_NIX_TM_SHAPER_PROFILE_NONE;
+ node->lvl = ROC_TM_LVL_ROOT;
+ node->tree = ROC_NIX_TM_SDP;
+ node->rel_chan = NIX_TM_CHAN_INVALID;
+
+ rc = nix_tm_node_add(roc_nix, node);
+ if (rc)
+ goto error;
+
+ parent = nonleaf_id;
+ nonleaf_id++;
+
+ lvl_start = ROC_TM_LVL_SCH1;
+ if (roc_nix_is_pf(roc_nix)) {
+ /* TL2 node */
+ rc = -ENOMEM;
+ node = nix_tm_node_alloc();
+ if (!node)
+ goto error;
+
+ node->id = nonleaf_id;
+ node->parent_id = parent;
+ node->priority = 0;
+ node->weight = NIX_TM_DFLT_RR_WT;
+ node->shaper_profile_id = ROC_NIX_TM_SHAPER_PROFILE_NONE;
+ node->lvl = ROC_TM_LVL_SCH1;
+ node->tree = ROC_NIX_TM_SDP;
+ node->rel_chan = NIX_TM_CHAN_INVALID;
+
+ rc = nix_tm_node_add(roc_nix, node);
+ if (rc)
+ goto error;
+
+ lvl_start = ROC_TM_LVL_SCH2;
+ tl2_node_id = nonleaf_id;
+ nonleaf_id++;
+ } else {
+ tl2_node_id = parent;
+ }
+
+ /* Allocate TL3 node */
+ rc = -ENOMEM;
+ node = nix_tm_node_alloc();
+ if (!node)
+ goto error;
+
+ node->id = nonleaf_id;
+ node->parent_id = tl2_node_id;
+ node->priority = 0;
+ node->weight = NIX_TM_DFLT_RR_WT;
+ node->shaper_profile_id = ROC_NIX_TM_SHAPER_PROFILE_NONE;
+ node->lvl = lvl_start;
+ node->tree = ROC_NIX_TM_SDP;
+ node->rel_chan = NIX_TM_CHAN_INVALID;
+
+ rc = nix_tm_node_add(roc_nix, node);
+ if (rc)
+ goto error;
+
+ tl3_node_id = nonleaf_id;
+ nonleaf_id++;
+ lvl_start++;
+
+ for (i = 0; i < nix->nb_tx_queues; i++) {
+ parent = tl3_node_id;
+ rc = -ENOMEM;
+ node = nix_tm_node_alloc();
+ if (!node)
+ goto error;
+
+ node->id = nonleaf_id;
+ node->parent_id = parent;
+ node->priority = 0;
+ node->weight = NIX_TM_DFLT_RR_WT;
+ node->shaper_profile_id = ROC_NIX_TM_SHAPER_PROFILE_NONE;
+ node->lvl = lvl_start;
+ node->tree = ROC_NIX_TM_SDP;
+ /* For SDP, if BP enabled use channel to PAUSE the corresponding queue */
+ node->rel_chan = (i % nix->tx_chan_cnt);
+
+ rc = nix_tm_node_add(roc_nix, node);
+ if (rc)
+ goto error;
+
+ parent = nonleaf_id;
+ nonleaf_id++;
+
+ lvl = (nix_tm_have_tl1_access(nix) ? ROC_TM_LVL_SCH4 : ROC_TM_LVL_SCH3);
+
+ rc = -ENOMEM;
+ node = nix_tm_node_alloc();
+ if (!node)
+ goto error;
+
+ node->id = nonleaf_id;
+ node->parent_id = parent;
+ node->priority = 0;
+ node->weight = NIX_TM_DFLT_RR_WT;
+ node->shaper_profile_id = ROC_NIX_TM_SHAPER_PROFILE_NONE;
+ node->lvl = lvl;
+ node->tree = ROC_NIX_TM_SDP;
+ node->rel_chan = NIX_TM_CHAN_INVALID;
+
+ rc = nix_tm_node_add(roc_nix, node);
+ if (rc)
+ goto error;
+
+ parent = nonleaf_id;
+ nonleaf_id++;
+
+ rc = -ENOMEM;
+ node = nix_tm_node_alloc();
+ if (!node)
+ goto error;
+
+ node->id = i;
+ node->parent_id = parent;
+ node->priority = 0;
+ node->weight = NIX_TM_DFLT_RR_WT;
+ node->shaper_profile_id = ROC_NIX_TM_SHAPER_PROFILE_NONE;
+ node->lvl = leaf_lvl;
+ node->tree = ROC_NIX_TM_SDP;
+ node->rel_chan = NIX_TM_CHAN_INVALID;
+
+ rc = nix_tm_node_add(roc_nix, node);
+ if (rc)
+ goto error;
+ }
+
+ return 0;
+error:
+ nix_tm_node_free(node);
+ return rc;
+}
+
int
nix_tm_free_resources(struct roc_nix *roc_nix, uint32_t tree_mask, bool hw_only)
{
diff --git a/drivers/common/cnxk/roc_nix_tm_ops.c b/drivers/common/cnxk/roc_nix_tm_ops.c
index b89f08ac66..951c310a56 100644
--- a/drivers/common/cnxk/roc_nix_tm_ops.c
+++ b/drivers/common/cnxk/roc_nix_tm_ops.c
@@ -1035,7 +1035,10 @@ roc_nix_tm_init(struct roc_nix *roc_nix)
}
/* Prepare default tree */
- rc = nix_tm_prepare_default_tree(roc_nix);
+ if (roc_nix_is_sdp(roc_nix) && (nix->nb_tx_queues > 1))
+ rc = roc_nix_tm_sdp_prepare_tree(roc_nix);
+ else
+ rc = nix_tm_prepare_default_tree(roc_nix);
if (rc) {
plt_err("failed to prepare default tm tree, rc=%d", rc);
return rc;
diff --git a/drivers/common/cnxk/roc_nix_tm_utils.c b/drivers/common/cnxk/roc_nix_tm_utils.c
index 4a09cc2aae..eaf6f9e4c7 100644
--- a/drivers/common/cnxk/roc_nix_tm_utils.c
+++ b/drivers/common/cnxk/roc_nix_tm_utils.c
@@ -582,7 +582,7 @@ nix_tm_topology_reg_prep(struct nix *nix, struct nix_tm_node *node,
/* Configure TL4 to send to SDP channel instead of CGX/LBK */
if (nix->sdp_link) {
- relchan = nix->tx_chan_base & 0xff;
+ relchan = (nix->tx_chan_base & 0xff) + node->rel_chan;
plt_tm_dbg("relchan=%u schq=%u tx_chan_cnt=%u", relchan, schq,
nix->tx_chan_cnt);
reg[k] = NIX_AF_TL4X_SDP_LINK_CFG(schq);
diff --git a/drivers/common/cnxk/roc_platform_base_symbols.c b/drivers/common/cnxk/roc_platform_base_symbols.c
index 7f0fe601ad..cc35c46456 100644
--- a/drivers/common/cnxk/roc_platform_base_symbols.c
+++ b/drivers/common/cnxk/roc_platform_base_symbols.c
@@ -221,6 +221,7 @@ RTE_EXPORT_INTERNAL_SYMBOL(roc_nix_rq_dump)
RTE_EXPORT_INTERNAL_SYMBOL(roc_nix_cq_dump)
RTE_EXPORT_INTERNAL_SYMBOL(roc_nix_sq_dump)
RTE_EXPORT_INTERNAL_SYMBOL(roc_nix_tm_dump)
+RTE_EXPORT_INTERNAL_SYMBOL(roc_nix_tm_sdp_prepare_tree)
RTE_EXPORT_INTERNAL_SYMBOL(roc_nix_dump)
RTE_EXPORT_INTERNAL_SYMBOL(roc_nix_inl_dev_dump)
RTE_EXPORT_INTERNAL_SYMBOL(roc_nix_inl_outb_cpt_lfs_dump)
--
2.34.1
next reply other threads:[~2025-09-01 7:31 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-09-01 7:30 Nithin Dabilpuram [this message]
2025-09-01 7:30 ` [PATCH 02/19] net/cnxk: new " Nithin Dabilpuram
2025-09-01 7:30 ` [PATCH 03/19] net/cnxk: disable CQ when SQ stopped Nithin Dabilpuram
2025-09-01 7:30 ` [PATCH 04/19] net/cnxk: update scatter check as warning for SDP Nithin Dabilpuram
2025-09-01 7:30 ` [PATCH 05/19] common/cnxk: fix inline device API Nithin Dabilpuram
2025-09-01 7:30 ` [PATCH 06/19] common/cnxk: add new mailbox to configure LSO alt flags Nithin Dabilpuram
2025-09-01 7:30 ` [PATCH 07/19] common/cnxk: add IPv4 fragmentation offload Nithin Dabilpuram
2025-09-01 7:30 ` [PATCH 08/19] common/cnxk: update DF flag in IPv4 fragments Nithin Dabilpuram
2025-09-01 7:30 ` [PATCH 09/19] common/cnxk: add support for per packet SQ count update Nithin Dabilpuram
2025-09-01 7:30 ` [PATCH 10/19] common/cnxk: feature fn to check 16B alignment Nithin Dabilpuram
2025-09-01 7:30 ` [PATCH 11/19] common/cnxk: add API to configure backpressure on pool Nithin Dabilpuram
2025-09-01 7:30 ` [PATCH 12/19] common/cnxk: fix max number of SQB bufs in clean up Nithin Dabilpuram
2025-09-01 7:30 ` [PATCH 13/19] common/cnxk: add support for SQ resize Nithin Dabilpuram
2025-09-01 7:30 ` [PATCH 14/19] common/cnxk: increase Tx schedular count Nithin Dabilpuram
2025-09-01 7:30 ` [PATCH 15/19] common/cnxk: resolve klocwork issues Nithin Dabilpuram
2025-09-01 7:30 ` [PATCH 16/19] common/cnxk: avoid null SQ access Nithin Dabilpuram
2025-09-01 7:30 ` [PATCH 17/19] common/cnxk: change in aura field width Nithin Dabilpuram
2025-09-01 7:30 ` [PATCH 18/19] common/cnxk: fix error handling on inline inbound setup Nithin Dabilpuram
2025-09-01 7:30 ` [PATCH 19/19] drivers: fix Klocwork issues Nithin Dabilpuram
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