From: Ciara Loftus <ciara.loftus@intel.com>
To: dev@dpdk.org
Cc: Ciara Loftus <ciara.loftus@intel.com>
Subject: [PATCH v2 2/5] net/idpf: use the new common vector capability function
Date: Wed, 17 Sep 2025 09:17:28 +0000 [thread overview]
Message-ID: <20250917091731.3632520-3-ciara.loftus@intel.com> (raw)
In-Reply-To: <20250917091731.3632520-1-ciara.loftus@intel.com>
Use the new function for determining the maximum simd bitwidth in
the idpf driver.
Signed-off-by: Ciara Loftus <ciara.loftus@intel.com>
---
v2:
* Removed check for AVX512DQ in the driver code as it's in the common
code now.
---
drivers/net/intel/idpf/idpf_rxtx.c | 50 ++++++-------------
drivers/net/intel/idpf/idpf_rxtx_vec_common.h | 11 ++++
2 files changed, 25 insertions(+), 36 deletions(-)
diff --git a/drivers/net/intel/idpf/idpf_rxtx.c b/drivers/net/intel/idpf/idpf_rxtx.c
index 5510cbd30a..c9eb7f66d2 100644
--- a/drivers/net/intel/idpf/idpf_rxtx.c
+++ b/drivers/net/intel/idpf/idpf_rxtx.c
@@ -762,26 +762,13 @@ idpf_set_rx_function(struct rte_eth_dev *dev)
struct idpf_vport *vport = dev->data->dev_private;
#ifdef RTE_ARCH_X86
struct idpf_rx_queue *rxq;
+ enum rte_vect_max_simd rx_simd_width = RTE_VECT_SIMD_DISABLED;
int i;
if (idpf_rx_vec_dev_check_default(dev) == IDPF_VECTOR_PATH &&
rte_vect_get_max_simd_bitwidth() >= RTE_VECT_SIMD_128) {
vport->rx_vec_allowed = true;
-
- if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2) == 1 &&
- rte_vect_get_max_simd_bitwidth() >= RTE_VECT_SIMD_256)
- vport->rx_use_avx2 = true;
-
- if (rte_vect_get_max_simd_bitwidth() >= RTE_VECT_SIMD_512)
-#ifdef CC_AVX512_SUPPORT
- if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512F) == 1 &&
- rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512BW) == 1 &&
- rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512DQ))
- vport->rx_use_avx512 = true;
-#else
- PMD_DRV_LOG(NOTICE,
- "AVX512 is not supported in build env");
-#endif /* CC_AVX512_SUPPORT */
+ rx_simd_width = idpf_get_max_simd_bitwidth();
} else {
vport->rx_vec_allowed = false;
}
@@ -795,7 +782,7 @@ idpf_set_rx_function(struct rte_eth_dev *dev)
(void)idpf_qc_splitq_rx_vec_setup(rxq);
}
#ifdef CC_AVX512_SUPPORT
- if (vport->rx_use_avx512) {
+ if (rx_simd_width == RTE_VECT_SIMD_512) {
PMD_DRV_LOG(NOTICE,
"Using Split AVX512 Vector Rx (port %d).",
dev->data->port_id);
@@ -815,7 +802,7 @@ idpf_set_rx_function(struct rte_eth_dev *dev)
(void)idpf_qc_singleq_rx_vec_setup(rxq);
}
#ifdef CC_AVX512_SUPPORT
- if (vport->rx_use_avx512) {
+ if (rx_simd_width == RTE_VECT_SIMD_512) {
PMD_DRV_LOG(NOTICE,
"Using Single AVX512 Vector Rx (port %d).",
dev->data->port_id);
@@ -823,7 +810,7 @@ idpf_set_rx_function(struct rte_eth_dev *dev)
return;
}
#endif /* CC_AVX512_SUPPORT */
- if (vport->rx_use_avx2) {
+ if (rx_simd_width == RTE_VECT_SIMD_256) {
PMD_DRV_LOG(NOTICE,
"Using Single AVX2 Vector Rx (port %d).",
dev->data->port_id);
@@ -871,6 +858,7 @@ idpf_set_tx_function(struct rte_eth_dev *dev)
{
struct idpf_vport *vport = dev->data->dev_private;
#ifdef RTE_ARCH_X86
+ enum rte_vect_max_simd tx_simd_width = RTE_VECT_SIMD_DISABLED;
#ifdef CC_AVX512_SUPPORT
struct ci_tx_queue *txq;
int i;
@@ -879,22 +867,12 @@ idpf_set_tx_function(struct rte_eth_dev *dev)
if (idpf_tx_vec_dev_check_default(dev) == IDPF_VECTOR_PATH &&
rte_vect_get_max_simd_bitwidth() >= RTE_VECT_SIMD_128) {
vport->tx_vec_allowed = true;
-
- if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2) == 1 &&
- rte_vect_get_max_simd_bitwidth() >= RTE_VECT_SIMD_256)
- vport->tx_use_avx2 = true;
-
- if (rte_vect_get_max_simd_bitwidth() >= RTE_VECT_SIMD_512)
+ tx_simd_width = idpf_get_max_simd_bitwidth();
#ifdef CC_AVX512_SUPPORT
- {
- if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512F) == 1 &&
- rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512BW) == 1)
- vport->tx_use_avx512 = true;
- if (vport->tx_use_avx512) {
- for (i = 0; i < dev->data->nb_tx_queues; i++) {
- txq = dev->data->tx_queues[i];
- idpf_qc_tx_vec_avx512_setup(txq);
- }
+ if (tx_simd_width == RTE_VECT_SIMD_512) {
+ for (i = 0; i < dev->data->nb_tx_queues; i++) {
+ txq = dev->data->tx_queues[i];
+ idpf_qc_tx_vec_avx512_setup(txq);
}
}
#else
@@ -910,7 +888,7 @@ idpf_set_tx_function(struct rte_eth_dev *dev)
if (vport->txq_model == VIRTCHNL2_QUEUE_MODEL_SPLIT) {
if (vport->tx_vec_allowed) {
#ifdef CC_AVX512_SUPPORT
- if (vport->tx_use_avx512) {
+ if (tx_simd_width == RTE_VECT_SIMD_512) {
PMD_DRV_LOG(NOTICE,
"Using Split AVX512 Vector Tx (port %d).",
dev->data->port_id);
@@ -928,7 +906,7 @@ idpf_set_tx_function(struct rte_eth_dev *dev)
} else {
if (vport->tx_vec_allowed) {
#ifdef CC_AVX512_SUPPORT
- if (vport->tx_use_avx512) {
+ if (tx_simd_width == RTE_VECT_SIMD_512) {
for (i = 0; i < dev->data->nb_tx_queues; i++) {
txq = dev->data->tx_queues[i];
if (txq == NULL)
@@ -943,7 +921,7 @@ idpf_set_tx_function(struct rte_eth_dev *dev)
return;
}
#endif /* CC_AVX512_SUPPORT */
- if (vport->tx_use_avx2) {
+ if (tx_simd_width == RTE_VECT_SIMD_256) {
PMD_DRV_LOG(NOTICE,
"Using Single AVX2 Vector Tx (port %d).",
dev->data->port_id);
diff --git a/drivers/net/intel/idpf/idpf_rxtx_vec_common.h b/drivers/net/intel/idpf/idpf_rxtx_vec_common.h
index ff3ae56baf..ecdf2f0e23 100644
--- a/drivers/net/intel/idpf/idpf_rxtx_vec_common.h
+++ b/drivers/net/intel/idpf/idpf_rxtx_vec_common.h
@@ -11,6 +11,9 @@
#include "idpf_ethdev.h"
#include "idpf_rxtx.h"
#include "../common/rx.h"
+#ifdef RTE_ARCH_X86
+#include "../common/rx_vec_x86.h"
+#endif
#define IDPF_SCALAR_PATH 0
#define IDPF_VECTOR_PATH 1
@@ -129,4 +132,12 @@ idpf_tx_vec_dev_check_default(struct rte_eth_dev *dev)
return IDPF_VECTOR_PATH;
}
+#ifdef RTE_ARCH_X86
+static inline enum rte_vect_max_simd
+idpf_get_max_simd_bitwidth(void)
+{
+ return ci_get_x86_max_simd_bitwidth();
+}
+#endif
+
#endif /*_IDPF_RXTX_VEC_COMMON_H_*/
--
2.34.1
next prev parent reply other threads:[~2025-09-17 9:17 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-09-11 14:31 [PATCH 0/4] idpf and cpfl rx path selection simplification Ciara Loftus
2025-09-11 14:31 ` [PATCH 1/4] net/idpf: use the new common vector capability function Ciara Loftus
2025-09-11 14:35 ` Bruce Richardson
2025-09-11 14:31 ` [PATCH 2/4] net/idpf: use the common Rx path selection infrastructure Ciara Loftus
2025-09-11 16:21 ` Bruce Richardson
2025-09-11 14:31 ` [PATCH 3/4] net/cpfl: use the new common vector capability function Ciara Loftus
2025-09-11 14:31 ` [PATCH 4/4] net/cpfl: use the common Rx path selection infrastructure Ciara Loftus
2025-09-17 9:17 ` [PATCH v2 0/5] idpf and cpfl rx path selection simplification Ciara Loftus
2025-09-17 9:17 ` [PATCH v2 1/5] net/intel: add AVX512DQ flag to AVX-512 checks Ciara Loftus
2025-09-17 9:24 ` Bruce Richardson
2025-09-17 9:17 ` Ciara Loftus [this message]
2025-09-17 9:17 ` [PATCH v2 3/5] net/idpf: use the common Rx path selection infrastructure Ciara Loftus
2025-09-17 9:17 ` [PATCH v2 4/5] net/cpfl: use the new common vector capability function Ciara Loftus
2025-09-17 9:17 ` [PATCH v2 5/5] net/cpfl: use the common Rx path selection infrastructure Ciara Loftus
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