From: Serhii Iliushyk <sil-plv@napatech.com>
To: dev@dpdk.org
Cc: mko-plv@napatech.com, sil-plv@napatech.com, ckm@napatech.com,
stephen@networkplumber.org
Subject: [PATCH v1 03/20] net/ntnic: add reset init stage 0 for NT400D11
Date: Wed, 1 Oct 2025 17:09:45 +0200 [thread overview]
Message-ID: <20251001151018.250671-4-sil-plv@napatech.com> (raw)
In-Reply-To: <20251001151018.250671-1-sil-plv@napatech.com>
add reset all domains stage for nt400d11
Signed-off-by: Serhii Iliushyk <sil-plv@napatech.com>
---
.../nthw/core/nt400dxx/nthw_fpga_nt400dxx.c | 2 +-
.../core/nt400dxx/reset/nthw_fpga_rst9569.c | 33 ++++++++++++++++++-
drivers/net/ntnic/ntnic_mod_reg.h | 3 +-
3 files changed, 35 insertions(+), 3 deletions(-)
diff --git a/drivers/net/ntnic/nthw/core/nt400dxx/nthw_fpga_nt400dxx.c b/drivers/net/ntnic/nthw/core/nt400dxx/nthw_fpga_nt400dxx.c
index 8ae06417b8..47c26b092b 100644
--- a/drivers/net/ntnic/nthw/core/nt400dxx/nthw_fpga_nt400dxx.c
+++ b/drivers/net/ntnic/nthw/core/nt400dxx/nthw_fpga_nt400dxx.c
@@ -209,7 +209,7 @@ static int nthw_fpga_nt400dxx_init(struct fpga_info_s *p_fpga_info)
switch (p_fpga_info->n_fpga_prod_id) {
case 9569:
if (rst9569_ops)
- res = rst9569_ops->nthw_fpga_rst9569_init();
+ res = rst9569_ops->nthw_fpga_rst9569_init(p_fpga_info, &rst);
if (res) {
NT_LOG(ERR,
diff --git a/drivers/net/ntnic/nthw/core/nt400dxx/reset/nthw_fpga_rst9569.c b/drivers/net/ntnic/nthw/core/nt400dxx/reset/nthw_fpga_rst9569.c
index 254703bae9..6a6660cabe 100644
--- a/drivers/net/ntnic/nthw/core/nt400dxx/reset/nthw_fpga_rst9569.c
+++ b/drivers/net/ntnic/nthw/core/nt400dxx/reset/nthw_fpga_rst9569.c
@@ -6,6 +6,8 @@
#include "ntnic_mod_reg.h"
#include "nthw_register.h"
#include "nthw_drv.h"
+#include "nt_util.h"
+#include "ntlog.h"
static int nthw_fpga_rst9569_setup(nthw_fpga_t *p_fpga, struct nthw_fpga_rst_nt400dxx *const p)
@@ -63,11 +65,40 @@ static int nthw_fpga_rst9569_setup(nthw_fpga_t *p_fpga, struct nthw_fpga_rst_nt4
return 0;
};
-static int nthw_fpga_rst9569_init(void)
+static void nthw_fpga_rst9569_set_default_rst_values(struct nthw_fpga_rst_nt400dxx *const p)
{
+ nthw_field_update_register(p->p_fld_rst_sys);
+ nthw_field_set_all(p->p_fld_rst_sys);
+ nthw_field_set_val32(p->p_fld_rst_ddr4, 1);
+ nthw_field_set_val_flush32(p->p_fld_rst_phy_ftile, 1);
+}
+
+static int nthw_fpga_rst9569_product_reset(struct fpga_info_s *p_fpga_info,
+ struct nthw_fpga_rst_nt400dxx *p_rst)
+{
+ RTE_ASSERT(p_fpga_info);
+ RTE_ASSERT(p_rst);
+
+ const char *const p_adapter_id_str = p_fpga_info->mp_adapter_id_str;
+
+ /* (0) Reset all domains / modules except peripherals: */
+ NT_LOG_DBGX(DBG, NTHW, "%s: RST defaults", p_adapter_id_str);
+ nthw_fpga_rst9569_set_default_rst_values(p_rst);
+
return 0;
}
+static int nthw_fpga_rst9569_init(struct fpga_info_s *p_fpga_info,
+ struct nthw_fpga_rst_nt400dxx *p_rst)
+{
+ RTE_ASSERT(p_fpga_info);
+ RTE_ASSERT(p_rst);
+
+ int res = nthw_fpga_rst9569_product_reset(p_fpga_info, p_rst);
+
+ return res;
+}
+
static struct rst9569_ops rst9569_ops = {
.nthw_fpga_rst9569_init = nthw_fpga_rst9569_init,
.nthw_fpga_rst9569_setup = nthw_fpga_rst9569_setup,
diff --git a/drivers/net/ntnic/ntnic_mod_reg.h b/drivers/net/ntnic/ntnic_mod_reg.h
index a4ea4f8f76..fa511e78cd 100644
--- a/drivers/net/ntnic/ntnic_mod_reg.h
+++ b/drivers/net/ntnic/ntnic_mod_reg.h
@@ -270,7 +270,8 @@ struct rst9574_ops {
};
struct rst9569_ops {
- int (*nthw_fpga_rst9569_init)(void);
+ int (*nthw_fpga_rst9569_init)(struct fpga_info_s *p_fpga_info,
+ struct nthw_fpga_rst_nt400dxx *const p);
int (*nthw_fpga_rst9569_setup)(nthw_fpga_t *p_fpga,
struct nthw_fpga_rst_nt400dxx *const p);
};
--
2.45.0
next prev parent reply other threads:[~2025-10-01 15:11 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-10-01 15:09 [PATCH v1 00/20] Add NT400D11 support and new features Serhii Iliushyk
2025-10-01 15:09 ` [PATCH v1 01/20] net/ntnic: add stubs for init NT400D11 Serhii Iliushyk
2025-10-01 15:09 ` [PATCH v1 02/20] net/ntnic: add reset setup for NT400D11 Serhii Iliushyk
2025-10-01 15:09 ` Serhii Iliushyk [this message]
2025-10-01 15:09 ` [PATCH v1 04/20] net/ntnic: add reset init stage 1 " Serhii Iliushyk
2025-10-01 15:09 ` [PATCH v1 05/20] net/ntnic: add reset init stage 2 " Serhii Iliushyk
2025-10-01 15:09 ` [PATCH v1 06/20] net/ntnic: add reset init stage 3 and 4 " Serhii Iliushyk
2025-10-01 15:09 ` [PATCH v1 07/20] net/ntnic: add reset init stage 5 " Serhii Iliushyk
2025-10-01 15:09 ` [PATCH v1 08/20] net/ntnic: add reset init stage 6 " Serhii Iliushyk
2025-10-01 15:09 ` [PATCH v1 09/20] net/ntnic: add reset init stage 7 " Serhii Iliushyk
2025-10-01 15:09 ` [PATCH v1 10/20] net/ntnic: add reset init stage 8 " Serhii Iliushyk
2025-10-01 15:09 ` [PATCH v1 11/20] net/ntnic: add fpga registers " Serhii Iliushyk
2025-10-01 15:09 ` [PATCH v1 12/20] net/ntnic: add support pattern matching on inner ETH headers Serhii Iliushyk
2025-10-01 15:09 ` [PATCH v1 13/20] net/ntnic: add support pattern matching on inner VLAN header Serhii Iliushyk
2025-10-01 15:09 ` [PATCH v1 14/20] net/ntnic: add handling exception path option Serhii Iliushyk
2025-10-01 15:09 ` [PATCH v1 15/20] net/ntnic: add flow query with count action Serhii Iliushyk
2025-10-01 15:09 ` [PATCH v1 16/20] net/ntnic: add flow pull Serhii Iliushyk
2025-10-01 15:09 ` [PATCH v1 17/20] net/ntnic: extend flow dump with MBR configuration Serhii Iliushyk
2025-10-01 15:10 ` [PATCH v1 18/20] net/ntnic: make flow lock local Serhii Iliushyk
2025-10-01 15:10 ` [PATCH v1 19/20] net/ntnic: rename hwlock Serhii Iliushyk
2025-10-01 15:10 ` [PATCH v1 20/20] net/ntnic: rename nt log types Serhii Iliushyk
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