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From: Serhii Iliushyk <sil-plv@napatech.com>
To: dev@dpdk.org
Cc: mko-plv@napatech.com, sil-plv@napatech.com, ckm@napatech.com,
	stephen@networkplumber.org
Subject: [PATCH v1 06/20] net/ntnic: add reset init stage 3 and 4 for NT400D11
Date: Wed,  1 Oct 2025 17:09:48 +0200	[thread overview]
Message-ID: <20251001151018.250671-7-sil-plv@napatech.com> (raw)
In-Reply-To: <20251001151018.250671-1-sil-plv@napatech.com>

add DDR4 calib complete latched bits.

Signed-off-by: Serhii Iliushyk <sil-plv@napatech.com>
---
 .../core/nt400dxx/reset/nthw_fpga_rst9569.c   | 24 +++++++++++++++++++
 1 file changed, 24 insertions(+)

diff --git a/drivers/net/ntnic/nthw/core/nt400dxx/reset/nthw_fpga_rst9569.c b/drivers/net/ntnic/nthw/core/nt400dxx/reset/nthw_fpga_rst9569.c
index 5e127ecc86..e416e739da 100644
--- a/drivers/net/ntnic/nthw/core/nt400dxx/reset/nthw_fpga_rst9569.c
+++ b/drivers/net/ntnic/nthw/core/nt400dxx/reset/nthw_fpga_rst9569.c
@@ -84,6 +84,13 @@ static bool nthw_fpga_rst9569_get_ddr4_calib_complete_stat(struct nthw_fpga_rst_
 	return nthw_field_get_updated(p->p_fld_stat_ddr4_calib_complete) != 0;
 }
 
+static void nthw_fpga_rst9569_set_ddr4_calib_complete_latch(struct nthw_fpga_rst_nt400dxx *const p,
+	uint32_t val)
+{
+	nthw_field_update_register(p->p_fld_latch_ddr4_calib_complete);
+	nthw_field_set_val_flush32(p->p_fld_latch_ddr4_calib_complete, val);
+}
+
 static int nthw_fpga_rst9569_wait_ddr4_calibration_complete(struct fpga_info_s *p_fpga_info,
 	struct nthw_fpga_rst_nt400dxx *p_rst)
 {
@@ -127,6 +134,11 @@ static int nthw_fpga_rst9569_wait_ddr4_calibration_complete(struct fpga_info_s *
 	return 0;
 }
 
+static bool nthw_fpga_rst9569_get_ddr4_calib_complete_latch(struct nthw_fpga_rst_nt400dxx *const p)
+{
+	return nthw_field_get_updated(p->p_fld_latch_ddr4_calib_complete) != 0;
+}
+
 static int nthw_fpga_rst9569_product_reset(struct fpga_info_s *p_fpga_info,
 	struct nthw_fpga_rst_nt400dxx *p_rst)
 {
@@ -163,6 +175,18 @@ static int nthw_fpga_rst9569_product_reset(struct fpga_info_s *p_fpga_info,
 		return res;
 	}
 
+	/* (3) Set DDR4 calib complete latched bits: */
+	nthw_fpga_rst9569_set_ddr4_calib_complete_latch(p_rst, 1);
+
+	/* Wait for phy to settle. */
+	nthw_os_wait_usec(20000);
+
+	/* (4) Ensure all latched status bits are still set: */
+	if (!nthw_fpga_rst9569_get_ddr4_calib_complete_latch(p_rst)) {
+		NT_LOG(ERR, NTHW, "%s: %s: DDR4 calibration complete has toggled",
+			p_adapter_id_str, __func__);
+	}
+
 
 	return 0;
 }
-- 
2.45.0


  parent reply	other threads:[~2025-10-01 15:11 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-10-01 15:09 [PATCH v1 00/20] Add NT400D11 support and new features Serhii Iliushyk
2025-10-01 15:09 ` [PATCH v1 01/20] net/ntnic: add stubs for init NT400D11 Serhii Iliushyk
2025-10-01 15:09 ` [PATCH v1 02/20] net/ntnic: add reset setup for NT400D11 Serhii Iliushyk
2025-10-01 15:09 ` [PATCH v1 03/20] net/ntnic: add reset init stage 0 " Serhii Iliushyk
2025-10-01 15:09 ` [PATCH v1 04/20] net/ntnic: add reset init stage 1 " Serhii Iliushyk
2025-10-01 15:09 ` [PATCH v1 05/20] net/ntnic: add reset init stage 2 " Serhii Iliushyk
2025-10-01 15:09 ` Serhii Iliushyk [this message]
2025-10-01 15:09 ` [PATCH v1 07/20] net/ntnic: add reset init stage 5 " Serhii Iliushyk
2025-10-01 15:09 ` [PATCH v1 08/20] net/ntnic: add reset init stage 6 " Serhii Iliushyk
2025-10-01 15:09 ` [PATCH v1 09/20] net/ntnic: add reset init stage 7 " Serhii Iliushyk
2025-10-01 15:09 ` [PATCH v1 10/20] net/ntnic: add reset init stage 8 " Serhii Iliushyk
2025-10-01 15:09 ` [PATCH v1 11/20] net/ntnic: add fpga registers " Serhii Iliushyk
2025-10-01 15:09 ` [PATCH v1 12/20] net/ntnic: add support pattern matching on inner ETH headers Serhii Iliushyk
2025-10-01 15:09 ` [PATCH v1 13/20] net/ntnic: add support pattern matching on inner VLAN header Serhii Iliushyk
2025-10-01 15:09 ` [PATCH v1 14/20] net/ntnic: add handling exception path option Serhii Iliushyk
2025-10-01 15:09 ` [PATCH v1 15/20] net/ntnic: add flow query with count action Serhii Iliushyk
2025-10-01 15:09 ` [PATCH v1 16/20] net/ntnic: add flow pull Serhii Iliushyk
2025-10-01 15:09 ` [PATCH v1 17/20] net/ntnic: extend flow dump with MBR configuration Serhii Iliushyk
2025-10-01 15:10 ` [PATCH v1 18/20] net/ntnic: make flow lock local Serhii Iliushyk
2025-10-01 15:10 ` [PATCH v1 19/20] net/ntnic: rename hwlock Serhii Iliushyk
2025-10-01 15:10 ` [PATCH v1 20/20] net/ntnic: rename nt log types Serhii Iliushyk

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