From: Ciara Loftus <ciara.loftus@intel.com>
To: dev@dpdk.org
Cc: Ciara Loftus <ciara.loftus@intel.com>
Subject: [PATCH v2 5/7] net/iavf: reformat the Rx path infos array
Date: Wed, 15 Oct 2025 10:07:21 +0000 [thread overview]
Message-ID: <20251015100723.1603296-6-ciara.loftus@intel.com> (raw)
In-Reply-To: <20251015100723.1603296-1-ciara.loftus@intel.com>
In order to improve readability, reformat the rx path infos array.
Signed-off-by: Ciara Loftus <ciara.loftus@intel.com>
---
v2:
* Removed reduntant assignment to zero value (IAVF_RX_NO_OFFLOADS) and
remove its definitions as it is not used any more.
* Newline for closing braces.
* Removed assignment of RTE_VECT_SIMD_DISABLED to simd_width, the
selection logic can work when this is set to zero for the scalar path.
---
drivers/net/intel/iavf/iavf_rxtx.c | 337 ++++++++++++++++++++++-------
drivers/net/intel/iavf/iavf_rxtx.h | 1 -
2 files changed, 258 insertions(+), 80 deletions(-)
diff --git a/drivers/net/intel/iavf/iavf_rxtx.c b/drivers/net/intel/iavf/iavf_rxtx.c
index e217328823..a3ef13c791 100644
--- a/drivers/net/intel/iavf/iavf_rxtx.c
+++ b/drivers/net/intel/iavf/iavf_rxtx.c
@@ -3720,99 +3720,278 @@ iavf_xmit_pkts_no_poll(void *tx_queue, struct rte_mbuf **tx_pkts,
uint16_t nb_pkts);
static const struct ci_rx_path_info iavf_rx_path_infos[] = {
- [IAVF_RX_DISABLED] = {iavf_recv_pkts_no_poll, "Disabled",
- {IAVF_RX_NO_OFFLOADS, RTE_VECT_SIMD_DISABLED, {.disabled = true}}},
- [IAVF_RX_DEFAULT] = {iavf_recv_pkts, "Scalar",
- {IAVF_RX_SCALAR_OFFLOADS, RTE_VECT_SIMD_DISABLED}},
- [IAVF_RX_SCATTERED] = {iavf_recv_scattered_pkts, "Scalar Scattered",
- {IAVF_RX_SCALAR_OFFLOADS | RTE_ETH_RX_OFFLOAD_SCATTER, RTE_VECT_SIMD_DISABLED,
- {.scattered = true}}},
- [IAVF_RX_FLEX_RXD] = {iavf_recv_pkts_flex_rxd, "Scalar Flex",
- {IAVF_RX_SCALAR_FLEX_OFFLOADS, RTE_VECT_SIMD_DISABLED, {.flex_desc = true}}},
- [IAVF_RX_SCATTERED_FLEX_RXD] = {iavf_recv_scattered_pkts_flex_rxd, "Scalar Scattered Flex",
- {IAVF_RX_SCALAR_FLEX_OFFLOADS | RTE_ETH_RX_OFFLOAD_SCATTER, RTE_VECT_SIMD_DISABLED,
- {.scattered = true, .flex_desc = true}}},
- [IAVF_RX_BULK_ALLOC] = {iavf_recv_pkts_bulk_alloc, "Scalar Bulk Alloc",
- {IAVF_RX_SCALAR_OFFLOADS, RTE_VECT_SIMD_DISABLED, {.bulk_alloc = true}}},
- [IAVF_RX_BULK_ALLOC_FLEX_RXD] = {iavf_recv_pkts_bulk_alloc, "Scalar Bulk Alloc Flex",
- {IAVF_RX_SCALAR_FLEX_OFFLOADS, RTE_VECT_SIMD_DISABLED,
- {.flex_desc = true, .bulk_alloc = true}}},
+ [IAVF_RX_DISABLED] = {
+ .pkt_burst = iavf_recv_pkts_no_poll,
+ .info = "Disabled",
+ .features = {
+ .extra.disabled = true
+ }
+ },
+ [IAVF_RX_DEFAULT] = {
+ .pkt_burst = iavf_recv_pkts,
+ .info = "Scalar",
+ .features = {
+ .rx_offloads = IAVF_RX_SCALAR_OFFLOADS
+ }
+ },
+ [IAVF_RX_SCATTERED] = {
+ .pkt_burst = iavf_recv_scattered_pkts,
+ .info = "Scalar Scattered",
+ .features = {
+ .rx_offloads = IAVF_RX_SCALAR_OFFLOADS | RTE_ETH_RX_OFFLOAD_SCATTER,
+ .extra.scattered = true
+ }
+ },
+ [IAVF_RX_FLEX_RXD] = {
+ .pkt_burst = iavf_recv_pkts_flex_rxd,
+ .info = "Scalar Flex",
+ .features = {
+ .rx_offloads = IAVF_RX_SCALAR_FLEX_OFFLOADS,
+ .extra.flex_desc = true
+ }
+ },
+ [IAVF_RX_SCATTERED_FLEX_RXD] = {
+ .pkt_burst = iavf_recv_scattered_pkts_flex_rxd,
+ .info = "Scalar Scattered Flex",
+ .features = {
+ .rx_offloads = IAVF_RX_SCALAR_FLEX_OFFLOADS | RTE_ETH_RX_OFFLOAD_SCATTER,
+ .extra.scattered = true,
+ .extra.flex_desc = true
+ }
+ },
+ [IAVF_RX_BULK_ALLOC] = {
+ .pkt_burst = iavf_recv_pkts_bulk_alloc,
+ .info = "Scalar Bulk Alloc",
+ .features = {
+ .rx_offloads = IAVF_RX_SCALAR_OFFLOADS,
+ .extra.bulk_alloc = true
+ }
+ },
+ [IAVF_RX_BULK_ALLOC_FLEX_RXD] = {
+ .pkt_burst = iavf_recv_pkts_bulk_alloc,
+ .info = "Scalar Bulk Alloc Flex",
+ .features = {
+ .rx_offloads = IAVF_RX_SCALAR_FLEX_OFFLOADS,
+ .extra.flex_desc = true,
+ .extra.bulk_alloc = true
+ }
+ },
#ifdef RTE_ARCH_X86
- [IAVF_RX_SSE] = {iavf_recv_pkts_vec, "Vector SSE",
- {IAVF_RX_VECTOR_OFFLOAD_OFFLOADS, RTE_VECT_SIMD_128, {.bulk_alloc = true}}},
- [IAVF_RX_SSE_SCATTERED] = {iavf_recv_scattered_pkts_vec, "Vector Scattered SSE",
- {IAVF_RX_VECTOR_OFFLOADS | RTE_ETH_RX_OFFLOAD_SCATTER, RTE_VECT_SIMD_128,
- {.scattered = true, .bulk_alloc = true}}},
- [IAVF_RX_SSE_FLEX_RXD] = {iavf_recv_pkts_vec_flex_rxd, "Vector Flex SSE",
- {IAVF_RX_VECTOR_OFFLOAD_FLEX_OFFLOADS, RTE_VECT_SIMD_128,
- {.flex_desc = true, .bulk_alloc = true}}},
+ [IAVF_RX_SSE] = {
+ .pkt_burst = iavf_recv_pkts_vec,
+ .info = "Vector SSE",
+ .features = {
+ .rx_offloads = IAVF_RX_VECTOR_OFFLOAD_OFFLOADS,
+ .simd_width = RTE_VECT_SIMD_128,
+ .extra.bulk_alloc = true
+ }
+ },
+ [IAVF_RX_SSE_SCATTERED] = {
+ .pkt_burst = iavf_recv_scattered_pkts_vec,
+ .info = "Vector Scattered SSE",
+ .features = {
+ .rx_offloads = IAVF_RX_VECTOR_OFFLOADS | RTE_ETH_RX_OFFLOAD_SCATTER,
+ .simd_width = RTE_VECT_SIMD_128,
+ .extra.scattered = true,
+ .extra.bulk_alloc = true
+ }
+ },
+ [IAVF_RX_SSE_FLEX_RXD] = {
+ .pkt_burst = iavf_recv_pkts_vec_flex_rxd,
+ .info = "Vector Flex SSE",
+ .features = {
+ .rx_offloads = IAVF_RX_VECTOR_OFFLOAD_FLEX_OFFLOADS,
+ .simd_width = RTE_VECT_SIMD_128,
+ .extra.flex_desc = true,
+ .extra.bulk_alloc = true
+ }
+ },
[IAVF_RX_SSE_SCATTERED_FLEX_RXD] = {
- iavf_recv_scattered_pkts_vec_flex_rxd, "Vector Scattered SSE Flex",
- {IAVF_RX_VECTOR_OFFLOAD_FLEX_OFFLOADS | RTE_ETH_RX_OFFLOAD_SCATTER,
- RTE_VECT_SIMD_128,
- {.scattered = true, .flex_desc = true, .bulk_alloc = true}}},
- [IAVF_RX_AVX2] = {iavf_recv_pkts_vec_avx2, "Vector AVX2",
- {IAVF_RX_VECTOR_OFFLOADS, RTE_VECT_SIMD_256, {.bulk_alloc = true}}},
- [IAVF_RX_AVX2_SCATTERED] = {iavf_recv_scattered_pkts_vec_avx2, "Vector Scattered AVX2",
- {IAVF_RX_VECTOR_OFFLOADS | RTE_ETH_RX_OFFLOAD_SCATTER, RTE_VECT_SIMD_256,
- {.scattered = true, .bulk_alloc = true}}},
- [IAVF_RX_AVX2_OFFLOAD] = {iavf_recv_pkts_vec_avx2_offload, "Vector AVX2 Offload",
- {IAVF_RX_VECTOR_OFFLOAD_OFFLOADS, RTE_VECT_SIMD_256, {.bulk_alloc = true}}},
+ .pkt_burst = iavf_recv_scattered_pkts_vec_flex_rxd,
+ .info = "Vector Scattered SSE Flex",
+ .features = {
+ .rx_offloads = IAVF_RX_VECTOR_OFFLOAD_FLEX_OFFLOADS |
+ RTE_ETH_RX_OFFLOAD_SCATTER,
+ .simd_width = RTE_VECT_SIMD_128,
+ .extra.scattered = true,
+ .extra.flex_desc = true,
+ .extra.bulk_alloc = true
+ }
+ },
+ [IAVF_RX_AVX2] = {
+ .pkt_burst = iavf_recv_pkts_vec_avx2,
+ .info = "Vector AVX2",
+ .features = {
+ .rx_offloads = IAVF_RX_VECTOR_OFFLOADS,
+ .simd_width = RTE_VECT_SIMD_256,
+ .extra.bulk_alloc = true
+ }
+ },
+ [IAVF_RX_AVX2_SCATTERED] = {
+ .pkt_burst = iavf_recv_scattered_pkts_vec_avx2,
+ .info = "Vector Scattered AVX2",
+ .features = {
+ .rx_offloads = IAVF_RX_VECTOR_OFFLOADS | RTE_ETH_RX_OFFLOAD_SCATTER,
+ .simd_width = RTE_VECT_SIMD_256,
+ .extra.scattered = true,
+ .extra.bulk_alloc = true
+ }
+ },
+ [IAVF_RX_AVX2_OFFLOAD] = {
+ .pkt_burst = iavf_recv_pkts_vec_avx2_offload,
+ .info = "Vector AVX2 Offload",
+ .features = {
+ .rx_offloads = IAVF_RX_VECTOR_OFFLOAD_OFFLOADS,
+ .simd_width = RTE_VECT_SIMD_256,
+ .extra.bulk_alloc = true
+ }
+ },
[IAVF_RX_AVX2_SCATTERED_OFFLOAD] = {
- iavf_recv_scattered_pkts_vec_avx2_offload, "Vector Scattered AVX2 offload",
- {IAVF_RX_VECTOR_OFFLOAD_OFFLOADS | RTE_ETH_RX_OFFLOAD_SCATTER, RTE_VECT_SIMD_256,
- {.scattered = true, .bulk_alloc = true}}},
- [IAVF_RX_AVX2_FLEX_RXD] = {iavf_recv_pkts_vec_avx2_flex_rxd, "Vector AVX2 Flex",
- {IAVF_RX_VECTOR_FLEX_OFFLOADS, RTE_VECT_SIMD_256,
- {.flex_desc = true, .bulk_alloc = true}}},
+ .pkt_burst = iavf_recv_scattered_pkts_vec_avx2_offload,
+ .info = "Vector Scattered AVX2 Offload",
+ .features = {
+ .rx_offloads = IAVF_RX_VECTOR_OFFLOAD_OFFLOADS | RTE_ETH_RX_OFFLOAD_SCATTER,
+ .simd_width = RTE_VECT_SIMD_256,
+ .extra.scattered = true,
+ .extra.bulk_alloc = true
+ }
+ },
+ [IAVF_RX_AVX2_FLEX_RXD] = {
+ .pkt_burst = iavf_recv_pkts_vec_avx2_flex_rxd,
+ .info = "Vector AVX2 Flex",
+ .features = {
+ .rx_offloads = IAVF_RX_VECTOR_FLEX_OFFLOADS,
+ .simd_width = RTE_VECT_SIMD_256,
+ .extra.flex_desc = true,
+ .extra.bulk_alloc = true
+ }
+ },
[IAVF_RX_AVX2_SCATTERED_FLEX_RXD] = {
- iavf_recv_scattered_pkts_vec_avx2_flex_rxd, "Vector Scattered AVX2 Flex",
- {IAVF_RX_VECTOR_FLEX_OFFLOADS | RTE_ETH_RX_OFFLOAD_SCATTER, RTE_VECT_SIMD_256,
- {.scattered = true, .flex_desc = true, .bulk_alloc = true}}},
+ .pkt_burst = iavf_recv_scattered_pkts_vec_avx2_flex_rxd,
+ .info = "Vector Scattered AVX2 Flex",
+ .features = {
+ .rx_offloads = IAVF_RX_VECTOR_FLEX_OFFLOADS | RTE_ETH_RX_OFFLOAD_SCATTER,
+ .simd_width = RTE_VECT_SIMD_256,
+ .extra.scattered = true,
+ .extra.flex_desc = true,
+ .extra.bulk_alloc = true
+ }
+ },
[IAVF_RX_AVX2_FLEX_RXD_OFFLOAD] = {
- iavf_recv_pkts_vec_avx2_flex_rxd_offload, "Vector AVX2 Flex Offload",
- {IAVF_RX_VECTOR_OFFLOAD_FLEX_OFFLOADS, RTE_VECT_SIMD_256,
- {.flex_desc = true, .bulk_alloc = true}}},
+ .pkt_burst = iavf_recv_pkts_vec_avx2_flex_rxd_offload,
+ .info = "Vector AVX2 Flex Offload",
+ .features = {
+ .rx_offloads = IAVF_RX_VECTOR_OFFLOAD_FLEX_OFFLOADS,
+ .simd_width = RTE_VECT_SIMD_256,
+ .extra.flex_desc = true,
+ .extra.bulk_alloc = true
+ }
+ },
[IAVF_RX_AVX2_SCATTERED_FLEX_RXD_OFFLOAD] = {
- iavf_recv_scattered_pkts_vec_avx2_flex_rxd_offload,
- "Vector Scattered AVX2 Flex Offload",
- {IAVF_RX_VECTOR_OFFLOAD_FLEX_OFFLOADS | RTE_ETH_RX_OFFLOAD_SCATTER,
- RTE_VECT_SIMD_256,
- {.scattered = true, .flex_desc = true, .bulk_alloc = true}}},
+ .pkt_burst = iavf_recv_scattered_pkts_vec_avx2_flex_rxd_offload,
+ .info = "Vector Scattered AVX2 Flex Offload",
+ .features = {
+ .rx_offloads = IAVF_RX_VECTOR_OFFLOAD_FLEX_OFFLOADS |
+ RTE_ETH_RX_OFFLOAD_SCATTER,
+ .simd_width = RTE_VECT_SIMD_256,
+ .extra.scattered = true,
+ .extra.flex_desc = true,
+ .extra.bulk_alloc = true
+ }
+ },
#ifdef CC_AVX512_SUPPORT
- [IAVF_RX_AVX512] = {iavf_recv_pkts_vec_avx512, "Vector AVX512",
- {IAVF_RX_VECTOR_OFFLOADS, RTE_VECT_SIMD_512, {.bulk_alloc = true}}},
+ [IAVF_RX_AVX512] = {
+ .pkt_burst = iavf_recv_pkts_vec_avx512,
+ .info = "Vector AVX512",
+ .features = {
+ .rx_offloads = IAVF_RX_VECTOR_OFFLOADS,
+ .simd_width = RTE_VECT_SIMD_512,
+ .extra.bulk_alloc = true
+ }
+ },
[IAVF_RX_AVX512_SCATTERED] = {
- iavf_recv_scattered_pkts_vec_avx512, "Vector Scattered AVX512",
- {IAVF_RX_VECTOR_OFFLOADS | RTE_ETH_RX_OFFLOAD_SCATTER, RTE_VECT_SIMD_512,
- {.scattered = true, .bulk_alloc = true}}},
- [IAVF_RX_AVX512_OFFLOAD] = {iavf_recv_pkts_vec_avx512_offload, "Vector AVX512 Offload",
- {IAVF_RX_VECTOR_OFFLOAD_OFFLOADS, RTE_VECT_SIMD_512, {.bulk_alloc = true}}},
+ .pkt_burst = iavf_recv_scattered_pkts_vec_avx512,
+ .info = "Vector Scattered AVX512",
+ .features = {
+ .rx_offloads = IAVF_RX_VECTOR_OFFLOADS | RTE_ETH_RX_OFFLOAD_SCATTER,
+ .simd_width = RTE_VECT_SIMD_512,
+ .extra.scattered = true,
+ .extra.bulk_alloc = true
+ }
+ },
+ [IAVF_RX_AVX512_OFFLOAD] = {
+ .pkt_burst = iavf_recv_pkts_vec_avx512_offload,
+ .info = "Vector AVX512 Offload",
+ .features = {
+ .rx_offloads = IAVF_RX_VECTOR_OFFLOAD_OFFLOADS,
+ .simd_width = RTE_VECT_SIMD_512,
+ .extra.bulk_alloc = true
+ }
+ },
[IAVF_RX_AVX512_SCATTERED_OFFLOAD] = {
- iavf_recv_scattered_pkts_vec_avx512_offload, "Vector Scattered AVX512 offload",
- {IAVF_RX_VECTOR_OFFLOAD_OFFLOADS | RTE_ETH_RX_OFFLOAD_SCATTER, RTE_VECT_SIMD_512,
- {.scattered = true, .bulk_alloc = true}}},
- [IAVF_RX_AVX512_FLEX_RXD] = {iavf_recv_pkts_vec_avx512_flex_rxd, "Vector AVX512 Flex",
- {IAVF_RX_VECTOR_FLEX_OFFLOADS, RTE_VECT_SIMD_512,
- {.flex_desc = true, .bulk_alloc = true}}},
+ .pkt_burst = iavf_recv_scattered_pkts_vec_avx512_offload,
+ .info = "Vector Scattered AVX512 Offload",
+ .features = {
+ .rx_offloads = IAVF_RX_VECTOR_OFFLOAD_OFFLOADS | RTE_ETH_RX_OFFLOAD_SCATTER,
+ .simd_width = RTE_VECT_SIMD_512,
+ .extra.scattered = true,
+ .extra.bulk_alloc = true
+ }
+ },
+ [IAVF_RX_AVX512_FLEX_RXD] = {
+ .pkt_burst = iavf_recv_pkts_vec_avx512_flex_rxd,
+ .info = "Vector AVX512 Flex",
+ .features = {
+ .rx_offloads = IAVF_RX_VECTOR_FLEX_OFFLOADS,
+ .simd_width = RTE_VECT_SIMD_512,
+ .extra.flex_desc = true,
+ .extra.bulk_alloc = true
+ }
+ },
[IAVF_RX_AVX512_SCATTERED_FLEX_RXD] = {
- iavf_recv_scattered_pkts_vec_avx512_flex_rxd, "Vector Scattered AVX512 Flex",
- {IAVF_RX_VECTOR_FLEX_OFFLOADS | RTE_ETH_RX_OFFLOAD_SCATTER, RTE_VECT_SIMD_512,
- {.scattered = true, .flex_desc = true, .bulk_alloc = true}}},
+ .pkt_burst = iavf_recv_scattered_pkts_vec_avx512_flex_rxd,
+ .info = "Vector Scattered AVX512 Flex",
+ .features = {
+ .rx_offloads = IAVF_RX_VECTOR_FLEX_OFFLOADS | RTE_ETH_RX_OFFLOAD_SCATTER,
+ .simd_width = RTE_VECT_SIMD_512,
+ .extra.scattered = true,
+ .extra.flex_desc = true,
+ .extra.bulk_alloc = true
+ }
+ },
[IAVF_RX_AVX512_FLEX_RXD_OFFLOAD] = {
- iavf_recv_pkts_vec_avx512_flex_rxd_offload, "Vector AVX512 Flex Offload",
- {IAVF_RX_VECTOR_OFFLOAD_FLEX_OFFLOADS, RTE_VECT_SIMD_512,
- {.flex_desc = true, .bulk_alloc = true}}},
+ .pkt_burst = iavf_recv_pkts_vec_avx512_flex_rxd_offload,
+ .info = "Vector AVX512 Flex Offload",
+ .features = {
+ .rx_offloads = IAVF_RX_VECTOR_OFFLOAD_FLEX_OFFLOADS,
+ .simd_width = RTE_VECT_SIMD_512,
+ .extra.flex_desc = true,
+ .extra.bulk_alloc = true
+ }
+ },
[IAVF_RX_AVX512_SCATTERED_FLEX_RXD_OFFLOAD] = {
- iavf_recv_scattered_pkts_vec_avx512_flex_rxd_offload,
- "Vector Scattered AVX512 Flex offload",
- {IAVF_RX_VECTOR_OFFLOAD_FLEX_OFFLOADS | RTE_ETH_RX_OFFLOAD_SCATTER,
- RTE_VECT_SIMD_512,
- {.scattered = true, .flex_desc = true, .bulk_alloc = true}}},
+ .pkt_burst = iavf_recv_scattered_pkts_vec_avx512_flex_rxd_offload,
+ .info = "Vector Scattered AVX512 Flex Offload",
+ .features = {
+ .rx_offloads = IAVF_RX_VECTOR_OFFLOAD_FLEX_OFFLOADS |
+ RTE_ETH_RX_OFFLOAD_SCATTER,
+ .simd_width = RTE_VECT_SIMD_512,
+ .extra.scattered = true,
+ .extra.flex_desc = true,
+ .extra.bulk_alloc = true
+ }
+ },
#endif
#elif defined RTE_ARCH_ARM
- [IAVF_RX_SSE] = {iavf_recv_pkts_vec, "Vector Neon",
- {IAVF_RX_SCALAR_OFFLOADS, RTE_VECT_SIMD_128, {.bulk_alloc = true}}},
+ [IAVF_RX_SSE] = {
+ .pkt_burst = iavf_recv_pkts_vec,
+ .info = "Vector Neon",
+ .features = {
+ .rx_offloads = IAVF_RX_SCALAR_OFFLOADS,
+ .simd_width = RTE_VECT_SIMD_128,
+ .extra.bulk_alloc = true
+ }
+ },
#endif
};
diff --git a/drivers/net/intel/iavf/iavf_rxtx.h b/drivers/net/intel/iavf/iavf_rxtx.h
index 44be29caf6..5c9339b99f 100644
--- a/drivers/net/intel/iavf/iavf_rxtx.h
+++ b/drivers/net/intel/iavf/iavf_rxtx.h
@@ -55,7 +55,6 @@
RTE_ETH_TX_OFFLOAD_OUTER_UDP_CKSUM | \
RTE_ETH_TX_OFFLOAD_QINQ_INSERT)
-#define IAVF_RX_NO_OFFLOADS 0
/* basic scalar path */
#define IAVF_RX_SCALAR_OFFLOADS ( \
RTE_ETH_RX_OFFLOAD_VLAN_STRIP | \
--
2.34.1
next prev parent reply other threads:[~2025-10-15 10:08 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-10-14 8:45 [PATCH 0/6] net/intel: fixes and improvements to rx path selection Ciara Loftus
2025-10-14 8:45 ` [PATCH 1/6] net/intel: fix Rx vector capability detection Ciara Loftus
2025-10-14 14:16 ` Bruce Richardson
2025-10-14 14:59 ` Loftus, Ciara
2025-10-14 8:45 ` [PATCH 2/6] net/iavf: fix Rx paths feature definitions Ciara Loftus
2025-10-14 14:26 ` Bruce Richardson
2025-10-14 8:45 ` [PATCH 3/6] net/iavf: fix Rx path selection for scalar flex bulk alloc Ciara Loftus
2025-10-14 14:33 ` Bruce Richardson
2025-10-14 8:45 ` [PATCH 4/6] net/iavf: reformat the Rx path infos array Ciara Loftus
2025-10-14 14:38 ` Bruce Richardson
2025-10-14 8:45 ` [PATCH 5/6] net/i40e: " Ciara Loftus
2025-10-14 14:38 ` Bruce Richardson
2025-10-14 8:45 ` [PATCH 6/6] net/ice: " Ciara Loftus
2025-10-14 14:39 ` Bruce Richardson
2025-10-15 10:07 ` [PATCH v2 0/7] net/intel: fixes and improvements to rx path selection Ciara Loftus
2025-10-15 10:07 ` [PATCH v2 1/7] net/intel: fix Rx vector capability detection Ciara Loftus
2025-10-15 10:07 ` [PATCH v2 2/7] net/intel: remove redundant Rx offload check Ciara Loftus
2025-10-15 10:07 ` [PATCH v2 3/7] net/iavf: fix Rx paths feature definitions Ciara Loftus
2025-10-15 10:07 ` [PATCH v2 4/7] net/iavf: fix Rx path selection for scalar flex bulk alloc Ciara Loftus
2025-10-15 10:07 ` Ciara Loftus [this message]
2025-10-15 10:07 ` [PATCH v2 6/7] net/i40e: reformat the Rx path infos array Ciara Loftus
2025-10-15 10:07 ` [PATCH v2 7/7] net/ice: " Ciara Loftus
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