[PATCH v2 0/1] Optimization Summary for RISC-V rte_memcpy

[Qiguo Chen <chen.qiguo@zte.com.cn>]

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Changes in v2:
     1)Modify some codes and descriptions according to Sunyuechi's suggestions.
     2)Removed benchmark_report.txt to avoid warnings.

[PATCH v1]
I've implemented optimizations to rte_memcpy targeting RISC-V architectures,
achieving an average 10%~15% reduction in execution time for data sizes between
129 to 1024 bytes( 1025~1600 gains little).
These enhancements draw inspiration from x86 implementations,
 specifically focusing on:
1)Alignment Handling for Unaligned Scenarios
2)Vector Configuration Tuning
3)Strategic Prefetching with zicbop

- Patch 1: Cover letter
- Patch 2: Base implementation
- Patch 3: Benchmark report


Tested on Tested on SG2044 (VLEN=128)


Qiguo Chen (1):
  riscv support rte_memcpy in vector

 .mailmap                           |   1 +
 config/riscv/meson.build           |  14 ++
 lib/eal/riscv/include/rte_memcpy.h | 310 ++++++++++++++++++++++++++++-
 3 files changed, 323 insertions(+), 2 deletions(-)

-- 
2.21.0.windows.1

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