From: Rakesh Kudurumalla <rkudurumalla@marvell.com>
To: Nithin Dabilpuram <ndabilpuram@marvell.com>,
Kiran Kumar K <kirankumark@marvell.com>,
Sunil Kumar Kori <skori@marvell.com>,
Satha Rao <skoteshwar@marvell.com>,
Harman Kalra <hkalra@marvell.com>
Cc: <dev@dpdk.org>, <jerinj@marvell.com>,
Rakesh Kudurumalla <rkudurumalla@marvell.com>
Subject: [PATCH v2 3/5] common/cnxk: add routines to operate CPT CQ
Date: Wed, 29 Oct 2025 18:30:21 +0530 [thread overview]
Message-ID: <20251029130023.1637177-3-rkudurumalla@marvell.com> (raw)
In-Reply-To: <20251029130023.1637177-1-rkudurumalla@marvell.com>
Added routines to enable, disable and initialize
CPT CQ if cpt_cq_ena is set
Signed-off-by: Rakesh Kudurumalla <rkudurumalla@marvell.com>
---
drivers/common/cnxk/roc_cpt.c | 74 ++++++++++++++++++-
drivers/common/cnxk/roc_cpt.h | 8 ++
drivers/common/cnxk/roc_cpt_priv.h | 3 +-
.../common/cnxk/roc_platform_base_symbols.c | 2 +
4 files changed, 85 insertions(+), 2 deletions(-)
diff --git a/drivers/common/cnxk/roc_cpt.c b/drivers/common/cnxk/roc_cpt.c
index 9f67a3c78c..5e19832b11 100644
--- a/drivers/common/cnxk/roc_cpt.c
+++ b/drivers/common/cnxk/roc_cpt.c
@@ -24,6 +24,7 @@
#define CPT_LF_MAX_NB_DESC 128000
#define CPT_LF_DEFAULT_NB_DESC 1024
#define CPT_LF_FC_MIN_THRESHOLD 32
+#define CQ_ENTRY_SIZE_UNIT 32
static struct cpt_int_cb {
roc_cpt_int_misc_cb_t cb;
@@ -684,6 +685,37 @@ cpt_get_blkaddr(struct dev *dev)
return reg & 0x1FFULL ? RVU_BLOCK_ADDR_CPT1 : RVU_BLOCK_ADDR_CPT0;
}
+int
+cpt_lf_cq_init(struct roc_cpt_lf *lf)
+{
+ union cpt_lf_cq_size lf_cq_size = {.u = 0x0};
+ union cpt_lf_cq_base lf_cq_base = {.u = 0x0};
+ uint8_t max_cq_entry_size = 0x3;
+ uintptr_t addr;
+ uint32_t len;
+
+ if (!lf->cq_size || lf->cq_entry_size > max_cq_entry_size)
+ return -EINVAL;
+
+ /* Disable CPT completion queue */
+ roc_cpt_cq_disable(lf);
+
+ /* Set command queue base address */
+ len = PLT_ALIGN(lf->cq_size * (CQ_ENTRY_SIZE_UNIT << lf->cq_entry_size), ROC_ALIGN);
+ lf->cq_vaddr = plt_zmalloc(len, ROC_ALIGN);
+ if (lf->cq_vaddr == NULL)
+ return -ENOMEM;
+
+ addr = (uintptr_t)lf->cq_vaddr;
+
+ lf_cq_base.s.addr = addr >> 7;
+ plt_write64(lf_cq_base.u, lf->rbase + CPT_LF_CQ_BASE);
+ lf_cq_size.s.size = PLT_ALIGN(len, ROC_ALIGN);
+ plt_write64(lf_cq_size.u, lf->rbase + CPT_LF_CQ_SIZE);
+
+ return 0;
+}
+
int
cpt_lf_init(struct roc_cpt_lf *lf, bool skip_register_irq)
{
@@ -710,14 +742,22 @@ cpt_lf_init(struct roc_cpt_lf *lf, bool skip_register_irq)
/* Initialize instruction queue */
cpt_iq_init(lf);
+ if (lf->cpt_cq_ena) {
+ rc = cpt_lf_cq_init(lf);
+ if (rc)
+ goto disable_iq;
+ }
+
if (!skip_register_irq) {
rc = cpt_lf_register_irqs(lf, cpt_lf_misc_irq, cpt_lf_done_irq);
if (rc)
- goto disable_iq;
+ goto disable_cq;
}
return 0;
+disable_cq:
+ cpt_lf_cq_fini(lf);
disable_iq:
roc_cpt_iq_disable(lf);
plt_free(iq_mem);
@@ -951,6 +991,7 @@ cpt_lf_fini(struct roc_cpt_lf *lf, bool skip_register_irq)
if (!skip_register_irq)
cpt_lf_unregister_irqs(lf, cpt_lf_misc_irq, cpt_lf_done_irq);
+ cpt_lf_cq_fini(lf);
/* Disable IQ */
roc_cpt_iq_disable(lf);
roc_cpt_iq_reset(lf);
@@ -960,6 +1001,17 @@ cpt_lf_fini(struct roc_cpt_lf *lf, bool skip_register_irq)
lf->iq_vaddr = NULL;
}
+void
+cpt_lf_cq_fini(struct roc_cpt_lf *lf)
+{
+ if (!lf->cpt_cq_ena)
+ return;
+
+ roc_cpt_cq_disable(lf);
+ plt_free(lf->cq_vaddr);
+ lf->cq_vaddr = NULL;
+}
+
void
roc_cpt_lf_reset(struct roc_cpt_lf *lf)
{
@@ -1071,6 +1123,26 @@ roc_cpt_eng_grp_add(struct roc_cpt *roc_cpt, enum cpt_eng_type eng_type)
return ret;
}
+void
+roc_cpt_cq_enable(struct roc_cpt_lf *lf)
+{
+ union cpt_lf_cq_ctl lf_cq_ctl = {.u = 0x0};
+
+ lf_cq_ctl.s.ena = 1;
+ lf_cq_ctl.s.dq_ack_ena = lf->dq_ack_ena;
+ lf_cq_ctl.s.entry_size = lf->cq_entry_size;
+ lf_cq_ctl.s.cq_all = lf->cq_all;
+ plt_write64(lf_cq_ctl.u, lf->rbase + CPT_LF_CQ_CTL);
+}
+
+void
+roc_cpt_cq_disable(struct roc_cpt_lf *lf)
+{
+ union cpt_lf_cq_ctl lf_cq_ctl = {.u = 0x0};
+
+ plt_write64(lf_cq_ctl.u, lf->rbase + CPT_LF_CQ_CTL);
+}
+
void
roc_cpt_iq_disable(struct roc_cpt_lf *lf)
{
diff --git a/drivers/common/cnxk/roc_cpt.h b/drivers/common/cnxk/roc_cpt.h
index 02f49c06b7..28dbcd0ef1 100644
--- a/drivers/common/cnxk/roc_cpt.h
+++ b/drivers/common/cnxk/roc_cpt.h
@@ -148,10 +148,16 @@ struct roc_cpt_lf {
/* Input parameters */
uint16_t lf_id;
uint32_t nb_desc;
+ bool dq_ack_ena;
+ bool cq_all;
+ bool cpt_cq_ena;
+ uint8_t cq_entry_size;
+ uint32_t cq_size;
/* End of Input parameters */
struct plt_pci_device *pci_dev;
struct dev *dev;
struct roc_cpt *roc_cpt;
+ uint16_t *cq_vaddr;
uintptr_t rbase;
uintptr_t lmt_base;
uint16_t msixoff;
@@ -226,6 +232,8 @@ int __roc_api roc_cpt_afs_print(struct roc_cpt *roc_cpt);
int __roc_api roc_cpt_lfs_print(struct roc_cpt *roc_cpt);
void __roc_api roc_cpt_iq_disable(struct roc_cpt_lf *lf);
void __roc_api roc_cpt_iq_enable(struct roc_cpt_lf *lf);
+void __roc_api roc_cpt_cq_disable(struct roc_cpt_lf *lf);
+void __roc_api roc_cpt_cq_enable(struct roc_cpt_lf *lf);
int __roc_api roc_cpt_lmtline_init(struct roc_cpt *roc_cpt, struct roc_cpt_lmtline *lmtline,
int lf_id, bool is_dual);
diff --git a/drivers/common/cnxk/roc_cpt_priv.h b/drivers/common/cnxk/roc_cpt_priv.h
index c46ef143ab..39afa1c7ff 100644
--- a/drivers/common/cnxk/roc_cpt_priv.h
+++ b/drivers/common/cnxk/roc_cpt_priv.h
@@ -30,7 +30,8 @@ int cpt_lf_init(struct roc_cpt_lf *lf, bool skip_register_irq);
void cpt_lf_fini(struct roc_cpt_lf *lf, bool skip_register_irq);
int cpt_lf_register_irqs(struct roc_cpt_lf *lf, misc_irq_cb_t misc_cb, done_irq_cb_t done_cb);
void cpt_lf_unregister_irqs(struct roc_cpt_lf *lf, misc_irq_cb_t misc_cb, done_irq_cb_t done_cb);
-void cpt_lf_cq_init(struct roc_cpt_lf *lf);
+int cpt_lf_cq_init(struct roc_cpt_lf *lf);
+void cpt_lf_cq_fini(struct roc_cpt_lf *lf);
void cpt_lf_misc_irq(void *params);
int cpt_lf_outb_cfg(struct dev *dev, uint16_t sso_pf_func, uint16_t nix_pf_func,
diff --git a/drivers/common/cnxk/roc_platform_base_symbols.c b/drivers/common/cnxk/roc_platform_base_symbols.c
index 7f0fe601ad..e6fa3b540b 100644
--- a/drivers/common/cnxk/roc_platform_base_symbols.c
+++ b/drivers/common/cnxk/roc_platform_base_symbols.c
@@ -50,6 +50,8 @@ RTE_EXPORT_INTERNAL_SYMBOL(roc_cpt_lf_ctx_reload)
RTE_EXPORT_INTERNAL_SYMBOL(roc_cpt_lf_reset)
RTE_EXPORT_INTERNAL_SYMBOL(roc_cpt_lf_fini)
RTE_EXPORT_INTERNAL_SYMBOL(roc_cpt_dev_fini)
+RTE_EXPORT_INTERNAL_SYMBOL(roc_cpt_cq_disable)
+RTE_EXPORT_INTERNAL_SYMBOL(roc_cpt_cq_enable)
RTE_EXPORT_INTERNAL_SYMBOL(roc_cpt_dev_clear)
RTE_EXPORT_INTERNAL_SYMBOL(roc_cpt_eng_grp_add)
RTE_EXPORT_INTERNAL_SYMBOL(roc_cpt_iq_disable)
--
2.25.1
next prev parent reply other threads:[~2025-10-29 13:00 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-10-06 5:13 [PATCH 1/5] common/cnxk: add CPT CQ configuration Rakesh Kudurumalla
2025-10-06 5:13 ` [PATCH 2/5] common/cnxk: add params to register IRQ handler Rakesh Kudurumalla
2025-10-06 5:14 ` [PATCH 3/5] common/cnxk: add routines to operate CPT CQ Rakesh Kudurumalla
2025-10-06 5:14 ` [PATCH 4/5] net/cnxk: handle soft expiry support Rakesh Kudurumalla
2025-10-07 6:56 ` Jerin Jacob
2025-10-06 5:14 ` [PATCH 5/5] net/cnxk: enable CPT CQ for outbound traffic Rakesh Kudurumalla
2025-10-29 13:00 ` [PATCH v2 1/5] common/cnxk: add CPT CQ configuration Rakesh Kudurumalla
2025-10-29 13:00 ` [PATCH v2 2/5] common/cnxk: add params to register IRQ handler Rakesh Kudurumalla
2025-10-29 13:00 ` Rakesh Kudurumalla [this message]
2025-10-29 13:00 ` [PATCH v2 4/5] net/cnxk: handle soft expiry support Rakesh Kudurumalla
2025-10-29 13:00 ` [PATCH v2 5/5] net/cnxk: enable CPT CQ for outbound traffic Rakesh Kudurumalla
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20251029130023.1637177-3-rkudurumalla@marvell.com \
--to=rkudurumalla@marvell.com \
--cc=dev@dpdk.org \
--cc=hkalra@marvell.com \
--cc=jerinj@marvell.com \
--cc=kirankumark@marvell.com \
--cc=ndabilpuram@marvell.com \
--cc=skori@marvell.com \
--cc=skoteshwar@marvell.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).